^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // Copyright (c) 2020, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define REG_PERPH_TYPE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define QCOM_LAB_TYPE 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define QCOM_IBB_TYPE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PMI8998_LAB_REG_BASE 0xde00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PMI8998_IBB_REG_BASE 0xdc00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define REG_LABIBB_STATUS1 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define REG_LABIBB_ENABLE_CTL 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define LABIBB_STATUS1_VREG_OK_BIT BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define LABIBB_CONTROL_ENABLE BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LAB_ENABLE_CTL_MASK BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define IBB_ENABLE_CTL_MASK (BIT(7) | BIT(6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LABIBB_OFF_ON_DELAY 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LAB_ENABLE_TIME (LABIBB_OFF_ON_DELAY * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define IBB_ENABLE_TIME (LABIBB_OFF_ON_DELAY * 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LABIBB_POLL_ENABLED_TIME 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct labibb_regulator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u16 base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct labibb_regulator_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u16 base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) const struct regulator_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static const struct regulator_ops qcom_labibb_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static const struct regulator_desc pmi8998_lab_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .enable_mask = LAB_ENABLE_CTL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .enable_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_ENABLE_CTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .enable_val = LABIBB_CONTROL_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .enable_time = LAB_ENABLE_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .poll_enabled_time = LABIBB_POLL_ENABLED_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .off_on_delay = LABIBB_OFF_ON_DELAY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .ops = &qcom_labibb_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static const struct regulator_desc pmi8998_ibb_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .enable_mask = IBB_ENABLE_CTL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .enable_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_ENABLE_CTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .enable_val = LABIBB_CONTROL_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .enable_time = IBB_ENABLE_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .poll_enabled_time = LABIBB_POLL_ENABLED_TIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .off_on_delay = LABIBB_OFF_ON_DELAY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .ops = &qcom_labibb_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static const struct labibb_regulator_data pmi8998_labibb_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {"lab", QCOM_LAB_TYPE, PMI8998_LAB_REG_BASE, &pmi8998_lab_desc},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {"ibb", QCOM_IBB_TYPE, PMI8998_IBB_REG_BASE, &pmi8998_ibb_desc},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static const struct of_device_id qcom_labibb_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) { .compatible = "qcom,pmi8998-lab-ibb", .data = &pmi8998_labibb_data},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MODULE_DEVICE_TABLE(of, qcom_labibb_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static int qcom_labibb_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct labibb_regulator *vreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct regulator_config cfg = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) const struct labibb_regulator_data *reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct regmap *reg_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) reg_regmap = dev_get_regmap(pdev->dev.parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (!reg_regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dev_err(&pdev->dev, "Couldn't get parent's regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) match = of_match_device(qcom_labibb_match, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (!match)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) for (reg_data = match->data; reg_data->name; reg_data++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Validate if the type of regulator is indeed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * what's mentioned in DT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = regmap_read(reg_regmap, reg_data->base + REG_PERPH_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) &type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) "Peripheral type read failed ret=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (WARN_ON((type != QCOM_LAB_TYPE) && (type != QCOM_IBB_TYPE)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) WARN_ON(type != reg_data->type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (!vreg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) vreg->regmap = reg_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) vreg->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) vreg->base = reg_data->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) vreg->type = reg_data->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) memcpy(&vreg->desc, reg_data->desc, sizeof(vreg->desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) vreg->desc.of_match = reg_data->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) vreg->desc.name = reg_data->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) cfg.dev = vreg->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) cfg.driver_data = vreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) cfg.regmap = vreg->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) vreg->rdev = devm_regulator_register(vreg->dev, &vreg->desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) &cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (IS_ERR(vreg->rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev_err(dev, "qcom_labibb: error registering %s : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) reg_data->name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return PTR_ERR(vreg->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static struct platform_driver qcom_labibb_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .name = "qcom-lab-ibb-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .of_match_table = qcom_labibb_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .probe = qcom_labibb_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) module_platform_driver(qcom_labibb_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MODULE_DESCRIPTION("Qualcomm labibb driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MODULE_AUTHOR("Nisha Kumari <nishakumari@codeaurora.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) MODULE_AUTHOR("Sumit Semwal <sumit.semwal@linaro.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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