^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * pv88080-regulator.h - Regulator definitions for PV88080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2016 Powerventure Semiconductor Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __PV88080_REGISTERS_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __PV88080_REGISTERS_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* System Control and Event Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define PV88080_REG_EVENT_A 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define PV88080_REG_MASK_A 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PV88080_REG_MASK_B 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define PV88080_REG_MASK_C 0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* Regulator Registers - rev. AA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PV88080AA_REG_HVBUCK_CONF1 0x2D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PV88080AA_REG_HVBUCK_CONF2 0x2E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PV88080AA_REG_BUCK1_CONF0 0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PV88080AA_REG_BUCK1_CONF1 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PV88080AA_REG_BUCK1_CONF2 0x59
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PV88080AA_REG_BUCK1_CONF5 0x5C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PV88080AA_REG_BUCK2_CONF0 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PV88080AA_REG_BUCK2_CONF1 0x2A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PV88080AA_REG_BUCK2_CONF2 0x61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PV88080AA_REG_BUCK2_CONF5 0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PV88080AA_REG_BUCK3_CONF0 0x2B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PV88080AA_REG_BUCK3_CONF1 0x2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PV88080AA_REG_BUCK3_CONF2 0x69
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PV88080AA_REG_BUCK3_CONF5 0x6C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Regulator Registers - rev. BA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PV88080BA_REG_HVBUCK_CONF1 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PV88080BA_REG_HVBUCK_CONF2 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PV88080BA_REG_BUCK1_CONF0 0x2A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PV88080BA_REG_BUCK1_CONF1 0x2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PV88080BA_REG_BUCK1_CONF2 0x5A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PV88080BA_REG_BUCK1_CONF5 0x5D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define PV88080BA_REG_BUCK2_CONF0 0x2D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PV88080BA_REG_BUCK2_CONF1 0x2F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PV88080BA_REG_BUCK2_CONF2 0x63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PV88080BA_REG_BUCK2_CONF5 0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PV88080BA_REG_BUCK3_CONF0 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PV88080BA_REG_BUCK3_CONF1 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define PV88080BA_REG_BUCK3_CONF2 0x6C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PV88080BA_REG_BUCK3_CONF5 0x6F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* PV88080_REG_EVENT_A (addr=0x04) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PV88080_E_VDD_FLT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PV88080_E_OVER_TEMP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* PV88080_REG_MASK_A (addr=0x09) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PV88080_M_VDD_FLT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PV88080_M_OVER_TEMP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PV88080_BUCK1_EN 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PV88080_VBUCK1_MASK 0x7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define PV88080_BUCK2_EN 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define PV88080_VBUCK2_MASK 0x7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PV88080_BUCK3_EN 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define PV88080_VBUCK3_MASK 0x7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define PV88080_BUCK1_ILIM_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define PV88080_BUCK1_ILIM_MASK 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define PV88080_BUCK1_MODE_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define PV88080_BUCK2_ILIM_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define PV88080_BUCK2_ILIM_MASK 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define PV88080_BUCK2_MODE_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define PV88080_BUCK3_ILIM_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define PV88080_BUCK3_ILIM_MASK 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define PV88080_BUCK3_MODE_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define PV88080_BUCK_MODE_SLEEP 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define PV88080_BUCK_MODE_AUTO 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define PV88080_BUCK_MODE_SYNC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define PV88080_VHVBUCK_MASK 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define PV88080_HVBUCK_EN 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define PV88080_BUCK_VDAC_RANGE_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define PV88080_BUCK_VDAC_RANGE_MASK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define PV88080_BUCK_VDAC_RANGE_1 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define PV88080_BUCK_VDAC_RANGE_2 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define PV88080_BUCK_VRANGE_GAIN_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define PV88080_BUCK_VRANGE_GAIN_MASK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define PV88080_BUCK_VRANGE_GAIN_1 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define PV88080_BUCK_VRANGE_GAIN_2 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #endif /* __PV88080_REGISTERS_H__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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