^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2020 NXP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * NXP PCA9450 pmic driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regulator/pca9450.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct pc9450_dvs_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned int run_reg; /* dvs0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned int run_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned int standby_reg; /* dvs1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned int standby_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct pca9450_regulator_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) const struct pc9450_dvs_config dvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct pca9450 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct gpio_desc *sd_vsel_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) enum pca9450_chip_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned int rcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static const struct regmap_range pca9450_status_range = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .range_min = PCA9450_REG_INT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .range_max = PCA9450_REG_PWRON_STAT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static const struct regmap_access_table pca9450_volatile_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .yes_ranges = &pca9450_status_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .n_yes_ranges = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static const struct regmap_config pca9450_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .volatile_table = &pca9450_volatile_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .max_register = PCA9450_MAX_REGISTER - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * BUCK1/2/3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * BUCK1RAM[1:0] BUCK1 DVS ramp rate setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * 00: 25mV/1usec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * 01: 25mV/2usec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * 10: 25mV/4usec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * 11: 25mV/8usec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int pca9450_dvs_set_ramp_delay(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int ramp_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned int ramp_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) switch (ramp_delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) case 1 ... 3125:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ramp_value = BUCK1_RAMP_3P125MV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) case 3126 ... 6250:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ramp_value = BUCK1_RAMP_6P25MV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) case 6251 ... 12500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ramp_value = BUCK1_RAMP_12P5MV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) case 12501 ... 25000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ramp_value = BUCK1_RAMP_25MV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ramp_value = BUCK1_RAMP_25MV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return regmap_update_bits(rdev->regmap, PCA9450_REG_BUCK1CTRL + id * 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) BUCK1_RAMP_MASK, ramp_value << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static const struct regulator_ops pca9450_dvs_buck_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .set_voltage_time_sel = regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .set_ramp_delay = pca9450_dvs_set_ramp_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const struct regulator_ops pca9450_buck_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .set_voltage_time_sel = regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static const struct regulator_ops pca9450_ldo_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * BUCK1/2/3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * 0.60 to 2.1875V (12.5mV step)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static const struct linear_range pca9450_dvs_buck_volts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) REGULATOR_LINEAR_RANGE(600000, 0x00, 0x7F, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * BUCK4/5/6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * 0.6V to 3.4V (25mV step)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct linear_range pca9450_buck_volts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) REGULATOR_LINEAR_RANGE(600000, 0x00, 0x70, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) REGULATOR_LINEAR_RANGE(3400000, 0x71, 0x7F, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * LDO1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * 1.6 to 3.3V ()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const struct linear_range pca9450_ldo1_volts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) REGULATOR_LINEAR_RANGE(1600000, 0x00, 0x03, 100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) REGULATOR_LINEAR_RANGE(3000000, 0x04, 0x07, 100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * LDO2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * 0.8 to 1.15V (50mV step)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct linear_range pca9450_ldo2_volts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) REGULATOR_LINEAR_RANGE(800000, 0x00, 0x07, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * LDO3/4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * 0.8 to 3.3V (100mV step)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct linear_range pca9450_ldo34_volts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) REGULATOR_LINEAR_RANGE(800000, 0x00, 0x19, 100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) REGULATOR_LINEAR_RANGE(3300000, 0x1A, 0x1F, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * LDO5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * 1.8 to 3.3V (100mV step)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static const struct linear_range pca9450_ldo5_volts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) REGULATOR_LINEAR_RANGE(1800000, 0x00, 0x0F, 100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static int buck_set_dvs(const struct regulator_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct device_node *np, struct regmap *regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) char *prop, unsigned int reg, unsigned int mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) uint32_t uv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) ret = of_property_read_u32(np, prop, &uv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (ret == -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) else if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) for (i = 0; i < desc->n_voltages; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) ret = regulator_desc_list_voltage_linear_range(desc, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (ret == uv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) i <<= ffs(desc->vsel_mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ret = regmap_update_bits(regmap, reg, mask, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static int pca9450_set_dvs_levels(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) const struct regulator_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct regulator_config *cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct pca9450_regulator_desc *data = container_of(desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct pca9450_regulator_desc, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) const struct pc9450_dvs_config *dvs = &data->dvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) unsigned int reg, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) char *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int i, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) for (i = 0; i < PCA9450_DVS_LEVEL_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) switch (i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) case PCA9450_DVS_LEVEL_RUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) prop = "nxp,dvs-run-voltage";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) reg = dvs->run_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) mask = dvs->run_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) case PCA9450_DVS_LEVEL_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) prop = "nxp,dvs-standby-voltage";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) reg = dvs->standby_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) mask = dvs->standby_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = buck_set_dvs(desc, np, cfg->regmap, prop, reg, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static const struct pca9450_regulator_desc pca9450a_regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .name = "buck1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .of_match = of_match_ptr("BUCK1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .id = PCA9450_BUCK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .ops = &pca9450_dvs_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .n_voltages = PCA9450_BUCK1_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .linear_ranges = pca9450_dvs_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .vsel_reg = PCA9450_REG_BUCK1OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .vsel_mask = BUCK1OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .enable_reg = PCA9450_REG_BUCK1CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .enable_mask = BUCK1_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .of_parse_cb = pca9450_set_dvs_levels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .dvs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .run_reg = PCA9450_REG_BUCK1OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .run_mask = BUCK1OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .standby_reg = PCA9450_REG_BUCK1OUT_DVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .standby_mask = BUCK1OUT_DVS1_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .name = "buck2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .of_match = of_match_ptr("BUCK2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .id = PCA9450_BUCK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .ops = &pca9450_dvs_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .n_voltages = PCA9450_BUCK2_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .linear_ranges = pca9450_dvs_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .vsel_reg = PCA9450_REG_BUCK2OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .vsel_mask = BUCK2OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .enable_reg = PCA9450_REG_BUCK2CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .enable_mask = BUCK1_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .of_parse_cb = pca9450_set_dvs_levels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .dvs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .run_reg = PCA9450_REG_BUCK2OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .run_mask = BUCK2OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .standby_reg = PCA9450_REG_BUCK2OUT_DVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .standby_mask = BUCK2OUT_DVS1_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .name = "buck3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .of_match = of_match_ptr("BUCK3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .id = PCA9450_BUCK3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .ops = &pca9450_dvs_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .n_voltages = PCA9450_BUCK3_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .linear_ranges = pca9450_dvs_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .vsel_reg = PCA9450_REG_BUCK3OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .vsel_mask = BUCK3OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .enable_reg = PCA9450_REG_BUCK3CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .enable_mask = BUCK3_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .of_parse_cb = pca9450_set_dvs_levels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .dvs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .run_reg = PCA9450_REG_BUCK3OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .run_mask = BUCK3OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .standby_reg = PCA9450_REG_BUCK3OUT_DVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .standby_mask = BUCK3OUT_DVS1_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .name = "buck4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .of_match = of_match_ptr("BUCK4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .id = PCA9450_BUCK4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .ops = &pca9450_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .n_voltages = PCA9450_BUCK4_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .linear_ranges = pca9450_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .vsel_reg = PCA9450_REG_BUCK4OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .vsel_mask = BUCK4OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .enable_reg = PCA9450_REG_BUCK4CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .enable_mask = BUCK4_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .name = "buck5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .of_match = of_match_ptr("BUCK5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .id = PCA9450_BUCK5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .ops = &pca9450_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .n_voltages = PCA9450_BUCK5_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .linear_ranges = pca9450_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .vsel_reg = PCA9450_REG_BUCK5OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .vsel_mask = BUCK5OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .enable_reg = PCA9450_REG_BUCK5CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .enable_mask = BUCK5_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .name = "buck6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .of_match = of_match_ptr("BUCK6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .id = PCA9450_BUCK6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .ops = &pca9450_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .n_voltages = PCA9450_BUCK6_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .linear_ranges = pca9450_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .vsel_reg = PCA9450_REG_BUCK6OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .vsel_mask = BUCK6OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .enable_reg = PCA9450_REG_BUCK6CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .enable_mask = BUCK6_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .name = "ldo1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .of_match = of_match_ptr("LDO1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .id = PCA9450_LDO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .n_voltages = PCA9450_LDO1_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .linear_ranges = pca9450_ldo1_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo1_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .vsel_reg = PCA9450_REG_LDO1CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .vsel_mask = LDO1OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .enable_reg = PCA9450_REG_LDO1CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .enable_mask = LDO1_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .name = "ldo2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .of_match = of_match_ptr("LDO2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .id = PCA9450_LDO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .n_voltages = PCA9450_LDO2_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .linear_ranges = pca9450_ldo2_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo2_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .vsel_reg = PCA9450_REG_LDO2CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .vsel_mask = LDO2OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .enable_reg = PCA9450_REG_LDO2CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .enable_mask = LDO2_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .name = "ldo3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .of_match = of_match_ptr("LDO3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .id = PCA9450_LDO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .n_voltages = PCA9450_LDO3_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .linear_ranges = pca9450_ldo34_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .vsel_reg = PCA9450_REG_LDO3CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .vsel_mask = LDO3OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .enable_reg = PCA9450_REG_LDO3CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .enable_mask = LDO3_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .name = "ldo4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .of_match = of_match_ptr("LDO4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .id = PCA9450_LDO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .n_voltages = PCA9450_LDO4_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .linear_ranges = pca9450_ldo34_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .vsel_reg = PCA9450_REG_LDO4CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .vsel_mask = LDO4OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .enable_reg = PCA9450_REG_LDO4CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .enable_mask = LDO4_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .name = "ldo5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .of_match = of_match_ptr("LDO5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .id = PCA9450_LDO5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .n_voltages = PCA9450_LDO5_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .linear_ranges = pca9450_ldo5_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo5_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .vsel_reg = PCA9450_REG_LDO5CTRL_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .vsel_mask = LDO5HOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .enable_reg = PCA9450_REG_LDO5CTRL_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .enable_mask = LDO5H_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * Buck3 removed on PCA9450B and connected with Buck1 internal for dual phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) * on PCA9450C as no Buck3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) static const struct pca9450_regulator_desc pca9450bc_regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .name = "buck1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .of_match = of_match_ptr("BUCK1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .id = PCA9450_BUCK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .ops = &pca9450_dvs_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .n_voltages = PCA9450_BUCK1_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .linear_ranges = pca9450_dvs_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .vsel_reg = PCA9450_REG_BUCK1OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .vsel_mask = BUCK1OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .enable_reg = PCA9450_REG_BUCK1CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .enable_mask = BUCK1_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .of_parse_cb = pca9450_set_dvs_levels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .dvs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .run_reg = PCA9450_REG_BUCK1OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .run_mask = BUCK1OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .standby_reg = PCA9450_REG_BUCK1OUT_DVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .standby_mask = BUCK1OUT_DVS1_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .name = "buck2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .of_match = of_match_ptr("BUCK2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .id = PCA9450_BUCK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .ops = &pca9450_dvs_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .n_voltages = PCA9450_BUCK2_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .linear_ranges = pca9450_dvs_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .n_linear_ranges = ARRAY_SIZE(pca9450_dvs_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .vsel_reg = PCA9450_REG_BUCK2OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .vsel_mask = BUCK2OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .enable_reg = PCA9450_REG_BUCK2CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .enable_mask = BUCK1_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .of_parse_cb = pca9450_set_dvs_levels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .dvs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .run_reg = PCA9450_REG_BUCK2OUT_DVS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .run_mask = BUCK2OUT_DVS0_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .standby_reg = PCA9450_REG_BUCK2OUT_DVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .standby_mask = BUCK2OUT_DVS1_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .name = "buck4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .of_match = of_match_ptr("BUCK4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) .id = PCA9450_BUCK4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .ops = &pca9450_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .n_voltages = PCA9450_BUCK4_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .linear_ranges = pca9450_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .vsel_reg = PCA9450_REG_BUCK4OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .vsel_mask = BUCK4OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .enable_reg = PCA9450_REG_BUCK4CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .enable_mask = BUCK4_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .name = "buck5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) .of_match = of_match_ptr("BUCK5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .id = PCA9450_BUCK5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) .ops = &pca9450_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .n_voltages = PCA9450_BUCK5_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .linear_ranges = pca9450_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .vsel_reg = PCA9450_REG_BUCK5OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .vsel_mask = BUCK5OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .enable_reg = PCA9450_REG_BUCK5CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .enable_mask = BUCK5_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .name = "buck6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .of_match = of_match_ptr("BUCK6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .id = PCA9450_BUCK6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .ops = &pca9450_buck_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) .n_voltages = PCA9450_BUCK6_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .linear_ranges = pca9450_buck_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .n_linear_ranges = ARRAY_SIZE(pca9450_buck_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) .vsel_reg = PCA9450_REG_BUCK6OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) .vsel_mask = BUCK6OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) .enable_reg = PCA9450_REG_BUCK6CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) .enable_mask = BUCK6_ENMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .name = "ldo1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) .of_match = of_match_ptr("LDO1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .id = PCA9450_LDO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) .n_voltages = PCA9450_LDO1_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) .linear_ranges = pca9450_ldo1_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo1_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) .vsel_reg = PCA9450_REG_LDO1CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .vsel_mask = LDO1OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .enable_reg = PCA9450_REG_LDO1CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .enable_mask = LDO1_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) .name = "ldo2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) .of_match = of_match_ptr("LDO2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) .id = PCA9450_LDO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) .n_voltages = PCA9450_LDO2_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) .linear_ranges = pca9450_ldo2_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo2_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) .vsel_reg = PCA9450_REG_LDO2CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) .vsel_mask = LDO2OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .enable_reg = PCA9450_REG_LDO2CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) .enable_mask = LDO2_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) .name = "ldo3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) .of_match = of_match_ptr("LDO3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) .id = PCA9450_LDO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .n_voltages = PCA9450_LDO3_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .linear_ranges = pca9450_ldo34_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .vsel_reg = PCA9450_REG_LDO3CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .vsel_mask = LDO3OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) .enable_reg = PCA9450_REG_LDO3CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .enable_mask = LDO3_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .name = "ldo4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .of_match = of_match_ptr("LDO4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) .id = PCA9450_LDO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .n_voltages = PCA9450_LDO4_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) .linear_ranges = pca9450_ldo34_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo34_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) .vsel_reg = PCA9450_REG_LDO4CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) .vsel_mask = LDO4OUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .enable_reg = PCA9450_REG_LDO4CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .enable_mask = LDO4_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .name = "ldo5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) .of_match = of_match_ptr("LDO5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .id = PCA9450_LDO5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .ops = &pca9450_ldo_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .n_voltages = PCA9450_LDO5_VOLTAGE_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .linear_ranges = pca9450_ldo5_volts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .n_linear_ranges = ARRAY_SIZE(pca9450_ldo5_volts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) .vsel_reg = PCA9450_REG_LDO5CTRL_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) .vsel_mask = LDO5HOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) .enable_reg = PCA9450_REG_LDO5CTRL_H,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .enable_mask = LDO5H_EN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static irqreturn_t pca9450_irq_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) struct pca9450 *pca9450 = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) struct regmap *regmap = pca9450->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) unsigned int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) ret = regmap_read(regmap, PCA9450_REG_INT1, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) dev_err(pca9450->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) "Failed to read INT1(%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (status & IRQ_PWRON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) dev_warn(pca9450->dev, "PWRON interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (status & IRQ_WDOGB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) dev_warn(pca9450->dev, "WDOGB interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) if (status & IRQ_VR_FLT1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) dev_warn(pca9450->dev, "VRFLT1 interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) if (status & IRQ_VR_FLT2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) dev_warn(pca9450->dev, "VRFLT2 interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if (status & IRQ_LOWVSYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) dev_warn(pca9450->dev, "LOWVSYS interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) if (status & IRQ_THERM_105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) dev_warn(pca9450->dev, "IRQ_THERM_105 interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (status & IRQ_THERM_125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) dev_warn(pca9450->dev, "IRQ_THERM_125 interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) static int pca9450_i2c_probe(struct i2c_client *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) enum pca9450_chip_type type = (unsigned int)(uintptr_t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) of_device_get_match_data(&i2c->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) const struct pca9450_regulator_desc *regulator_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) struct pca9450 *pca9450;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) unsigned int device_id, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (!i2c->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) dev_err(&i2c->dev, "No IRQ configured?\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) pca9450 = devm_kzalloc(&i2c->dev, sizeof(struct pca9450), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (!pca9450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) case PCA9450_TYPE_PCA9450A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) regulator_desc = pca9450a_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) pca9450->rcnt = ARRAY_SIZE(pca9450a_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) case PCA9450_TYPE_PCA9450BC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) regulator_desc = pca9450bc_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) pca9450->rcnt = ARRAY_SIZE(pca9450bc_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) dev_err(&i2c->dev, "Unknown device type");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) pca9450->irq = i2c->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) pca9450->type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) pca9450->dev = &i2c->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) dev_set_drvdata(&i2c->dev, pca9450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) pca9450->regmap = devm_regmap_init_i2c(i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) &pca9450_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (IS_ERR(pca9450->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) dev_err(&i2c->dev, "regmap initialization failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) return PTR_ERR(pca9450->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) ret = regmap_read(pca9450->regmap, PCA9450_REG_DEV_ID, &device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) dev_err(&i2c->dev, "Read device id error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) /* Check your board and dts for match the right pmic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) if (((device_id >> 4) != 0x1 && type == PCA9450_TYPE_PCA9450A) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) ((device_id >> 4) != 0x3 && type == PCA9450_TYPE_PCA9450BC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) dev_err(&i2c->dev, "Device id(%x) mismatched\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) device_id >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) for (i = 0; i < pca9450->rcnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) const struct regulator_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) const struct pca9450_regulator_desc *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) r = ®ulator_desc[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) desc = &r->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) config.regmap = pca9450->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) config.dev = pca9450->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) rdev = devm_regulator_register(pca9450->dev, desc, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) ret = PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) dev_err(pca9450->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) "Failed to register regulator(%s): %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) desc->name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) ret = devm_request_threaded_irq(pca9450->dev, pca9450->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) pca9450_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) (IRQF_TRIGGER_FALLING | IRQF_ONESHOT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) "pca9450-irq", pca9450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) dev_err(pca9450->dev, "Failed to request IRQ: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) pca9450->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) /* Unmask all interrupt except PWRON/WDOG/RSVD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_INT1_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) IRQ_VR_FLT1 | IRQ_VR_FLT2 | IRQ_LOWVSYS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) IRQ_THERM_105 | IRQ_THERM_125,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) IRQ_PWRON | IRQ_WDOGB | IRQ_RSVD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) dev_err(&i2c->dev, "Unmask irq error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) /* Clear PRESET_EN bit in BUCK123_DVS to use DVS registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) ret = regmap_clear_bits(pca9450->regmap, PCA9450_REG_BUCK123_DVS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) BUCK123_PRESET_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) dev_err(&i2c->dev, "Failed to clear PRESET_EN bit: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) /* Set reset behavior on assertion of WDOG_B signal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_RESET_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) WDOG_B_CFG_MASK, WDOG_B_CFG_COLD_LDO12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) dev_err(&i2c->dev, "Failed to set WDOG_B reset behavior\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) * The driver uses the LDO5CTRL_H register to control the LDO5 regulator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) * This is only valid if the SD_VSEL input of the PMIC is high. Let's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) * check if the pin is available as GPIO and set it to high.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) pca9450->sd_vsel_gpio = gpiod_get_optional(pca9450->dev, "sd-vsel", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) if (IS_ERR(pca9450->sd_vsel_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) dev_err(&i2c->dev, "Failed to get SD_VSEL GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) dev_info(&i2c->dev, "%s probed.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) type == PCA9450_TYPE_PCA9450A ? "pca9450a" : "pca9450bc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) static const struct of_device_id pca9450_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) .compatible = "nxp,pca9450a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) .data = (void *)PCA9450_TYPE_PCA9450A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) .compatible = "nxp,pca9450b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) .data = (void *)PCA9450_TYPE_PCA9450BC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .compatible = "nxp,pca9450c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .data = (void *)PCA9450_TYPE_PCA9450BC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) MODULE_DEVICE_TABLE(of, pca9450_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) static struct i2c_driver pca9450_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .name = "nxp-pca9450",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) .of_match_table = pca9450_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) .probe = pca9450_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) module_i2c_driver(pca9450_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) MODULE_AUTHOR("Robin Gong <yibin.gong@nxp.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) MODULE_DESCRIPTION("NXP PCA9450 Power Management IC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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