Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // mpq7920.c  - regulator driver for mps mpq7920
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Copyright 2019 Monolithic Power Systems, Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) // Author: Saravanan Sekar <sravanhome@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include "mpq7920.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define MPQ7920_BUCK_VOLT_RANGE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	((MPQ7920_VOLT_MAX - MPQ7920_BUCK_VOLT_MIN)/MPQ7920_VOLT_STEP + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MPQ7920_LDO_VOLT_RANGE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	((MPQ7920_VOLT_MAX - MPQ7920_LDO_VOLT_MIN)/MPQ7920_VOLT_STEP + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define MPQ7920BUCK(_name, _id, _ilim)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	[MPQ7920_BUCK ## _id] = {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		.id = MPQ7920_BUCK ## _id,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		.name = _name,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		.of_match = _name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		.regulators_node = "regulators",			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		.of_parse_cb = mpq7920_parse_cb,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		.ops = &mpq7920_buck_ops,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		.min_uV = MPQ7920_BUCK_VOLT_MIN,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		.uV_step = MPQ7920_VOLT_STEP,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		.n_voltages = MPQ7920_BUCK_VOLT_RANGE,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		.curr_table = _ilim,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		.n_current_limits = ARRAY_SIZE(_ilim),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		.csel_reg = MPQ7920_BUCK ##_id## _REG_C,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		.csel_mask = MPQ7920_MASK_BUCK_ILIM,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		.enable_reg = MPQ7920_REG_REGULATOR_EN,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		.enable_mask = BIT(MPQ7920_REGULATOR_EN_OFFSET -	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 					 MPQ7920_BUCK ## _id),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		.vsel_reg = MPQ7920_BUCK ##_id## _REG_A,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		.vsel_mask = MPQ7920_MASK_VREF,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		.active_discharge_on	= MPQ7920_DISCHARGE_ON,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		.active_discharge_reg	= MPQ7920_BUCK ##_id## _REG_B,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		.active_discharge_mask	= MPQ7920_MASK_DISCHARGE,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		.soft_start_reg		= MPQ7920_BUCK ##_id## _REG_C,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		.soft_start_mask	= MPQ7920_MASK_SOFTSTART,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		.owner			= THIS_MODULE,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define MPQ7920LDO(_name, _id, _ops, _ilim, _ilim_sz, _creg, _cmask)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	[MPQ7920_LDO ## _id] = {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.id = MPQ7920_LDO ## _id,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		.name = _name,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		.of_match = _name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		.regulators_node = "regulators",			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		.ops = _ops,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		.min_uV = MPQ7920_LDO_VOLT_MIN,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		.uV_step = MPQ7920_VOLT_STEP,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		.n_voltages = MPQ7920_LDO_VOLT_RANGE,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		.vsel_reg = MPQ7920_LDO ##_id## _REG_A,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		.vsel_mask = MPQ7920_MASK_VREF,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		.curr_table = _ilim,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		.n_current_limits = _ilim_sz,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.csel_reg = _creg,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		.csel_mask = _cmask,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		.enable_reg = (_id == 1) ? 0 : MPQ7920_REG_REGULATOR_EN,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		.enable_mask = BIT(MPQ7920_REGULATOR_EN_OFFSET -	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 					MPQ7920_LDO ##_id + 1),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		.active_discharge_on	= MPQ7920_DISCHARGE_ON,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		.active_discharge_mask	= MPQ7920_MASK_DISCHARGE,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		.active_discharge_reg	= MPQ7920_LDO ##_id## _REG_B,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		.type			= REGULATOR_VOLTAGE,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		.owner			= THIS_MODULE,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) enum mpq7920_regulators {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	MPQ7920_BUCK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	MPQ7920_BUCK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	MPQ7920_BUCK3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	MPQ7920_BUCK4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	MPQ7920_LDO1, /* LDORTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	MPQ7920_LDO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	MPQ7920_LDO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	MPQ7920_LDO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	MPQ7920_LDO5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	MPQ7920_MAX_REGULATORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) struct mpq7920_regulator_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	struct regulator_desc *rdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static const struct regmap_config mpq7920_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	.max_register = 0x25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Current limits array (in uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)  * ILIM1 & ILIM3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const unsigned int mpq7920_I_limits1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	4600000, 6600000, 7600000, 9300000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* ILIM2 & ILIM4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static const unsigned int mpq7920_I_limits2[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	2700000, 3900000, 5100000, 6100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* LDO4 & LDO5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const unsigned int mpq7920_I_limits3[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	300000, 700000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int mpq7920_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int mpq7920_parse_cb(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 				const struct regulator_desc *rdesc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 				struct regulator_config *config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* RTCLDO not controllable, always ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const struct regulator_ops mpq7920_ldortc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static const struct regulator_ops mpq7920_ldo_wo_current_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.enable			= regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	.set_active_discharge	= regulator_set_active_discharge_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const struct regulator_ops mpq7920_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	.enable			= regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	.set_active_discharge	= regulator_set_active_discharge_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	.get_current_limit	= regulator_get_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	.set_current_limit	= regulator_set_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static const struct regulator_ops mpq7920_buck_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	.enable			= regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	.set_active_discharge	= regulator_set_active_discharge_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.set_soft_start		= regulator_set_soft_start_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.set_ramp_delay		= mpq7920_set_ramp_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static struct regulator_desc mpq7920_regulators_desc[MPQ7920_MAX_REGULATORS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	MPQ7920BUCK("buck1", 1, mpq7920_I_limits1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	MPQ7920BUCK("buck2", 2, mpq7920_I_limits2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	MPQ7920BUCK("buck3", 3, mpq7920_I_limits1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	MPQ7920BUCK("buck4", 4, mpq7920_I_limits2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	MPQ7920LDO("ldortc", 1, &mpq7920_ldortc_ops, NULL, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	MPQ7920LDO("ldo2", 2, &mpq7920_ldo_wo_current_ops, NULL, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	MPQ7920LDO("ldo3", 3, &mpq7920_ldo_wo_current_ops, NULL, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	MPQ7920LDO("ldo4", 4, &mpq7920_ldo_ops, mpq7920_I_limits3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			ARRAY_SIZE(mpq7920_I_limits3), MPQ7920_LDO4_REG_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			MPQ7920_MASK_LDO_ILIM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	MPQ7920LDO("ldo5", 5, &mpq7920_ldo_ops, mpq7920_I_limits3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			ARRAY_SIZE(mpq7920_I_limits3), MPQ7920_LDO5_REG_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 			MPQ7920_MASK_LDO_ILIM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)  * DVS ramp rate BUCK1 to BUCK4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)  * 00-01: Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)  * 10: 8mV/us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)  * 11: 4mV/us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int mpq7920_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	unsigned int ramp_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (ramp_delay > 8000 || ramp_delay < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (ramp_delay <= 4000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		ramp_val = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		ramp_val = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return regmap_update_bits(rdev->regmap, MPQ7920_REG_CTL0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 				  MPQ7920_MASK_DVS_SLEWRATE, ramp_val << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static int mpq7920_parse_cb(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 				const struct regulator_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 				struct regulator_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	uint8_t val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct mpq7920_regulator_info *info = config->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	struct regulator_desc *rdesc = &info->rdesc[desc->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (of_property_read_bool(np, "mps,buck-ovp-disable")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		regmap_update_bits(config->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 				MPQ7920_BUCK1_REG_B + (rdesc->id * 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 				MPQ7920_MASK_OVP, MPQ7920_OVP_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ret = of_property_read_u8(np, "mps,buck-phase-delay", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		regmap_update_bits(config->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 				MPQ7920_BUCK1_REG_C + (rdesc->id * 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 				MPQ7920_MASK_BUCK_PHASE_DEALY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				(val & 3) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	ret = of_property_read_u8(np, "mps,buck-softstart", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		rdesc->soft_start_val_on = (val & 3) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void mpq7920_parse_dt(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		 struct mpq7920_regulator_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	uint8_t freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	np = of_get_child_by_name(np, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	if (!np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		dev_err(dev, "missing 'regulators' subnode in DT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	ret = of_property_read_u8(np, "mps,switch-freq", &freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		regmap_update_bits(info->regmap, MPQ7920_REG_CTL0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 					MPQ7920_MASK_SWITCH_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 					(freq & 3) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int mpq7920_i2c_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	struct mpq7920_regulator_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	struct regulator_config config = { NULL, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	info = devm_kzalloc(dev, sizeof(struct mpq7920_regulator_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 				GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	info->rdesc = mpq7920_regulators_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	regmap = devm_regmap_init_i2c(client, &mpq7920_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		dev_err(dev, "Failed to allocate regmap!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	i2c_set_clientdata(client, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	info->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	if (client->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		mpq7920_parse_dt(&client->dev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	config.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	config.regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	config.driver_data = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	for (i = 0; i < MPQ7920_MAX_REGULATORS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		rdev = devm_regulator_register(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 					       &mpq7920_regulators_desc[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 					       &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 			dev_err(dev, "Failed to register regulator!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static const struct of_device_id mpq7920_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	{ .compatible = "mps,mpq7920"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MODULE_DEVICE_TABLE(of, mpq7920_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static const struct i2c_device_id mpq7920_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	{ "mpq7920", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MODULE_DEVICE_TABLE(i2c, mpq7920_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static struct i2c_driver mpq7920_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		.name = "mpq7920",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		.of_match_table = of_match_ptr(mpq7920_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	.probe_new = mpq7920_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	.id_table = mpq7920_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) module_i2c_driver(mpq7920_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) MODULE_AUTHOR("Saravanan Sekar <sravanhome@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MODULE_DESCRIPTION("MPQ7920 PMIC regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) MODULE_LICENSE("GPL");