Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // mp5416.c  - regulator driver for mps mp5416
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Copyright 2020 Monolithic Power Systems, Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) // Author: Saravanan Sekar <sravanhome@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define MP5416_REG_CTL0			0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define MP5416_REG_CTL1			0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define MP5416_REG_CTL2			0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define MP5416_REG_ILIM			0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define MP5416_REG_BUCK1		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define MP5416_REG_BUCK2		0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MP5416_REG_BUCK3		0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define MP5416_REG_BUCK4		0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define MP5416_REG_LDO1			0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define MP5416_REG_LDO2			0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define MP5416_REG_LDO3			0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define MP5416_REG_LDO4			0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define MP5416_REGULATOR_EN		BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MP5416_MASK_VSET		0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define MP5416_MASK_BUCK1_ILIM		0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define MP5416_MASK_BUCK2_ILIM		0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define MP5416_MASK_BUCK3_ILIM		0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define MP5416_MASK_BUCK4_ILIM		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define MP5416_MASK_DVS_SLEWRATE	0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /* values in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define MP5416_VOLT1_MIN		600000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define MP5416_VOLT1_MAX		2187500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define MP5416_VOLT1_STEP		12500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define MP5416_VOLT2_MIN		800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define MP5416_VOLT2_MAX		3975000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define MP5416_VOLT2_STEP		25000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define MP5416_VOLT1_RANGE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	((MP5416_VOLT1_MAX - MP5416_VOLT1_MIN)/MP5416_VOLT1_STEP + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define MP5416_VOLT2_RANGE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	((MP5416_VOLT2_MAX - MP5416_VOLT2_MIN)/MP5416_VOLT2_STEP + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define MP5416BUCK(_name, _id, _ilim, _dreg, _dval, _vsel)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	[MP5416_BUCK ## _id] = {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		.id = MP5416_BUCK ## _id,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.name = _name,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.of_match = _name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.regulators_node = "regulators",			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		.ops = &mp5416_buck_ops,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		.min_uV = MP5416_VOLT ##_vsel## _MIN,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		.uV_step = MP5416_VOLT ##_vsel## _STEP,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		.n_voltages = MP5416_VOLT ##_vsel## _RANGE,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		.curr_table = _ilim,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		.n_current_limits = ARRAY_SIZE(_ilim),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		.csel_reg = MP5416_REG_ILIM,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		.csel_mask = MP5416_MASK_BUCK ## _id ##_ILIM,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		.vsel_reg = MP5416_REG_BUCK ## _id,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		.vsel_mask = MP5416_MASK_VSET,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		.enable_reg = MP5416_REG_BUCK ## _id,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.enable_mask = MP5416_REGULATOR_EN,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		.active_discharge_on	= _dval,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		.active_discharge_reg	= _dreg,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		.active_discharge_mask	= _dval,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		.owner			= THIS_MODULE,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define MP5416LDO(_name, _id, _dval)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	[MP5416_LDO ## _id] = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		.id = MP5416_LDO ## _id,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		.name = _name,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		.of_match = _name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		.regulators_node = "regulators",			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		.ops = &mp5416_ldo_ops,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		.min_uV = MP5416_VOLT2_MIN,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		.uV_step = MP5416_VOLT2_STEP,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		.n_voltages = MP5416_VOLT2_RANGE,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		.vsel_reg = MP5416_REG_LDO ##_id,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		.vsel_mask = MP5416_MASK_VSET,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		.enable_reg = MP5416_REG_LDO ##_id,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		.enable_mask = MP5416_REGULATOR_EN,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		.active_discharge_on	= _dval,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		.active_discharge_reg	= MP5416_REG_CTL2,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		.active_discharge_mask	= _dval,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		.owner			= THIS_MODULE,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) enum mp5416_regulators {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	MP5416_BUCK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	MP5416_BUCK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	MP5416_BUCK3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	MP5416_BUCK4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	MP5416_LDO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	MP5416_LDO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	MP5416_LDO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	MP5416_LDO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	MP5416_MAX_REGULATORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const struct regmap_config mp5416_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.max_register = 0x0d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* Current limits array (in uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  * ILIM1 & ILIM3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static const unsigned int mp5416_I_limits1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	3800000, 4600000, 5600000, 6800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* ILIM2 & ILIM4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const unsigned int mp5416_I_limits2[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	2200000, 3200000, 4200000, 5200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int mp5416_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const struct regulator_ops mp5416_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	.enable			= regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.set_active_discharge	= regulator_set_active_discharge_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static const struct regulator_ops mp5416_buck_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.enable			= regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	.set_active_discharge	= regulator_set_active_discharge_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	.get_current_limit	= regulator_get_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	.set_current_limit	= regulator_set_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	.set_ramp_delay		= mp5416_set_ramp_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static struct regulator_desc mp5416_regulators_desc[MP5416_MAX_REGULATORS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	MP5416BUCK("buck1", 1, mp5416_I_limits1, MP5416_REG_CTL1, BIT(0), 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	MP5416BUCK("buck2", 2, mp5416_I_limits2, MP5416_REG_CTL1, BIT(1), 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	MP5416BUCK("buck3", 3, mp5416_I_limits1, MP5416_REG_CTL1, BIT(2), 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	MP5416BUCK("buck4", 4, mp5416_I_limits2, MP5416_REG_CTL2, BIT(5), 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	MP5416LDO("ldo1", 1, BIT(4)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	MP5416LDO("ldo2", 2, BIT(3)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	MP5416LDO("ldo3", 3, BIT(2)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	MP5416LDO("ldo4", 4, BIT(1)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)  * DVS ramp rate BUCK1 to BUCK4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)  * 00: 32mV/us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)  * 01: 16mV/us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)  * 10: 8mV/us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)  * 11: 4mV/us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int mp5416_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	unsigned int ramp_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	if (ramp_delay > 32000 || ramp_delay < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (ramp_delay <= 4000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		ramp_val = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	else if (ramp_delay <= 8000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		ramp_val = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	else if (ramp_delay <= 16000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		ramp_val = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		ramp_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	return regmap_update_bits(rdev->regmap, MP5416_REG_CTL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 				  MP5416_MASK_DVS_SLEWRATE, ramp_val << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int mp5416_i2c_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct regulator_config config = { NULL, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	regmap = devm_regmap_init_i2c(client, &mp5416_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		dev_err(dev, "Failed to allocate regmap!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	config.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	config.regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	for (i = 0; i < MP5416_MAX_REGULATORS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		rdev = devm_regulator_register(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 					       &mp5416_regulators_desc[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 					       &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 			dev_err(dev, "Failed to register regulator!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static const struct of_device_id mp5416_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	{ .compatible = "mps,mp5416" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) MODULE_DEVICE_TABLE(of, mp5416_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static const struct i2c_device_id mp5416_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	{ "mp5416", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) MODULE_DEVICE_TABLE(i2c, mp5416_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static struct i2c_driver mp5416_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		.name = "mp5416",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		.of_match_table = of_match_ptr(mp5416_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	.probe_new = mp5416_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	.id_table = mp5416_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) module_i2c_driver(mp5416_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_AUTHOR("Saravanan Sekar <sravanhome@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_DESCRIPTION("MP5416 PMIC regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) MODULE_LICENSE("GPL");