^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // MCP16502 PMIC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Author: Andrei Stefanescu <andrei.stefanescu@microchip.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) // Inspired from tps65086-regulator.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define VDD_LOW_SEL 0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define VDD_HIGH_SEL 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MCP16502_FLT BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MCP16502_ENS BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * The PMIC has four sets of registers corresponding to four power modes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Performance, Active, Low-power, Hibernate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Registers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * Each regulator has a register for each power mode. To access a register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * for a specific regulator and mode BASE_* and OFFSET_* need to be added.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Operating modes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * In order for the PMIC to transition to operating modes it has to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * controlled via GPIO lines called LPM and HPM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * The registers are fully configurable such that you can put all regulators in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * a low-power state while the PMIC is in Active mode. They are supposed to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * configured at startup and then simply transition to/from a global low-power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * state by setting the GPIO lpm pin high/low.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * This driver keeps the PMIC in Active mode, Low-power state is set for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * regulators by enabling/disabling operating mode (FPWM or Auto PFM).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * The PMIC's Low-power and Hibernate modes are used during standby/suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * To enter standby/suspend the PMIC will go to Low-power mode. From there, it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * will transition to Hibernate when the PWRHLD line is set to low by the MPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * This function is useful for iterating over all regulators and accessing their
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * registers in a generic way or accessing a regulator device by its id.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define MCP16502_BASE(i) (((i) + 1) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MCP16502_STAT_BASE(i) ((i) + 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MCP16502_OFFSET_MODE_A 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MCP16502_OFFSET_MODE_LPM 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define MCP16502_OFFSET_MODE_HIB 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define MCP16502_OPMODE_ACTIVE REGULATOR_MODE_NORMAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define MCP16502_OPMODE_LPM REGULATOR_MODE_IDLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define MCP16502_OPMODE_HIB REGULATOR_MODE_STANDBY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define MCP16502_MODE_AUTO_PFM 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define MCP16502_MODE_FPWM BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define MCP16502_VSEL 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define MCP16502_EN BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define MCP16502_MODE BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define MCP16502_MIN_REG 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define MCP16502_MAX_REG 0x65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static unsigned int mcp16502_of_map_mode(unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (mode == REGULATOR_MODE_NORMAL || mode == REGULATOR_MODE_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return REGULATOR_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define MCP16502_REGULATOR(_name, _id, _ranges, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) [_id] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .name = _name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .regulators_node = of_match_ptr("regulators"), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .id = _id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .ops = &(_ops), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .n_voltages = MCP16502_VSEL + 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .linear_ranges = _ranges, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .n_linear_ranges = ARRAY_SIZE(_ranges), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .of_match = of_match_ptr(_name), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .of_map_mode = mcp16502_of_map_mode, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .vsel_reg = (((_id) + 1) << 4), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .vsel_mask = MCP16502_VSEL, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .enable_reg = (((_id) + 1) << 4), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .enable_mask = MCP16502_EN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) BUCK1 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) BUCK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) BUCK3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) BUCK4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) LDO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) LDO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) NUM_REGULATORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * struct mcp16502 - PMIC representation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @rdev: the regulators belonging to this chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * @rmap: regmap to be used for I2C communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * @lpm: LPM GPIO descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct mcp16502 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct gpio_desc *lpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * mcp16502_gpio_set_mode() - set the GPIO corresponding value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * Used to prepare transitioning into hibernate or resuming from it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static void mcp16502_gpio_set_mode(struct mcp16502 *mcp, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) case MCP16502_OPMODE_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) gpiod_set_value(mcp->lpm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) case MCP16502_OPMODE_LPM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) case MCP16502_OPMODE_HIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) gpiod_set_value(mcp->lpm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) pr_err("%s: %d invalid\n", __func__, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * mcp16502_get_reg() - get the PMIC's configuration register for opmode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * @rdev: the regulator whose register we are searching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * @opmode: the PMIC's operating mode ACTIVE, Low-power, Hibernate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int mcp16502_get_reg(struct regulator_dev *rdev, int opmode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) int reg = MCP16502_BASE(rdev_get_id(rdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) switch (opmode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) case MCP16502_OPMODE_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return reg + MCP16502_OFFSET_MODE_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) case MCP16502_OPMODE_LPM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return reg + MCP16502_OFFSET_MODE_LPM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) case MCP16502_OPMODE_HIB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return reg + MCP16502_OFFSET_MODE_HIB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * mcp16502_get_mode() - return the current operating mode of a regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * Note: all functions that are not part of entering/exiting standby/suspend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * use the Active mode registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * Note: this is different from the PMIC's operatig mode, it is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * MODE bit from the regulator's register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static unsigned int mcp16502_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int ret, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) reg = mcp16502_get_reg(rdev, MCP16502_OPMODE_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) ret = regmap_read(rdev->regmap, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) switch (val & MCP16502_MODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) case MCP16502_MODE_FPWM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) case MCP16502_MODE_AUTO_PFM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return REGULATOR_MODE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return REGULATOR_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * _mcp16502_set_mode() - helper for set_mode and set_suspend_mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * @rdev: the regulator for which we are setting the mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * @mode: the regulator's mode (the one from MODE bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * @opmode: the PMIC's operating mode: Active/Low-power/Hibernate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int _mcp16502_set_mode(struct regulator_dev *rdev, unsigned int mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) unsigned int op_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) reg = mcp16502_get_reg(rdev, op_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) val = MCP16502_MODE_FPWM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) case REGULATOR_MODE_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) val = MCP16502_MODE_AUTO_PFM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) reg = regmap_update_bits(rdev->regmap, reg, MCP16502_MODE, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * mcp16502_set_mode() - regulator_ops set_mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int mcp16502_set_mode(struct regulator_dev *rdev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * mcp16502_get_status() - regulator_ops get_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int mcp16502_get_status(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ret = regmap_read(rdev->regmap, MCP16502_STAT_BASE(rdev_get_id(rdev)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (val & MCP16502_FLT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return REGULATOR_STATUS_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) else if (val & MCP16502_ENS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return REGULATOR_STATUS_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) else if (!(val & MCP16502_ENS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return REGULATOR_STATUS_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return REGULATOR_STATUS_UNDEFINED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #ifdef CONFIG_SUSPEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * mcp16502_suspend_get_target_reg() - get the reg of the target suspend PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static int mcp16502_suspend_get_target_reg(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) switch (pm_suspend_target_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) case PM_SUSPEND_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return mcp16502_get_reg(rdev, MCP16502_OPMODE_LPM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) case PM_SUSPEND_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) case PM_SUSPEND_MEM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return mcp16502_get_reg(rdev, MCP16502_OPMODE_HIB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dev_err(&rdev->dev, "invalid suspend target: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) pm_suspend_target_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * mcp16502_set_suspend_voltage() - regulator_ops set_suspend_voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int mcp16502_set_suspend_voltage(struct regulator_dev *rdev, int uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int sel = regulator_map_voltage_linear_range(rdev, uV, uV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int reg = mcp16502_suspend_get_target_reg(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (sel < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return regmap_update_bits(rdev->regmap, reg, MCP16502_VSEL, sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * mcp16502_set_suspend_mode() - regulator_ops set_suspend_mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static int mcp16502_set_suspend_mode(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) switch (pm_suspend_target_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) case PM_SUSPEND_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_LPM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) case PM_SUSPEND_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) case PM_SUSPEND_MEM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return _mcp16502_set_mode(rdev, mode, MCP16502_OPMODE_HIB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dev_err(&rdev->dev, "invalid suspend target: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) pm_suspend_target_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * mcp16502_set_suspend_enable() - regulator_ops set_suspend_enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static int mcp16502_set_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) int reg = mcp16502_suspend_get_target_reg(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return regmap_update_bits(rdev->regmap, reg, MCP16502_EN, MCP16502_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * mcp16502_set_suspend_disable() - regulator_ops set_suspend_disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static int mcp16502_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) int reg = mcp16502_suspend_get_target_reg(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return regmap_update_bits(rdev->regmap, reg, MCP16502_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #endif /* CONFIG_SUSPEND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static const struct regulator_ops mcp16502_buck_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .get_status = mcp16502_get_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .set_mode = mcp16502_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .get_mode = mcp16502_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #ifdef CONFIG_SUSPEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .set_suspend_voltage = mcp16502_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .set_suspend_mode = mcp16502_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .set_suspend_enable = mcp16502_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .set_suspend_disable = mcp16502_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #endif /* CONFIG_SUSPEND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * LDOs cannot change operating modes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static const struct regulator_ops mcp16502_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .get_status = mcp16502_get_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #ifdef CONFIG_SUSPEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .set_suspend_voltage = mcp16502_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .set_suspend_enable = mcp16502_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .set_suspend_disable = mcp16502_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #endif /* CONFIG_SUSPEND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static const struct of_device_id mcp16502_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) { .compatible = "microchip,mcp16502", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) MODULE_DEVICE_TABLE(of, mcp16502_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static const struct linear_range b1l12_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) REGULATOR_LINEAR_RANGE(1200000, VDD_LOW_SEL, VDD_HIGH_SEL, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static const struct linear_range b234_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) REGULATOR_LINEAR_RANGE(600000, VDD_LOW_SEL, VDD_HIGH_SEL, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static const struct regulator_desc mcp16502_desc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /* MCP16502_REGULATOR(_name, _id, ranges, regulator_ops) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) MCP16502_REGULATOR("VDD_IO", BUCK1, b1l12_ranges, mcp16502_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) MCP16502_REGULATOR("VDD_DDR", BUCK2, b234_ranges, mcp16502_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) MCP16502_REGULATOR("VDD_CORE", BUCK3, b234_ranges, mcp16502_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) MCP16502_REGULATOR("VDD_OTHER", BUCK4, b234_ranges, mcp16502_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) MCP16502_REGULATOR("LDO1", LDO1, b1l12_ranges, mcp16502_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) MCP16502_REGULATOR("LDO2", LDO2, b1l12_ranges, mcp16502_ldo_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static const struct regmap_range mcp16502_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) regmap_reg_range(MCP16502_MIN_REG, MCP16502_MAX_REG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static const struct regmap_access_table mcp16502_yes_reg_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .yes_ranges = mcp16502_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .n_yes_ranges = ARRAY_SIZE(mcp16502_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static const struct regmap_config mcp16502_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .max_register = MCP16502_MAX_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .cache_type = REGCACHE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .rd_table = &mcp16502_yes_reg_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .wr_table = &mcp16502_yes_reg_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static int mcp16502_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) struct mcp16502 *mcp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) struct regmap *rmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) config.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) mcp = devm_kzalloc(dev, sizeof(*mcp), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (!mcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) rmap = devm_regmap_init_i2c(client, &mcp16502_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (IS_ERR(rmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) ret = PTR_ERR(rmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) dev_err(dev, "regmap init failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) i2c_set_clientdata(client, mcp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) config.regmap = rmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) config.driver_data = mcp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) mcp->lpm = devm_gpiod_get(dev, "lpm", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (IS_ERR(mcp->lpm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) dev_err(dev, "failed to get lpm pin: %ld\n", PTR_ERR(mcp->lpm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return PTR_ERR(mcp->lpm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) for (i = 0; i < NUM_REGULATORS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) rdev = devm_regulator_register(dev, &mcp16502_desc[i], &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) "failed to register %s regulator %ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) mcp16502_desc[i].name, PTR_ERR(rdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) mcp16502_gpio_set_mode(mcp, MCP16502_OPMODE_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static int mcp16502_suspend_noirq(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) struct mcp16502 *mcp = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) mcp16502_gpio_set_mode(mcp, MCP16502_OPMODE_LPM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static int mcp16502_resume_noirq(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) struct mcp16502 *mcp = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) mcp16502_gpio_set_mode(mcp, MCP16502_OPMODE_ACTIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static const struct dev_pm_ops mcp16502_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mcp16502_suspend_noirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) mcp16502_resume_noirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static const struct i2c_device_id mcp16502_i2c_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) { "mcp16502", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) MODULE_DEVICE_TABLE(i2c, mcp16502_i2c_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static struct i2c_driver mcp16502_drv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .probe = mcp16502_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .name = "mcp16502-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .of_match_table = of_match_ptr(mcp16502_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .pm = &mcp16502_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .id_table = mcp16502_i2c_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) module_i2c_driver(mcp16502_drv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) MODULE_DESCRIPTION("MCP16502 PMIC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) MODULE_AUTHOR("Andrei Stefanescu andrei.stefanescu@microchip.com");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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