^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mc13xxx.h - regulators for the Freescale mc13xxx PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Yong Shen <yong.shen@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __LINUX_REGULATOR_MC13XXX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __LINUX_REGULATOR_MC13XXX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct mc13xxx_regulator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) int enable_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) int vsel_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int vsel_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) int vsel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct mc13xxx_regulator_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct mc13xxx *mc13xxx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u32 powermisc_pwgt_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct mc13xxx_regulator *mc13xxx_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) int num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct regulator_dev *regulators[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) extern int mc13xxx_fixed_regulator_set_voltage(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int min_uV, int max_uV, unsigned *selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) extern int mc13xxx_get_num_regulators_dt(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) extern struct mc13xxx_regulator_init_data *mc13xxx_parse_regulators_dt(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct platform_device *pdev, struct mc13xxx_regulator *regulators,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int num_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static inline int mc13xxx_get_num_regulators_dt(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static inline struct mc13xxx_regulator_init_data *mc13xxx_parse_regulators_dt(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct platform_device *pdev, struct mc13xxx_regulator *regulators,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int num_regulators)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) extern const struct regulator_ops mc13xxx_regulator_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) extern const struct regulator_ops mc13xxx_fixed_regulator_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) [prefix ## _name] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .desc = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .name = #_node, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .n_voltages = ARRAY_SIZE(_voltages), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .volt_table = _voltages, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .ops = &_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .id = prefix ## _name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .reg = prefix ## _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .vsel_reg = prefix ## _vsel_reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .vsel_shift = prefix ## _vsel_reg ## _ ## _name ## VSEL,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) [prefix ## _name] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .desc = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .name = #_node, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .n_voltages = ARRAY_SIZE(_voltages), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .volt_table = _voltages, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .ops = &_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .id = prefix ## _name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .reg = prefix ## _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define MC13xxx_GPO_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) [prefix ## _name] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .desc = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .name = #_node, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .n_voltages = ARRAY_SIZE(_voltages), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .volt_table = _voltages, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .ops = &_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .id = prefix ## _name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .reg = prefix ## _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define MC13xxx_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages, ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define MC13xxx_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages, ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MC13xxx_DEFINE(REGU, _name, _node, _reg, _vsel_reg, _voltages, ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif