Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // max8998.c - Voltage regulator driver for the Maxim 8998
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) //  Copyright (C) 2009-2010 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) //  Kyungmin Park <kyungmin.park@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) //  Marek Szyprowski <m.szyprowski@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mfd/max8998.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/mfd/max8998-private.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) struct max8998_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct device		*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	struct max8998_dev	*iodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	int			num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	u8                      buck1_vol[4]; /* voltages for selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	u8                      buck2_vol[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	unsigned int		buck1_idx; /* index to last changed voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 					   /* value in a set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	unsigned int		buck2_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) static const unsigned int charger_current_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	90000, 380000, 475000, 550000, 570000, 600000, 700000, 800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static int max8998_get_enable_register(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 					int *reg, int *shift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	int ldo = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	switch (ldo) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	case MAX8998_LDO2 ... MAX8998_LDO5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		*reg = MAX8998_REG_ONOFF1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		*shift = 3 - (ldo - MAX8998_LDO2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	case MAX8998_LDO6 ... MAX8998_LDO13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		*reg = MAX8998_REG_ONOFF2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		*shift = 7 - (ldo - MAX8998_LDO6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	case MAX8998_LDO14 ... MAX8998_LDO17:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		*reg = MAX8998_REG_ONOFF3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		*shift = 7 - (ldo - MAX8998_LDO14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	case MAX8998_BUCK1 ... MAX8998_BUCK4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		*reg = MAX8998_REG_ONOFF1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		*shift = 7 - (ldo - MAX8998_BUCK1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	case MAX8998_EN32KHZ_AP ... MAX8998_ENVICHG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		*reg = MAX8998_REG_ONOFF4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		*shift = 7 - (ldo - MAX8998_EN32KHZ_AP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	case MAX8998_ESAFEOUT1 ... MAX8998_ESAFEOUT2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		*reg = MAX8998_REG_CHGR2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		*shift = 7 - (ldo - MAX8998_ESAFEOUT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	case MAX8998_CHARGER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		*reg = MAX8998_REG_CHGR2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		*shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int max8998_ldo_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	int ret, reg, shift = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	ret = max8998_get_enable_register(rdev, &reg, &shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	ret = max8998_read_reg(i2c, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return val & (1 << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static int max8998_ldo_is_enabled_inverted(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	return (!max8998_ldo_is_enabled(rdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int max8998_ldo_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	int reg, shift = 8, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	ret = max8998_get_enable_register(rdev, &reg, &shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return max8998_update_reg(i2c, reg, 1<<shift, 1<<shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int max8998_ldo_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	int reg, shift = 8, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	ret = max8998_get_enable_register(rdev, &reg, &shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	return max8998_update_reg(i2c, reg, 0, 1<<shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int max8998_get_voltage_register(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 				int *_reg, int *_shift, int *_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int ldo = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	int reg, shift = 0, mask = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	switch (ldo) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	case MAX8998_LDO2 ... MAX8998_LDO3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		reg = MAX8998_REG_LDO2_LDO3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		mask = 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		if (ldo == MAX8998_LDO2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			shift = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	case MAX8998_LDO4 ... MAX8998_LDO7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		reg = MAX8998_REG_LDO4 + (ldo - MAX8998_LDO4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	case MAX8998_LDO8 ... MAX8998_LDO9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		reg = MAX8998_REG_LDO8_LDO9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		mask = 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		if (ldo == MAX8998_LDO8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			shift = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 			shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	case MAX8998_LDO10 ... MAX8998_LDO11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		reg = MAX8998_REG_LDO10_LDO11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		if (ldo == MAX8998_LDO10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			shift = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			mask = 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			mask = 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	case MAX8998_LDO12 ... MAX8998_LDO17:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		reg = MAX8998_REG_LDO12 + (ldo - MAX8998_LDO12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	case MAX8998_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		reg = MAX8998_REG_BUCK1_VOLTAGE1 + max8998->buck1_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	case MAX8998_BUCK2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		reg = MAX8998_REG_BUCK2_VOLTAGE1 + max8998->buck2_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	case MAX8998_BUCK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		reg = MAX8998_REG_BUCK3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	case MAX8998_BUCK4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		reg = MAX8998_REG_BUCK4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	*_reg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	*_shift = shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	*_mask = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int max8998_get_voltage_sel(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	int reg, shift = 0, mask, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	ret = max8998_get_voltage_register(rdev, &reg, &shift, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	ret = max8998_read_reg(i2c, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	val >>= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	val &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int max8998_set_voltage_ldo_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 				       unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	int reg, shift = 0, mask, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	ret = max8998_get_voltage_register(rdev, &reg, &shift, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ret = max8998_update_reg(i2c, reg, selector<<shift, mask<<shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static inline void buck1_gpio_set(int gpio1, int gpio2, int v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	gpio_set_value(gpio1, v & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	gpio_set_value(gpio2, (v >> 1) & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static inline void buck2_gpio_set(int gpio, int v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	gpio_set_value(gpio, v & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int max8998_set_voltage_buck_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 					unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	struct max8998_platform_data *pdata = max8998->iodev->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	int buck = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	int reg, shift = 0, mask, ret, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	static u8 buck1_last_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	ret = max8998_get_voltage_register(rdev, &reg, &shift, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	switch (buck) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	case MAX8998_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		dev_dbg(max8998->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			"BUCK1, selector:%d, buck1_vol1:%d, buck1_vol2:%d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 			"buck1_vol3:%d, buck1_vol4:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 			selector, max8998->buck1_vol[0], max8998->buck1_vol[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			max8998->buck1_vol[2], max8998->buck1_vol[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		if (gpio_is_valid(pdata->buck1_set1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		    gpio_is_valid(pdata->buck1_set2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			/* check if requested voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			/* value is already defined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			for (j = 0; j < ARRAY_SIZE(max8998->buck1_vol); j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 				if (max8998->buck1_vol[j] == selector) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 					max8998->buck1_idx = j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 					buck1_gpio_set(pdata->buck1_set1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 						       pdata->buck1_set2, j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 					goto buck1_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			if (pdata->buck_voltage_lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			/* no predefine regulator found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 			max8998->buck1_idx = (buck1_last_val % 2) + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 			dev_dbg(max8998->dev, "max8998->buck1_idx:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 				max8998->buck1_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 			max8998->buck1_vol[max8998->buck1_idx] = selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			ret = max8998_get_voltage_register(rdev, &reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 							   &shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 							   &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 			ret = max8998_write_reg(i2c, reg, selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 			buck1_gpio_set(pdata->buck1_set1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 				       pdata->buck1_set2, max8998->buck1_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			buck1_last_val++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) buck1_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 			dev_dbg(max8998->dev, "%s: SET1:%d, SET2:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 				i2c->name, gpio_get_value(pdata->buck1_set1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 				gpio_get_value(pdata->buck1_set2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 			ret = max8998_write_reg(i2c, reg, selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	case MAX8998_BUCK2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		dev_dbg(max8998->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			"BUCK2, selector:%d buck2_vol1:%d, buck2_vol2:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			selector, max8998->buck2_vol[0], max8998->buck2_vol[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		if (gpio_is_valid(pdata->buck2_set3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			/* check if requested voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 			/* value is already defined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 			for (j = 0; j < ARRAY_SIZE(max8998->buck2_vol); j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 				if (max8998->buck2_vol[j] == selector) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 					max8998->buck2_idx = j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 					buck2_gpio_set(pdata->buck2_set3, j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 					goto buck2_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			if (pdata->buck_voltage_lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 				return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 			max8998_get_voltage_register(rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 					&reg, &shift, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 			ret = max8998_write_reg(i2c, reg, selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 			max8998->buck2_vol[max8998->buck2_idx] = selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 			buck2_gpio_set(pdata->buck2_set3, max8998->buck2_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) buck2_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 			dev_dbg(max8998->dev, "%s: SET3:%d\n", i2c->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 				gpio_get_value(pdata->buck2_set3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 			ret = max8998_write_reg(i2c, reg, selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	case MAX8998_BUCK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	case MAX8998_BUCK4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		ret = max8998_update_reg(i2c, reg, selector<<shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 					 mask<<shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static int max8998_set_voltage_buck_time_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 					     unsigned int old_selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 					     unsigned int new_selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	int buck = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	u8 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	int difference, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	if (buck < MAX8998_BUCK1 || buck > MAX8998_BUCK4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	/* Voltage stabilization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	ret = max8998_read_reg(i2c, MAX8998_REG_ONOFF4, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	/* lp3974 hasn't got ENRAMP bit - ramp is assumed as true */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	/* MAX8998 has ENRAMP bit implemented, so test it*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	if (max8998->iodev->type == TYPE_MAX8998 && !(val & MAX8998_ENRAMP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	difference = (new_selector - old_selector) * rdev->desc->uV_step / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	if (difference > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		return DIV_ROUND_UP(difference, (val & 0x0f) + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static int max8998_set_current_limit(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 				     int min_uA, int max_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	unsigned int n_currents = rdev->desc->n_current_limits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	int i, sel = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	if (n_currents == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	if (rdev->desc->curr_table) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		const unsigned int *curr_table = rdev->desc->curr_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		bool ascend = curr_table[n_currents - 1] > curr_table[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		/* search for closest to maximum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		if (ascend) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 			for (i = n_currents - 1; i >= 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 				if (min_uA <= curr_table[i] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 				    curr_table[i] <= max_uA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 					sel = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 					break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			for (i = 0; i < n_currents; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 				if (min_uA <= curr_table[i] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 				    curr_table[i] <= max_uA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 					sel = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 					break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	if (sel < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	sel <<= ffs(rdev->desc->csel_mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	return max8998_update_reg(i2c, rdev->desc->csel_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 				  sel, rdev->desc->csel_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static int max8998_get_current_limit(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	struct i2c_client *i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	ret = max8998_read_reg(i2c, rdev->desc->csel_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	val &= rdev->desc->csel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	val >>= ffs(rdev->desc->csel_mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	if (rdev->desc->curr_table) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 		if (val >= rdev->desc->n_current_limits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 		return rdev->desc->curr_table[val];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static const struct regulator_ops max8998_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	.is_enabled		= max8998_ldo_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	.enable			= max8998_ldo_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	.disable		= max8998_ldo_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	.get_voltage_sel	= max8998_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	.set_voltage_sel	= max8998_set_voltage_ldo_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static const struct regulator_ops max8998_buck_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	.is_enabled		= max8998_ldo_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	.enable			= max8998_ldo_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	.disable		= max8998_ldo_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	.get_voltage_sel	= max8998_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	.set_voltage_sel	= max8998_set_voltage_buck_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	.set_voltage_time_sel	= max8998_set_voltage_buck_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static const struct regulator_ops max8998_charger_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	.set_current_limit	= max8998_set_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	.get_current_limit	= max8998_get_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	.is_enabled		= max8998_ldo_is_enabled_inverted,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	/* Swapped as register is inverted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	.enable			= max8998_ldo_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	.disable		= max8998_ldo_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static const struct regulator_ops max8998_others_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	.is_enabled		= max8998_ldo_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	.enable			= max8998_ldo_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	.disable		= max8998_ldo_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #define MAX8998_LINEAR_REG(_name, _ops, _min, _step, _max) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	{ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 		.name = #_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 		.id = MAX8998_##_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		.ops = _ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 		.min_uV = (_min), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 		.uV_step = (_step), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 		.n_voltages = ((_max) - (_min)) / (_step) + 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 		.type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		.owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) #define MAX8998_CURRENT_REG(_name, _ops, _table, _reg, _mask) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	{ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 		.name = #_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 		.id = MAX8998_##_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 		.ops = _ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 		.curr_table = _table, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 		.n_current_limits = ARRAY_SIZE(_table), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 		.csel_reg = _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 		.csel_mask = _mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 		.type = REGULATOR_CURRENT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 		.owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #define MAX8998_OTHERS_REG(_name, _id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	{ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 		.name = #_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 		.id = _id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 		.ops = &max8998_others_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 		.type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 		.owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static const struct regulator_desc regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	MAX8998_LINEAR_REG(LDO2, &max8998_ldo_ops, 800000, 50000, 1300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	MAX8998_LINEAR_REG(LDO3, &max8998_ldo_ops, 800000, 50000, 1300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	MAX8998_LINEAR_REG(LDO4, &max8998_ldo_ops, 1600000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	MAX8998_LINEAR_REG(LDO5, &max8998_ldo_ops, 1600000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	MAX8998_LINEAR_REG(LDO6, &max8998_ldo_ops, 1600000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	MAX8998_LINEAR_REG(LDO7, &max8998_ldo_ops, 1600000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	MAX8998_LINEAR_REG(LDO8, &max8998_ldo_ops, 3000000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	MAX8998_LINEAR_REG(LDO9, &max8998_ldo_ops, 2800000, 100000, 3100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	MAX8998_LINEAR_REG(LDO10, &max8998_ldo_ops, 950000, 50000, 1300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	MAX8998_LINEAR_REG(LDO11, &max8998_ldo_ops, 1600000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	MAX8998_LINEAR_REG(LDO12, &max8998_ldo_ops, 800000, 100000, 3300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	MAX8998_LINEAR_REG(LDO13, &max8998_ldo_ops, 800000, 100000, 3300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	MAX8998_LINEAR_REG(LDO14, &max8998_ldo_ops, 1200000, 100000, 3300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	MAX8998_LINEAR_REG(LDO15, &max8998_ldo_ops, 1200000, 100000, 3300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	MAX8998_LINEAR_REG(LDO16, &max8998_ldo_ops, 1600000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	MAX8998_LINEAR_REG(LDO17, &max8998_ldo_ops, 1600000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	MAX8998_LINEAR_REG(BUCK1, &max8998_buck_ops, 750000, 25000, 1525000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	MAX8998_LINEAR_REG(BUCK2, &max8998_buck_ops, 750000, 25000, 1525000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	MAX8998_LINEAR_REG(BUCK3, &max8998_buck_ops, 1600000, 100000, 3600000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	MAX8998_LINEAR_REG(BUCK4, &max8998_buck_ops, 800000, 100000, 2300000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	MAX8998_OTHERS_REG(EN32KHz-AP, MAX8998_EN32KHZ_AP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	MAX8998_OTHERS_REG(EN32KHz-CP, MAX8998_EN32KHZ_CP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	MAX8998_OTHERS_REG(ENVICHG, MAX8998_ENVICHG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	MAX8998_OTHERS_REG(ESAFEOUT1, MAX8998_ESAFEOUT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	MAX8998_OTHERS_REG(ESAFEOUT2, MAX8998_ESAFEOUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	MAX8998_CURRENT_REG(CHARGER, &max8998_charger_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 			    charger_current_table, MAX8998_REG_CHGR1, 0x7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static int max8998_pmic_dt_parse_dvs_gpio(struct max8998_dev *iodev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 			struct max8998_platform_data *pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 			struct device_node *pmic_np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	int gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 	gpio = of_get_named_gpio(pmic_np, "max8998,pmic-buck1-dvs-gpios", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	if (!gpio_is_valid(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 		dev_err(iodev->dev, "invalid buck1 gpio[0]: %d\n", gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	pdata->buck1_set1 = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	gpio = of_get_named_gpio(pmic_np, "max8998,pmic-buck1-dvs-gpios", 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	if (!gpio_is_valid(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 		dev_err(iodev->dev, "invalid buck1 gpio[1]: %d\n", gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	pdata->buck1_set2 = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	gpio = of_get_named_gpio(pmic_np, "max8998,pmic-buck2-dvs-gpio", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	if (!gpio_is_valid(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 		dev_err(iodev->dev, "invalid buck 2 gpio: %d\n", gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 	pdata->buck2_set3 = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) static int max8998_pmic_dt_parse_pdata(struct max8998_dev *iodev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 					struct max8998_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 	struct device_node *pmic_np = iodev->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	struct device_node *regulators_np, *reg_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 	struct max8998_regulator_data *rdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	regulators_np = of_get_child_by_name(pmic_np, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 	if (!regulators_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 		dev_err(iodev->dev, "could not find regulators sub-node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	/* count the number of regulators to be supported in pmic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	pdata->num_regulators = of_get_child_count(regulators_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	rdata = devm_kcalloc(iodev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 			     pdata->num_regulators, sizeof(*rdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 			     GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 	if (!rdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 		of_node_put(regulators_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	pdata->regulators = rdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 	for (i = 0; i < ARRAY_SIZE(regulators); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 		reg_np = of_get_child_by_name(regulators_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 							regulators[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 		if (!reg_np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 		rdata->id = regulators[i].id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 		rdata->initdata = of_get_regulator_init_data(iodev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 							     reg_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 							     &regulators[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 		rdata->reg_node = reg_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 		++rdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	pdata->num_regulators = rdata - pdata->regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 	of_node_put(reg_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 	of_node_put(regulators_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 	ret = max8998_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 	if (of_find_property(pmic_np, "max8998,pmic-buck-voltage-lock", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 		pdata->buck_voltage_lock = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 	ret = of_property_read_u32(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 					"max8998,pmic-buck1-default-dvs-idx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 					&pdata->buck1_default_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 	if (!ret && pdata->buck1_default_idx >= 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 		pdata->buck1_default_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 		dev_warn(iodev->dev, "invalid value for default dvs index, using 0 instead\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 	ret = of_property_read_u32(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 					"max8998,pmic-buck2-default-dvs-idx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 					&pdata->buck2_default_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 	if (!ret && pdata->buck2_default_idx >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 		pdata->buck2_default_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 		dev_warn(iodev->dev, "invalid value for default dvs index, using 0 instead\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 	ret = of_property_read_u32_array(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) 					"max8998,pmic-buck1-dvs-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 					pdata->buck1_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 					ARRAY_SIZE(pdata->buck1_voltage));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) 		dev_err(iodev->dev, "buck1 voltages not specified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 	ret = of_property_read_u32_array(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 					"max8998,pmic-buck2-dvs-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 					pdata->buck2_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 					ARRAY_SIZE(pdata->buck2_voltage));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 		dev_err(iodev->dev, "buck2 voltages not specified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static int max8998_pmic_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 	struct max8998_dev *iodev = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 	struct max8998_platform_data *pdata = iodev->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 	struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 	struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 	struct max8998_data *max8998;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 	struct i2c_client *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 	unsigned int v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 	if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 		dev_err(pdev->dev.parent, "No platform init data supplied\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 	if (IS_ENABLED(CONFIG_OF) && iodev->dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 		ret = max8998_pmic_dt_parse_pdata(iodev, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 	max8998 = devm_kzalloc(&pdev->dev, sizeof(struct max8998_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) 			       GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 	if (!max8998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 	max8998->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 	max8998->iodev = iodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) 	max8998->num_regulators = pdata->num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 	platform_set_drvdata(pdev, max8998);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) 	i2c = max8998->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) 	max8998->buck1_idx = pdata->buck1_default_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 	max8998->buck2_idx = pdata->buck2_default_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 	/* NOTE: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) 	/* For unused GPIO NOT marked as -1 (thereof equal to 0)  WARN_ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 	/* will be displayed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 	/* Check if MAX8998 voltage selection GPIOs are defined */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 	if (gpio_is_valid(pdata->buck1_set1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 	    gpio_is_valid(pdata->buck1_set2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 		/* Check if SET1 is not equal to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 		if (!pdata->buck1_set1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 			dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 				"MAX8998 SET1 GPIO defined as 0 !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 			WARN_ON(!pdata->buck1_set1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 			return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 		/* Check if SET2 is not equal to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) 		if (!pdata->buck1_set2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 			dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) 				"MAX8998 SET2 GPIO defined as 0 !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) 			WARN_ON(!pdata->buck1_set2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) 			return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 		gpio_request(pdata->buck1_set1, "MAX8998 BUCK1_SET1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 		gpio_direction_output(pdata->buck1_set1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) 				      max8998->buck1_idx & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 		gpio_request(pdata->buck1_set2, "MAX8998 BUCK1_SET2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) 		gpio_direction_output(pdata->buck1_set2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 				      (max8998->buck1_idx >> 1) & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 		/* Set predefined values for BUCK1 registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 		for (v = 0; v < ARRAY_SIZE(pdata->buck1_voltage); ++v) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) 			int index = MAX8998_BUCK1 - MAX8998_LDO2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 			i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 			while (regulators[index].min_uV +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 			       regulators[index].uV_step * i
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) 			       < pdata->buck1_voltage[v])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 				i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) 			max8998->buck1_vol[v] = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) 			ret = max8998_write_reg(i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) 					MAX8998_REG_BUCK1_VOLTAGE1 + v, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 			if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) 	if (gpio_is_valid(pdata->buck2_set3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) 		/* Check if SET3 is not equal to 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) 		if (!pdata->buck2_set3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 			dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) 				"MAX8998 SET3 GPIO defined as 0 !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) 			WARN_ON(!pdata->buck2_set3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 			return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) 		gpio_request(pdata->buck2_set3, "MAX8998 BUCK2_SET3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) 		gpio_direction_output(pdata->buck2_set3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) 				      max8998->buck2_idx & 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) 		/* Set predefined values for BUCK2 registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) 		for (v = 0; v < ARRAY_SIZE(pdata->buck2_voltage); ++v) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 			int index = MAX8998_BUCK2 - MAX8998_LDO2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 			i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 			while (regulators[index].min_uV +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 			       regulators[index].uV_step * i
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) 			       < pdata->buck2_voltage[v])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) 				i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) 			max8998->buck2_vol[v] = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) 			ret = max8998_write_reg(i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) 					MAX8998_REG_BUCK2_VOLTAGE1 + v, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) 			if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) 	for (i = 0; i < pdata->num_regulators; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) 		int index = pdata->regulators[i].id - MAX8998_LDO2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) 		config.dev = max8998->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) 		config.of_node = pdata->regulators[i].reg_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 		config.init_data = pdata->regulators[i].initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) 		config.driver_data = max8998;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) 		rdev = devm_regulator_register(&pdev->dev, &regulators[index],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) 					       &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) 		if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) 			ret = PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) 			dev_err(max8998->dev, "regulator %s init failed (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) 						regulators[index].name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) static const struct platform_device_id max8998_pmic_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) 	{ "max8998-pmic", TYPE_MAX8998 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) 	{ "lp3974-pmic", TYPE_LP3974 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) MODULE_DEVICE_TABLE(platform, max8998_pmic_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) static struct platform_driver max8998_pmic_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) 		.name = "max8998-pmic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) 	.probe = max8998_pmic_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) 	.id_table = max8998_pmic_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) static int __init max8998_pmic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) 	return platform_driver_register(&max8998_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) subsys_initcall(max8998_pmic_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) static void __exit max8998_pmic_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) 	platform_driver_unregister(&max8998_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) module_exit(max8998_pmic_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) MODULE_DESCRIPTION("MAXIM 8998 voltage regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) MODULE_LICENSE("GPL");