^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // max8997.c - Regulator driver for the Maxim 8997/8966
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (C) 2011 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // MyungJoo Ham <myungjoo.ham@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // This driver is based on max8998.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mfd/max8997.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/max8997-private.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct max8997_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct max8997_dev *iodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) int num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int ramp_delay; /* in mV/us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) bool buck1_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) bool buck2_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) bool buck5_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 buck1_vol[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u8 buck2_vol[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u8 buck5_vol[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int buck125_gpios[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int buck125_gpioindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) bool ignore_gpiodvs_side_effect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u8 saved_states[MAX8997_REG_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static const unsigned int safeoutvolt[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 4850000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 4900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 4950000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static inline void max8997_set_gpio(struct max8997_data *max8997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int set3 = (max8997->buck125_gpioindex) & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int set2 = ((max8997->buck125_gpioindex) >> 1) & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int set1 = ((max8997->buck125_gpioindex) >> 2) & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) gpio_set_value(max8997->buck125_gpios[0], set1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) gpio_set_value(max8997->buck125_gpios[1], set2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) gpio_set_value(max8997->buck125_gpios[2], set3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct voltage_map_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Voltage maps in uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static const struct voltage_map_desc ldo_voltage_map_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .min = 800000, .max = 3950000, .step = 50000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }; /* LDO1 ~ 18, 21 all */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static const struct voltage_map_desc buck1245_voltage_map_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .min = 650000, .max = 2225000, .step = 25000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }; /* Buck1, 2, 4, 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static const struct voltage_map_desc buck37_voltage_map_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .min = 750000, .max = 3900000, .step = 50000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }; /* Buck3, 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* current map in uA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static const struct voltage_map_desc charger_current_map_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .min = 200000, .max = 950000, .step = 50000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static const struct voltage_map_desc topoff_current_map_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .min = 50000, .max = 200000, .step = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static const struct voltage_map_desc *reg_voltage_map[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) [MAX8997_LDO1] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) [MAX8997_LDO2] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) [MAX8997_LDO3] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) [MAX8997_LDO4] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) [MAX8997_LDO5] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) [MAX8997_LDO6] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) [MAX8997_LDO7] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) [MAX8997_LDO8] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) [MAX8997_LDO9] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) [MAX8997_LDO10] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) [MAX8997_LDO11] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) [MAX8997_LDO12] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) [MAX8997_LDO13] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) [MAX8997_LDO14] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) [MAX8997_LDO15] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) [MAX8997_LDO16] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) [MAX8997_LDO17] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) [MAX8997_LDO18] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) [MAX8997_LDO21] = &ldo_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) [MAX8997_BUCK1] = &buck1245_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) [MAX8997_BUCK2] = &buck1245_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) [MAX8997_BUCK3] = &buck37_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) [MAX8997_BUCK4] = &buck1245_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) [MAX8997_BUCK5] = &buck1245_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) [MAX8997_BUCK6] = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) [MAX8997_BUCK7] = &buck37_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) [MAX8997_EN32KHZ_AP] = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) [MAX8997_EN32KHZ_CP] = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) [MAX8997_ENVICHG] = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) [MAX8997_ESAFEOUT1] = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) [MAX8997_ESAFEOUT2] = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) [MAX8997_CHARGER_CV] = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) [MAX8997_CHARGER] = &charger_current_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) [MAX8997_CHARGER_TOPOFF] = &topoff_current_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int max8997_list_voltage_charger_cv(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned int selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (rid != MAX8997_CHARGER_CV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) switch (selector) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) case 0x00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 4200000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) case 0x01 ... 0x0E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return 4000000 + 20000 * (selector - 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) case 0x0F:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return 4350000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int max8997_list_voltage(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) unsigned int selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) const struct voltage_map_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (rid < 0 || rid >= ARRAY_SIZE(reg_voltage_map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) desc = reg_voltage_map[rid];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) val = desc->min + desc->step * selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (val > desc->max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int max8997_get_enable_register(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int *reg, int *mask, int *pattern)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) case MAX8997_LDO1 ... MAX8997_LDO21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) *reg = MAX8997_REG_LDO1CTRL + (rid - MAX8997_LDO1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) *mask = 0xC0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) *pattern = 0xC0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) case MAX8997_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) *reg = MAX8997_REG_BUCK1CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) *mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) *pattern = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) case MAX8997_BUCK2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) *reg = MAX8997_REG_BUCK2CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) *mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) *pattern = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) case MAX8997_BUCK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) *reg = MAX8997_REG_BUCK3CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) *mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) *pattern = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) case MAX8997_BUCK4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) *reg = MAX8997_REG_BUCK4CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) *mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) *pattern = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) case MAX8997_BUCK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) *reg = MAX8997_REG_BUCK5CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) *mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) *pattern = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) case MAX8997_BUCK6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) *reg = MAX8997_REG_BUCK6CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) *mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) *pattern = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) case MAX8997_BUCK7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) *reg = MAX8997_REG_BUCK7CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) *mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) *pattern = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) case MAX8997_EN32KHZ_AP ... MAX8997_EN32KHZ_CP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) *reg = MAX8997_REG_MAINCON1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *mask = 0x01 << (rid - MAX8997_EN32KHZ_AP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) *pattern = 0x01 << (rid - MAX8997_EN32KHZ_AP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) case MAX8997_ENVICHG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) *reg = MAX8997_REG_MBCCTRL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) *mask = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) *pattern = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) case MAX8997_ESAFEOUT1 ... MAX8997_ESAFEOUT2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) *reg = MAX8997_REG_SAFEOUTCTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) *mask = 0x40 << (rid - MAX8997_ESAFEOUT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) *pattern = 0x40 << (rid - MAX8997_ESAFEOUT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) case MAX8997_CHARGER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) *reg = MAX8997_REG_MBCCTRL2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) *mask = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) *pattern = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* Not controllable or not exists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int max8997_reg_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct i2c_client *i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) int ret, reg, mask, pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) ret = max8997_get_enable_register(rdev, ®, &mask, &pattern);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ret = max8997_read_reg(i2c, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return (val & mask) == pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int max8997_reg_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct i2c_client *i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int ret, reg, mask, pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ret = max8997_get_enable_register(rdev, ®, &mask, &pattern);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return max8997_update_reg(i2c, reg, pattern, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static int max8997_reg_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct i2c_client *i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) int ret, reg, mask, pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ret = max8997_get_enable_register(rdev, ®, &mask, &pattern);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return max8997_update_reg(i2c, reg, ~pattern, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int max8997_get_voltage_register(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) int *_reg, int *_shift, int *_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) int reg, shift = 0, mask = 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) case MAX8997_LDO1 ... MAX8997_LDO21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) reg = MAX8997_REG_LDO1CTRL + (rid - MAX8997_LDO1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) case MAX8997_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) reg = MAX8997_REG_BUCK1DVS1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (max8997->buck1_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) reg += max8997->buck125_gpioindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) case MAX8997_BUCK2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) reg = MAX8997_REG_BUCK2DVS1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (max8997->buck2_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) reg += max8997->buck125_gpioindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) case MAX8997_BUCK3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) reg = MAX8997_REG_BUCK3DVS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) case MAX8997_BUCK4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) reg = MAX8997_REG_BUCK4DVS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) case MAX8997_BUCK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) reg = MAX8997_REG_BUCK5DVS1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (max8997->buck5_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) reg += max8997->buck125_gpioindex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) case MAX8997_BUCK7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) reg = MAX8997_REG_BUCK7DVS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) case MAX8997_ESAFEOUT1 ... MAX8997_ESAFEOUT2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) reg = MAX8997_REG_SAFEOUTCTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) shift = (rid == MAX8997_ESAFEOUT2) ? 2 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) mask = 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) case MAX8997_CHARGER_CV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) reg = MAX8997_REG_MBCCTRL3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) mask = 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) case MAX8997_CHARGER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) reg = MAX8997_REG_MBCCTRL4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) mask = 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) case MAX8997_CHARGER_TOPOFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) reg = MAX8997_REG_MBCCTRL5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) mask = 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) *_reg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) *_shift = shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) *_mask = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static int max8997_get_voltage_sel(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) struct i2c_client *i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) int reg, shift, mask, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ret = max8997_get_voltage_register(rdev, ®, &shift, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ret = max8997_read_reg(i2c, reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) val >>= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) val &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static inline int max8997_get_voltage_proper_val(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) const struct voltage_map_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) int min_vol, int max_vol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (max_vol < desc->min || min_vol > desc->max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (min_vol < desc->min)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) min_vol = desc->min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) i = DIV_ROUND_UP(min_vol - desc->min, desc->step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (desc->min + desc->step * i > max_vol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static int max8997_set_voltage_charger_cv(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) int min_uV, int max_uV, unsigned *selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct i2c_client *i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) int lb, ub;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) int reg, shift = 0, mask, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) u8 val = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (rid != MAX8997_CHARGER_CV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) ret = max8997_get_voltage_register(rdev, ®, &shift, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (max_uV < 4000000 || min_uV > 4350000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (min_uV <= 4000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) val = 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) else if (min_uV <= 4200000 && max_uV >= 4200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) val = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) lb = (min_uV - 4000001) / 20000 + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) ub = (max_uV - 4000000) / 20000 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (lb > ub)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (lb < 0xf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) val = lb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (ub >= 0xf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) val = 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) *selector = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) ret = max8997_update_reg(i2c, reg, val << shift, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * For LDO1 ~ LDO21, BUCK1~5, BUCK7, CHARGER, CHARGER_TOPOFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * BUCK1, 2, and 5 are available if they are not controlled by gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static int max8997_set_voltage_ldobuck(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) int min_uV, int max_uV, unsigned *selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) struct i2c_client *i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) const struct voltage_map_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) int i, reg, shift, mask, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) case MAX8997_LDO1 ... MAX8997_LDO21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) case MAX8997_BUCK1 ... MAX8997_BUCK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) case MAX8997_BUCK6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) case MAX8997_BUCK7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) case MAX8997_CHARGER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) case MAX8997_CHARGER_TOPOFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) desc = reg_voltage_map[rid];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) i = max8997_get_voltage_proper_val(desc, min_uV, max_uV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (i < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) ret = max8997_get_voltage_register(rdev, ®, &shift, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) ret = max8997_update_reg(i2c, reg, i << shift, mask << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) *selector = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static int max8997_set_voltage_buck_time_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) unsigned int old_selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) unsigned int new_selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) const struct voltage_map_desc *desc = reg_voltage_map[rid];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* Delay is required only if the voltage is increasing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (old_selector >= new_selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) /* No need to delay if gpio_dvs_mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) case MAX8997_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (max8997->buck1_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) case MAX8997_BUCK2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (max8997->buck2_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) case MAX8997_BUCK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if (max8997->buck5_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) case MAX8997_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) case MAX8997_BUCK2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) case MAX8997_BUCK4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) case MAX8997_BUCK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return DIV_ROUND_UP(desc->step * (new_selector - old_selector),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) max8997->ramp_delay * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * Assess the damage on the voltage setting of BUCK1,2,5 by the change.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * When GPIO-DVS mode is used for multiple bucks, changing the voltage value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * of one of the bucks may affect that of another buck, which is the side
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * effect of the change (set_voltage). This function examines the GPIO-DVS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * configurations and checks whether such side-effect exists.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static int max8997_assess_side_effect(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) u8 new_val, int *best)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) u8 *buckx_val[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) bool buckx_gpiodvs[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) int side_effect[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) int min_side_effect = INT_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) *best = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) case MAX8997_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) rid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) case MAX8997_BUCK2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) rid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) case MAX8997_BUCK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) rid = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) buckx_val[0] = max8997->buck1_vol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) buckx_val[1] = max8997->buck2_vol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) buckx_val[2] = max8997->buck5_vol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) buckx_gpiodvs[0] = max8997->buck1_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) buckx_gpiodvs[1] = max8997->buck2_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) buckx_gpiodvs[2] = max8997->buck5_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) int others;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (new_val != (buckx_val[rid])[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) side_effect[i] = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) side_effect[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) for (others = 0; others < 3; others++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) int diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (others == rid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (buckx_gpiodvs[others] == false)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) continue; /* Not affected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) diff = (buckx_val[others])[i] -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) (buckx_val[others])[max8997->buck125_gpioindex];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (diff > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) side_effect[i] += diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) else if (diff < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) side_effect[i] -= diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (side_effect[i] == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) *best = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) return 0; /* NO SIDE EFFECT! Use This! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) if (side_effect[i] < min_side_effect) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) min_side_effect = side_effect[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) *best = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (*best == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) return side_effect[*best];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) * For Buck 1 ~ 5 and 7. If it is not controlled by GPIO, this calls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) * max8997_set_voltage_ldobuck to do the job.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static int max8997_set_voltage_buck(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) int min_uV, int max_uV, unsigned *selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) const struct voltage_map_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) int new_val, new_idx, damage, tmp_val, tmp_idx, tmp_dmg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) bool gpio_dvs_mode = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (rid < MAX8997_BUCK1 || rid > MAX8997_BUCK7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) switch (rid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) case MAX8997_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (max8997->buck1_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) gpio_dvs_mode = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) case MAX8997_BUCK2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (max8997->buck2_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) gpio_dvs_mode = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) case MAX8997_BUCK5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) if (max8997->buck5_gpiodvs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) gpio_dvs_mode = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (!gpio_dvs_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) return max8997_set_voltage_ldobuck(rdev, min_uV, max_uV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) selector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) desc = reg_voltage_map[rid];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) new_val = max8997_get_voltage_proper_val(desc, min_uV, max_uV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) if (new_val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) return new_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) tmp_dmg = INT_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) tmp_idx = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) tmp_val = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) damage = max8997_assess_side_effect(rdev, new_val, &new_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (damage == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (tmp_dmg > damage) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) tmp_idx = new_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) tmp_val = new_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) tmp_dmg = damage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) new_val++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) } while (desc->min + desc->step * new_val <= desc->max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) new_idx = tmp_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) new_val = tmp_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (max8997->ignore_gpiodvs_side_effect == false)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) dev_warn(&rdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) "MAX8997 GPIO-DVS Side Effect Warning: GPIO SET: %d -> %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) max8997->buck125_gpioindex, tmp_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) if (new_idx < 0 || new_val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) max8997->buck125_gpioindex = new_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) max8997_set_gpio(max8997);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) *selector = new_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) /* For SAFEOUT1 and SAFEOUT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) static int max8997_set_voltage_safeout_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) struct i2c_client *i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) int reg, shift = 0, mask, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (rid != MAX8997_ESAFEOUT1 && rid != MAX8997_ESAFEOUT2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) ret = max8997_get_voltage_register(rdev, ®, &shift, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return max8997_update_reg(i2c, reg, selector << shift, mask << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) static int max8997_reg_disable_suspend(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) struct max8997_data *max8997 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) struct i2c_client *i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) int ret, reg, mask, pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) ret = max8997_get_enable_register(rdev, ®, &mask, &pattern);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) max8997_read_reg(i2c, reg, &max8997->saved_states[rid]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (rid == MAX8997_LDO1 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) rid == MAX8997_LDO10 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) rid == MAX8997_LDO21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) dev_dbg(&rdev->dev, "Conditional Power-Off for %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) rdev->desc->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return max8997_update_reg(i2c, reg, 0x40, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) dev_dbg(&rdev->dev, "Full Power-Off for %s (%xh -> %xh)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) rdev->desc->name, max8997->saved_states[rid] & mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) (~pattern) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) return max8997_update_reg(i2c, reg, ~pattern, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const struct regulator_ops max8997_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .list_voltage = max8997_list_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .is_enabled = max8997_reg_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .enable = max8997_reg_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .disable = max8997_reg_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .get_voltage_sel = max8997_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .set_voltage = max8997_set_voltage_ldobuck,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .set_suspend_disable = max8997_reg_disable_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static const struct regulator_ops max8997_buck_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .list_voltage = max8997_list_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) .is_enabled = max8997_reg_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .enable = max8997_reg_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .disable = max8997_reg_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) .get_voltage_sel = max8997_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) .set_voltage = max8997_set_voltage_buck,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .set_voltage_time_sel = max8997_set_voltage_buck_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .set_suspend_disable = max8997_reg_disable_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static const struct regulator_ops max8997_fixedvolt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .list_voltage = max8997_list_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .is_enabled = max8997_reg_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .enable = max8997_reg_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) .disable = max8997_reg_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) .set_suspend_disable = max8997_reg_disable_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) static const struct regulator_ops max8997_safeout_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) .list_voltage = regulator_list_voltage_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .is_enabled = max8997_reg_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) .enable = max8997_reg_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) .disable = max8997_reg_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) .get_voltage_sel = max8997_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) .set_voltage_sel = max8997_set_voltage_safeout_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) .set_suspend_disable = max8997_reg_disable_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) static const struct regulator_ops max8997_fixedstate_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) .list_voltage = max8997_list_voltage_charger_cv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .get_voltage_sel = max8997_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .set_voltage = max8997_set_voltage_charger_cv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) static int max8997_set_current_limit(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) int min_uA, int max_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) unsigned dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) int rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) if (rid != MAX8997_CHARGER && rid != MAX8997_CHARGER_TOPOFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) /* Reuse max8997_set_voltage_ldobuck to set current_limit. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) return max8997_set_voltage_ldobuck(rdev, min_uA, max_uA, &dummy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) static int max8997_get_current_limit(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) int sel, rid = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) if (rid != MAX8997_CHARGER && rid != MAX8997_CHARGER_TOPOFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) sel = max8997_get_voltage_sel(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) if (sel < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) return sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) /* Reuse max8997_list_voltage to get current_limit. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) return max8997_list_voltage(rdev, sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static const struct regulator_ops max8997_charger_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) .is_enabled = max8997_reg_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .enable = max8997_reg_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) .disable = max8997_reg_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) .get_current_limit = max8997_get_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) .set_current_limit = max8997_set_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) static const struct regulator_ops max8997_charger_fixedstate_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .get_current_limit = max8997_get_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .set_current_limit = max8997_set_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) #define MAX8997_VOLTAGE_REGULATOR(_name, _ops) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .name = #_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) .id = MAX8997_##_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .ops = &_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) #define MAX8997_CURRENT_REGULATOR(_name, _ops) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) .name = #_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) .id = MAX8997_##_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .ops = &_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) .type = REGULATOR_CURRENT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) static struct regulator_desc regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) MAX8997_VOLTAGE_REGULATOR(LDO1, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) MAX8997_VOLTAGE_REGULATOR(LDO2, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) MAX8997_VOLTAGE_REGULATOR(LDO3, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) MAX8997_VOLTAGE_REGULATOR(LDO4, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) MAX8997_VOLTAGE_REGULATOR(LDO5, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) MAX8997_VOLTAGE_REGULATOR(LDO6, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) MAX8997_VOLTAGE_REGULATOR(LDO7, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) MAX8997_VOLTAGE_REGULATOR(LDO8, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) MAX8997_VOLTAGE_REGULATOR(LDO9, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) MAX8997_VOLTAGE_REGULATOR(LDO10, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) MAX8997_VOLTAGE_REGULATOR(LDO11, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) MAX8997_VOLTAGE_REGULATOR(LDO12, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) MAX8997_VOLTAGE_REGULATOR(LDO13, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) MAX8997_VOLTAGE_REGULATOR(LDO14, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) MAX8997_VOLTAGE_REGULATOR(LDO15, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) MAX8997_VOLTAGE_REGULATOR(LDO16, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) MAX8997_VOLTAGE_REGULATOR(LDO17, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) MAX8997_VOLTAGE_REGULATOR(LDO18, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) MAX8997_VOLTAGE_REGULATOR(LDO21, max8997_ldo_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) MAX8997_VOLTAGE_REGULATOR(BUCK1, max8997_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) MAX8997_VOLTAGE_REGULATOR(BUCK2, max8997_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) MAX8997_VOLTAGE_REGULATOR(BUCK3, max8997_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) MAX8997_VOLTAGE_REGULATOR(BUCK4, max8997_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) MAX8997_VOLTAGE_REGULATOR(BUCK5, max8997_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) MAX8997_VOLTAGE_REGULATOR(BUCK6, max8997_fixedvolt_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) MAX8997_VOLTAGE_REGULATOR(BUCK7, max8997_buck_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) MAX8997_VOLTAGE_REGULATOR(EN32KHZ_AP, max8997_fixedvolt_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) MAX8997_VOLTAGE_REGULATOR(EN32KHZ_CP, max8997_fixedvolt_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) MAX8997_VOLTAGE_REGULATOR(ENVICHG, max8997_fixedvolt_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) MAX8997_VOLTAGE_REGULATOR(ESAFEOUT1, max8997_safeout_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) MAX8997_VOLTAGE_REGULATOR(ESAFEOUT2, max8997_safeout_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) MAX8997_VOLTAGE_REGULATOR(CHARGER_CV, max8997_fixedstate_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) MAX8997_CURRENT_REGULATOR(CHARGER, max8997_charger_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) MAX8997_CURRENT_REGULATOR(CHARGER_TOPOFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) max8997_charger_fixedstate_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) static int max8997_pmic_dt_parse_dvs_gpio(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) struct max8997_platform_data *pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) struct device_node *pmic_np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) int i, gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) gpio = of_get_named_gpio(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) "max8997,pmic-buck125-dvs-gpios", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) if (!gpio_is_valid(gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) dev_err(&pdev->dev, "invalid gpio[%d]: %d\n", i, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) pdata->buck125_gpios[i] = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) static int max8997_pmic_dt_parse_pdata(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) struct max8997_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) struct device_node *pmic_np, *regulators_np, *reg_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) struct max8997_regulator_data *rdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) unsigned int i, dvs_voltage_nr = 1, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) pmic_np = iodev->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) if (!pmic_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) dev_err(&pdev->dev, "could not find pmic sub-node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) regulators_np = of_get_child_by_name(pmic_np, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) if (!regulators_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) dev_err(&pdev->dev, "could not find regulators sub-node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) /* count the number of regulators to be supported in pmic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) pdata->num_regulators = of_get_child_count(regulators_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) rdata = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) pdata->num_regulators, sizeof(*rdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) if (!rdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) of_node_put(regulators_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) pdata->regulators = rdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) for_each_child_of_node(regulators_np, reg_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) for (i = 0; i < ARRAY_SIZE(regulators); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) if (of_node_name_eq(reg_np, regulators[i].name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) if (i == ARRAY_SIZE(regulators)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) dev_warn(&pdev->dev, "don't know how to configure regulator %pOFn\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) reg_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) rdata->id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) rdata->initdata = of_get_regulator_init_data(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) reg_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) ®ulators[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) rdata->reg_node = reg_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) rdata++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) of_node_put(regulators_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) if (of_get_property(pmic_np, "max8997,pmic-buck1-uses-gpio-dvs", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) pdata->buck1_gpiodvs = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) if (of_get_property(pmic_np, "max8997,pmic-buck2-uses-gpio-dvs", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) pdata->buck2_gpiodvs = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) if (of_get_property(pmic_np, "max8997,pmic-buck5-uses-gpio-dvs", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) pdata->buck5_gpiodvs = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) if (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) pdata->buck5_gpiodvs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) ret = max8997_pmic_dt_parse_dvs_gpio(pdev, pdata, pmic_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) if (of_property_read_u32(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) "max8997,pmic-buck125-default-dvs-idx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) &pdata->buck125_default_idx)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) pdata->buck125_default_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) if (pdata->buck125_default_idx >= 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) pdata->buck125_default_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) dev_info(&pdev->dev, "invalid value for default dvs index, using 0 instead\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) if (of_get_property(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) "max8997,pmic-ignore-gpiodvs-side-effect", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) pdata->ignore_gpiodvs_side_effect = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) dvs_voltage_nr = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) if (of_property_read_u32_array(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) "max8997,pmic-buck1-dvs-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) pdata->buck1_voltage, dvs_voltage_nr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) dev_err(&pdev->dev, "buck1 voltages not specified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) if (of_property_read_u32_array(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) "max8997,pmic-buck2-dvs-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) pdata->buck2_voltage, dvs_voltage_nr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) dev_err(&pdev->dev, "buck2 voltages not specified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) if (of_property_read_u32_array(pmic_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) "max8997,pmic-buck5-dvs-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) pdata->buck5_voltage, dvs_voltage_nr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) dev_err(&pdev->dev, "buck5 voltages not specified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) static int max8997_pmic_dt_parse_pdata(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) struct max8997_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) #endif /* CONFIG_OF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) static int max8997_pmic_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) struct max8997_platform_data *pdata = iodev->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) struct max8997_data *max8997;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) struct i2c_client *i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) int i, ret, nr_dvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) u8 max_buck1 = 0, max_buck2 = 0, max_buck5 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) dev_err(&pdev->dev, "No platform init data supplied.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) if (iodev->dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) ret = max8997_pmic_dt_parse_pdata(pdev, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) max8997 = devm_kzalloc(&pdev->dev, sizeof(struct max8997_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) if (!max8997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) max8997->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) max8997->iodev = iodev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) max8997->num_regulators = pdata->num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) platform_set_drvdata(pdev, max8997);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) i2c = max8997->iodev->i2c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) max8997->buck125_gpioindex = pdata->buck125_default_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) max8997->buck1_gpiodvs = pdata->buck1_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) max8997->buck2_gpiodvs = pdata->buck2_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) max8997->buck5_gpiodvs = pdata->buck5_gpiodvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) memcpy(max8997->buck125_gpios, pdata->buck125_gpios, sizeof(int) * 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) max8997->ignore_gpiodvs_side_effect = pdata->ignore_gpiodvs_side_effect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) nr_dvs = (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) pdata->buck5_gpiodvs) ? 8 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) for (i = 0; i < nr_dvs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) max8997->buck1_vol[i] = ret =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) max8997_get_voltage_proper_val(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) &buck1245_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) pdata->buck1_voltage[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) pdata->buck1_voltage[i] +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) buck1245_voltage_map_desc.step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) max8997->buck2_vol[i] = ret =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) max8997_get_voltage_proper_val(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) &buck1245_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) pdata->buck2_voltage[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) pdata->buck2_voltage[i] +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) buck1245_voltage_map_desc.step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) max8997->buck5_vol[i] = ret =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) max8997_get_voltage_proper_val(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) &buck1245_voltage_map_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) pdata->buck5_voltage[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) pdata->buck5_voltage[i] +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) buck1245_voltage_map_desc.step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) if (max_buck1 < max8997->buck1_vol[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) max_buck1 = max8997->buck1_vol[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) if (max_buck2 < max8997->buck2_vol[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) max_buck2 = max8997->buck2_vol[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) if (max_buck5 < max8997->buck5_vol[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) max_buck5 = max8997->buck5_vol[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) /* For the safety, set max voltage before setting up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) max_buck1, 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) max_buck2, 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) max_buck5, 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) /* Initialize all the DVS related BUCK registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) for (i = 0; i < nr_dvs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) max8997_update_reg(i2c, MAX8997_REG_BUCK1DVS1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) max8997->buck1_vol[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) max8997_update_reg(i2c, MAX8997_REG_BUCK2DVS1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) max8997->buck2_vol[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) max8997_update_reg(i2c, MAX8997_REG_BUCK5DVS1 + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) max8997->buck5_vol[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) 0x3f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) * If buck 1, 2, and 5 do not care DVS GPIO settings, ignore them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) * If at least one of them cares, set gpios.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) if (pdata->buck1_gpiodvs || pdata->buck2_gpiodvs ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) pdata->buck5_gpiodvs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) if (!gpio_is_valid(pdata->buck125_gpios[0]) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) !gpio_is_valid(pdata->buck125_gpios[1]) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) !gpio_is_valid(pdata->buck125_gpios[2])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) dev_err(&pdev->dev, "GPIO NOT VALID\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) ret = devm_gpio_request(&pdev->dev, pdata->buck125_gpios[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) "MAX8997 SET1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) ret = devm_gpio_request(&pdev->dev, pdata->buck125_gpios[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) "MAX8997 SET2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) ret = devm_gpio_request(&pdev->dev, pdata->buck125_gpios[2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) "MAX8997 SET3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) gpio_direction_output(pdata->buck125_gpios[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) (max8997->buck125_gpioindex >> 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) & 0x1); /* SET1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) gpio_direction_output(pdata->buck125_gpios[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) (max8997->buck125_gpioindex >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) & 0x1); /* SET2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) gpio_direction_output(pdata->buck125_gpios[2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) (max8997->buck125_gpioindex >> 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) & 0x1); /* SET3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) /* DVS-GPIO disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) max8997_update_reg(i2c, MAX8997_REG_BUCK1CTRL, (pdata->buck1_gpiodvs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) (1 << 1) : (0 << 1), 1 << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) max8997_update_reg(i2c, MAX8997_REG_BUCK2CTRL, (pdata->buck2_gpiodvs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) (1 << 1) : (0 << 1), 1 << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) max8997_update_reg(i2c, MAX8997_REG_BUCK5CTRL, (pdata->buck5_gpiodvs) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) (1 << 1) : (0 << 1), 1 << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) /* Misc Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) max8997->ramp_delay = 10; /* set 10mV/us, which is the default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) max8997_write_reg(i2c, MAX8997_REG_BUCKRAMP, (0xf << 4) | 0x9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) for (i = 0; i < pdata->num_regulators; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) const struct voltage_map_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) int id = pdata->regulators[i].id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) desc = reg_voltage_map[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) if (desc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) regulators[id].n_voltages =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) (desc->max - desc->min) / desc->step + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) } else if (id == MAX8997_ESAFEOUT1 || id == MAX8997_ESAFEOUT2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) regulators[id].volt_table = safeoutvolt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) regulators[id].n_voltages = ARRAY_SIZE(safeoutvolt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) } else if (id == MAX8997_CHARGER_CV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) regulators[id].n_voltages = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) config.dev = max8997->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) config.init_data = pdata->regulators[i].initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) config.driver_data = max8997;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) config.of_node = pdata->regulators[i].reg_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) rdev = devm_regulator_register(&pdev->dev, ®ulators[id],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) dev_err(max8997->dev, "regulator init failed for %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) static const struct platform_device_id max8997_pmic_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) { "max8997-pmic", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) MODULE_DEVICE_TABLE(platform, max8997_pmic_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) static struct platform_driver max8997_pmic_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) .name = "max8997-pmic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) .probe = max8997_pmic_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) .id_table = max8997_pmic_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) static int __init max8997_pmic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) return platform_driver_register(&max8997_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) subsys_initcall(max8997_pmic_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) static void __exit max8997_pmic_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) platform_driver_unregister(&max8997_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) module_exit(max8997_pmic_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) MODULE_DESCRIPTION("MAXIM 8997/8966 Regulator Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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