^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * max8952.c - Voltage and current regulation for the Maxim 8952
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * MyungJoo Ham <myungjoo.ham@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/max8952.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MAX8952_REG_MODE0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MAX8952_REG_MODE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MAX8952_REG_MODE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MAX8952_REG_MODE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MAX8952_REG_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MAX8952_REG_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MAX8952_REG_RAMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MAX8952_REG_CHIP_ID1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MAX8952_REG_CHIP_ID2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct max8952_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct max8952_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct gpio_desc *vid0_gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct gpio_desc *vid1_gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) bool vid0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) bool vid1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static int max8952_read_reg(struct max8952_data *max8952, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int ret = i2c_smbus_read_byte_data(max8952->client, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (ret > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ret &= 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static int max8952_write_reg(struct max8952_data *max8952,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u8 reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return i2c_smbus_write_byte_data(max8952->client, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static int max8952_list_voltage(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned int selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct max8952_data *max8952 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (rdev_get_id(rdev) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return (max8952->pdata->dvs_mode[selector] * 10 + 770) * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int max8952_get_voltage_sel(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct max8952_data *max8952 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u8 vid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (max8952->vid0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) vid += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (max8952->vid1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) vid += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int max8952_set_voltage_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct max8952_data *max8952 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* DVS not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) max8952->vid0 = selector & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) max8952->vid1 = (selector >> 1) & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) gpiod_set_value(max8952->vid0_gpiod, max8952->vid0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) gpiod_set_value(max8952->vid1_gpiod, max8952->vid1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct regulator_ops max8952_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .list_voltage = max8952_list_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .get_voltage_sel = max8952_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .set_voltage_sel = max8952_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const struct regulator_desc regulator = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .name = "MAX8952_VOUT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .n_voltages = MAX8952_NUM_DVS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .ops = &max8952_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const struct of_device_id max8952_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { .compatible = "maxim,max8952" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MODULE_DEVICE_TABLE(of, max8952_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static struct max8952_platform_data *max8952_parse_dt(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct max8952_platform_data *pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (!pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (of_property_read_u32(np, "max8952,default-mode", &pd->default_mode))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev_warn(dev, "Default mode not specified, assuming 0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) ret = of_property_read_u32_array(np, "max8952,dvs-mode-microvolt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) pd->dvs_mode, ARRAY_SIZE(pd->dvs_mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_err(dev, "max8952,dvs-mode-microvolt property not specified");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) for (i = 0; i < ARRAY_SIZE(pd->dvs_mode); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (pd->dvs_mode[i] < 770000 || pd->dvs_mode[i] > 1400000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dev_err(dev, "DVS voltage %d out of range\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) pd->dvs_mode[i] = (pd->dvs_mode[i] - 770000) / 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (of_property_read_u32(np, "max8952,sync-freq", &pd->sync_freq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev_warn(dev, "max8952,sync-freq property not specified, defaulting to 26MHz\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (of_property_read_u32(np, "max8952,ramp-speed", &pd->ramp_speed))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) dev_warn(dev, "max8952,ramp-speed property not specified, defaulting to 32mV/us\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) pd->reg_data = of_get_regulator_init_data(dev, np, ®ulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (!pd->reg_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) dev_err(dev, "Failed to parse regulator init data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static struct max8952_platform_data *max8952_parse_dt(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int max8952_pmic_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) const struct i2c_device_id *i2c_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct max8952_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct max8952_data *max8952;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct gpio_desc *gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) enum gpiod_flags gflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (client->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) pdata = max8952_parse_dt(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) dev_err(&client->dev, "Require the platform data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) max8952 = devm_kzalloc(&client->dev, sizeof(struct max8952_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (!max8952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) max8952->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) max8952->pdata = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) config.dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) config.init_data = pdata->reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) config.driver_data = max8952;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) config.of_node = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (pdata->reg_data->constraints.boot_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) gflags = GPIOD_OUT_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) gflags = GPIOD_OUT_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) gflags |= GPIOD_FLAGS_BIT_NONEXCLUSIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * Do not use devm* here: the regulator core takes over the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * lifecycle management of the GPIO descriptor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) gpiod = gpiod_get_optional(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) "max8952,en",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) gflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (IS_ERR(gpiod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return PTR_ERR(gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (gpiod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) config.ena_gpiod = gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) rdev = devm_regulator_register(&client->dev, ®ulator, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) dev_err(&client->dev, "regulator init failed (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) max8952->vid0 = pdata->default_mode & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) max8952->vid1 = (pdata->default_mode >> 1) & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /* Fetch vid0 and vid1 GPIOs if available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) gflags = max8952->vid0 ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) max8952->vid0_gpiod = devm_gpiod_get_index_optional(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) "max8952,vid",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 0, gflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (IS_ERR(max8952->vid0_gpiod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return PTR_ERR(max8952->vid0_gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) gflags = max8952->vid1 ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) max8952->vid1_gpiod = devm_gpiod_get_index_optional(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) "max8952,vid",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 1, gflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (IS_ERR(max8952->vid1_gpiod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return PTR_ERR(max8952->vid1_gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /* If either VID GPIO is missing just disable this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) dev_warn(&client->dev, "VID0/1 gpio invalid: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) "DVS not available.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) max8952->vid0 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) max8952->vid1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* Make sure if we have any descriptors they get set to low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (max8952->vid0_gpiod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) gpiod_set_value(max8952->vid0_gpiod, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (max8952->vid1_gpiod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) gpiod_set_value(max8952->vid1_gpiod, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* Disable Pulldown of EN only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) max8952_write_reg(max8952, MAX8952_REG_CONTROL, 0x60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) dev_err(&client->dev, "DVS modes disabled because VID0 and VID1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) " do not have proper controls.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * Disable Pulldown on EN, VID0, VID1 to reduce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * leakage current of MAX8952 assuming that MAX8952
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * is turned on (EN==1). Note that without having VID0/1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * properly connected, turning pulldown off can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * problematic. Thus, turn this off only when they are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * controllable by GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) max8952_write_reg(max8952, MAX8952_REG_CONTROL, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) max8952_write_reg(max8952, MAX8952_REG_MODE0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) (max8952_read_reg(max8952,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MAX8952_REG_MODE0) & 0xC0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) (pdata->dvs_mode[0] & 0x3F));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) max8952_write_reg(max8952, MAX8952_REG_MODE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) (max8952_read_reg(max8952,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MAX8952_REG_MODE1) & 0xC0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) (pdata->dvs_mode[1] & 0x3F));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) max8952_write_reg(max8952, MAX8952_REG_MODE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) (max8952_read_reg(max8952,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) MAX8952_REG_MODE2) & 0xC0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) (pdata->dvs_mode[2] & 0x3F));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) max8952_write_reg(max8952, MAX8952_REG_MODE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) (max8952_read_reg(max8952,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) MAX8952_REG_MODE3) & 0xC0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) (pdata->dvs_mode[3] & 0x3F));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) max8952_write_reg(max8952, MAX8952_REG_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) (max8952_read_reg(max8952, MAX8952_REG_SYNC) & 0x3F) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ((pdata->sync_freq & 0x3) << 6));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) max8952_write_reg(max8952, MAX8952_REG_RAMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) (max8952_read_reg(max8952, MAX8952_REG_RAMP) & 0x1F) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ((pdata->ramp_speed & 0x7) << 5));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) i2c_set_clientdata(client, max8952);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static const struct i2c_device_id max8952_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) { "max8952", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) MODULE_DEVICE_TABLE(i2c, max8952_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static struct i2c_driver max8952_pmic_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .probe = max8952_pmic_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .name = "max8952",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .of_match_table = of_match_ptr(max8952_dt_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .id_table = max8952_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int __init max8952_pmic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return i2c_add_driver(&max8952_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) subsys_initcall(max8952_pmic_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static void __exit max8952_pmic_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) i2c_del_driver(&max8952_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) module_exit(max8952_pmic_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MODULE_DESCRIPTION("MAXIM 8952 voltage regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MODULE_LICENSE("GPL");