Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // max77686.c - Regulator driver for the Maxim 77686
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Copyright (C) 2012 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) // Chiwoong Byun <woong.byun@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) // Jonghwa Lee <jonghwa3.lee@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) // This driver is based on max8997.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/mfd/max77686.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/mfd/max77686-private.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define MAX77686_LDO_MINUV	800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define MAX77686_LDO_UVSTEP	50000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define MAX77686_LDO_LOW_MINUV	800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define MAX77686_LDO_LOW_UVSTEP	25000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define MAX77686_BUCK_MINUV	750000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define MAX77686_BUCK_UVSTEP	50000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define MAX77686_BUCK_ENABLE_TIME	40		/* us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define MAX77686_DVS_ENABLE_TIME	22		/* us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define MAX77686_RAMP_DELAY	100000			/* uV/us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MAX77686_DVS_RAMP_DELAY	27500			/* uV/us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define MAX77686_DVS_MINUV	600000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define MAX77686_DVS_UVSTEP	12500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * Value for configuring buck[89] and LDO{20,21,22} as GPIO control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * It is the same as 'off' for other regulators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define MAX77686_GPIO_CONTROL		0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * Values used for configuring LDOs and bucks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * Forcing low power mode: LDO1, 3-5, 9, 13, 17-26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define MAX77686_LDO_LOWPOWER		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * On/off controlled by PWRREQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  *  - LDO2, 6-8, 10-12, 14-16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  *  - buck[1234]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define MAX77686_OFF_PWRREQ		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) /* Low power mode controlled by PWRREQ: All LDOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define MAX77686_LDO_LOWPOWER_PWRREQ	0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) /* Forcing low power mode: buck[234] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define MAX77686_BUCK_LOWPOWER		0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define MAX77686_NORMAL			0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define MAX77686_OPMODE_SHIFT	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define MAX77686_OPMODE_BUCK234_SHIFT	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define MAX77686_OPMODE_MASK	0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define MAX77686_VSEL_MASK	0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define MAX77686_DVS_VSEL_MASK	0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define MAX77686_RAMP_RATE_MASK	0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define MAX77686_REGULATORS	MAX77686_REG_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define MAX77686_LDOS		26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) enum max77686_ramp_rate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	RAMP_RATE_13P75MV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	RAMP_RATE_27P5MV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	RAMP_RATE_55MV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	RAMP_RATE_NO_CTRL,	/* 100mV/us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) struct max77686_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	DECLARE_BITMAP(gpio_enabled, MAX77686_REGULATORS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* Array indexed by regulator id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	unsigned int opmode[MAX77686_REGULATORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static unsigned int max77686_get_opmode_shift(int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	case MAX77686_BUCK1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	case MAX77686_BUCK5 ... MAX77686_BUCK9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	case MAX77686_BUCK2 ... MAX77686_BUCK4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		return MAX77686_OPMODE_BUCK234_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		/* all LDOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		return MAX77686_OPMODE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)  * When regulator is configured for GPIO control then it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)  * replaces "normal" mode. Any change from low power mode to normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)  * should actually change to GPIO control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)  * Map normal mode to proper value for such regulators.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static unsigned int max77686_map_normal_mode(struct max77686_data *max77686,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 					     int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	case MAX77686_BUCK8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	case MAX77686_BUCK9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	case MAX77686_LDO20 ... MAX77686_LDO22:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		if (test_bit(id, max77686->gpio_enabled))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			return MAX77686_GPIO_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	return MAX77686_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* Some BUCKs and LDOs supports Normal[ON/OFF] mode during suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int max77686_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	unsigned int val, shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	struct max77686_data *max77686 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	int ret, id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	shift = max77686_get_opmode_shift(id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	val = MAX77686_OFF_PWRREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 				 rdev->desc->enable_mask, val << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	max77686->opmode[id] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Some LDOs supports [LPM/Normal]ON mode during suspend state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int max77686_set_suspend_mode(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 				     unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct max77686_data *max77686 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	int ret, id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	/* BUCK[5-9] doesn't support this feature */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (id >= MAX77686_BUCK5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	case REGULATOR_MODE_IDLE:			/* ON in LP Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		val = MAX77686_LDO_LOWPOWER_PWRREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	case REGULATOR_MODE_NORMAL:			/* ON in Normal Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		val = max77686_map_normal_mode(max77686, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		pr_warn("%s: regulator_suspend_mode : 0x%x not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			rdev->desc->name, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 				  rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 				  val << MAX77686_OPMODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	max77686->opmode[id] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* Some LDOs supports LPM-ON/OFF/Normal-ON mode during suspend state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int max77686_ldo_set_suspend_mode(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 				     unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct max77686_data *max77686 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int ret, id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	case REGULATOR_MODE_STANDBY:			/* switch off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		val = MAX77686_OFF_PWRREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	case REGULATOR_MODE_IDLE:			/* ON in LP Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		val = MAX77686_LDO_LOWPOWER_PWRREQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	case REGULATOR_MODE_NORMAL:			/* ON in Normal Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		val = max77686_map_normal_mode(max77686, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		pr_warn("%s: regulator_suspend_mode : 0x%x not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 			rdev->desc->name, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 				 rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 				 val << MAX77686_OPMODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	max77686->opmode[id] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int max77686_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	struct max77686_data *max77686 = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	unsigned int shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	shift = max77686_get_opmode_shift(id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (max77686->opmode[id] == MAX77686_OFF_PWRREQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		max77686->opmode[id] = max77686_map_normal_mode(max77686, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 				  rdev->desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 				  max77686->opmode[id] << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int max77686_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	unsigned int ramp_value = RAMP_RATE_NO_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	switch (ramp_delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	case 1 ... 13750:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		ramp_value = RAMP_RATE_13P75MV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	case 13751 ... 27500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		ramp_value = RAMP_RATE_27P5MV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	case 27501 ... 55000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		ramp_value = RAMP_RATE_55MV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	case 55001 ... 100000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		pr_warn("%s: ramp_delay: %d not supported, setting 100000\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			rdev->desc->name, ramp_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 				  MAX77686_RAMP_RATE_MASK, ramp_value << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int max77686_of_parse_cb(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		const struct regulator_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		struct regulator_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	struct max77686_data *max77686 = config->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	switch (desc->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	case MAX77686_BUCK8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	case MAX77686_BUCK9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	case MAX77686_LDO20 ... MAX77686_LDO22:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		config->ena_gpiod = fwnode_gpiod_get_index(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 				of_fwnode_handle(np),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 				"maxim,ena",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 				0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 				GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 				"max77686-regulator");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		if (IS_ERR(config->ena_gpiod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			config->ena_gpiod = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	if (config->ena_gpiod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		set_bit(desc->id, max77686->gpio_enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		ret = regmap_update_bits(config->regmap, desc->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 					 desc->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 					 MAX77686_GPIO_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 			gpiod_put(config->ena_gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			config->ena_gpiod = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const struct regulator_ops max77686_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	.enable			= max77686_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	.set_suspend_mode	= max77686_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static const struct regulator_ops max77686_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.enable			= max77686_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	.set_suspend_mode	= max77686_ldo_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	.set_suspend_disable	= max77686_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static const struct regulator_ops max77686_buck1_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	.enable			= max77686_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	.set_suspend_disable	= max77686_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static const struct regulator_ops max77686_buck_dvs_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	.list_voltage		= regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	.map_voltage		= regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	.enable			= max77686_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	.set_ramp_delay		= max77686_set_ramp_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	.set_suspend_disable	= max77686_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define regulator_desc_ldo(num)		{				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	.name		= "LDO"#num,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	.of_match	= of_match_ptr("LDO"#num),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	.of_parse_cb	= max77686_of_parse_cb,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	.id		= MAX77686_LDO##num,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	.ops		= &max77686_ops,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	.type		= REGULATOR_VOLTAGE,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	.owner		= THIS_MODULE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	.min_uV		= MAX77686_LDO_MINUV,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	.uV_step	= MAX77686_LDO_UVSTEP,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	.vsel_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	.vsel_mask	= MAX77686_VSEL_MASK,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	.enable_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	.enable_mask	= MAX77686_OPMODE_MASK				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 			<< MAX77686_OPMODE_SHIFT,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) #define regulator_desc_lpm_ldo(num)	{				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	.name		= "LDO"#num,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	.of_match	= of_match_ptr("LDO"#num),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	.id		= MAX77686_LDO##num,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	.ops		= &max77686_ldo_ops,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	.type		= REGULATOR_VOLTAGE,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	.owner		= THIS_MODULE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	.min_uV		= MAX77686_LDO_MINUV,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	.uV_step	= MAX77686_LDO_UVSTEP,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	.vsel_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	.vsel_mask	= MAX77686_VSEL_MASK,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	.enable_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	.enable_mask	= MAX77686_OPMODE_MASK				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 			<< MAX77686_OPMODE_SHIFT,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define regulator_desc_ldo_low(num)		{			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	.name		= "LDO"#num,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	.of_match	= of_match_ptr("LDO"#num),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	.id		= MAX77686_LDO##num,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	.ops		= &max77686_ldo_ops,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	.type		= REGULATOR_VOLTAGE,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	.owner		= THIS_MODULE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	.min_uV		= MAX77686_LDO_LOW_MINUV,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	.uV_step	= MAX77686_LDO_LOW_UVSTEP,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	.vsel_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	.vsel_mask	= MAX77686_VSEL_MASK,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	.enable_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	.enable_mask	= MAX77686_OPMODE_MASK				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 			<< MAX77686_OPMODE_SHIFT,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #define regulator_desc_ldo1_low(num)		{			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	.name		= "LDO"#num,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	.of_match	= of_match_ptr("LDO"#num),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	.id		= MAX77686_LDO##num,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	.ops		= &max77686_ops,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	.type		= REGULATOR_VOLTAGE,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	.owner		= THIS_MODULE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	.min_uV		= MAX77686_LDO_LOW_MINUV,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	.uV_step	= MAX77686_LDO_LOW_UVSTEP,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	.vsel_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	.vsel_mask	= MAX77686_VSEL_MASK,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	.enable_reg	= MAX77686_REG_LDO1CTRL1 + num - 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	.enable_mask	= MAX77686_OPMODE_MASK				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 			<< MAX77686_OPMODE_SHIFT,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) #define regulator_desc_buck(num)		{			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	.name		= "BUCK"#num,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	.of_match	= of_match_ptr("BUCK"#num),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	.of_parse_cb	= max77686_of_parse_cb,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	.id		= MAX77686_BUCK##num,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	.ops		= &max77686_ops,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	.type		= REGULATOR_VOLTAGE,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	.owner		= THIS_MODULE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	.min_uV		= MAX77686_BUCK_MINUV,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	.uV_step	= MAX77686_BUCK_UVSTEP,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	.enable_time	= MAX77686_BUCK_ENABLE_TIME,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	.vsel_reg	= MAX77686_REG_BUCK5OUT + (num - 5) * 2,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	.vsel_mask	= MAX77686_VSEL_MASK,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	.enable_reg	= MAX77686_REG_BUCK5CTRL + (num - 5) * 2,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	.enable_mask	= MAX77686_OPMODE_MASK,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #define regulator_desc_buck1(num)		{			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	.name		= "BUCK"#num,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	.of_match	= of_match_ptr("BUCK"#num),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	.id		= MAX77686_BUCK##num,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	.ops		= &max77686_buck1_ops,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	.type		= REGULATOR_VOLTAGE,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	.owner		= THIS_MODULE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	.min_uV		= MAX77686_BUCK_MINUV,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	.uV_step	= MAX77686_BUCK_UVSTEP,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	.ramp_delay	= MAX77686_RAMP_DELAY,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	.enable_time	= MAX77686_BUCK_ENABLE_TIME,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	.n_voltages	= MAX77686_VSEL_MASK + 1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	.vsel_reg	= MAX77686_REG_BUCK1OUT,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	.vsel_mask	= MAX77686_VSEL_MASK,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	.enable_reg	= MAX77686_REG_BUCK1CTRL,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	.enable_mask	= MAX77686_OPMODE_MASK,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define regulator_desc_buck_dvs(num)		{			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	.name		= "BUCK"#num,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	.of_match	= of_match_ptr("BUCK"#num),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	.regulators_node	= of_match_ptr("voltage-regulators"),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	.id		= MAX77686_BUCK##num,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	.ops		= &max77686_buck_dvs_ops,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	.type		= REGULATOR_VOLTAGE,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	.owner		= THIS_MODULE,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	.min_uV		= MAX77686_DVS_MINUV,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	.uV_step	= MAX77686_DVS_UVSTEP,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	.ramp_delay	= MAX77686_DVS_RAMP_DELAY,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	.enable_time	= MAX77686_DVS_ENABLE_TIME,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	.n_voltages	= MAX77686_DVS_VSEL_MASK + 1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	.vsel_reg	= MAX77686_REG_BUCK2DVS1 + (num - 2) * 10,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	.vsel_mask	= MAX77686_DVS_VSEL_MASK,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	.enable_reg	= MAX77686_REG_BUCK2CTRL1 + (num - 2) * 10,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	.enable_mask	= MAX77686_OPMODE_MASK				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 			<< MAX77686_OPMODE_BUCK234_SHIFT,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static const struct regulator_desc regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	regulator_desc_ldo1_low(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	regulator_desc_ldo_low(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	regulator_desc_ldo(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	regulator_desc_ldo(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	regulator_desc_ldo(5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	regulator_desc_ldo_low(6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	regulator_desc_ldo_low(7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	regulator_desc_ldo_low(8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	regulator_desc_ldo(9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	regulator_desc_lpm_ldo(10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	regulator_desc_lpm_ldo(11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	regulator_desc_lpm_ldo(12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	regulator_desc_ldo(13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	regulator_desc_lpm_ldo(14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	regulator_desc_ldo_low(15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	regulator_desc_lpm_ldo(16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	regulator_desc_ldo(17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	regulator_desc_ldo(18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	regulator_desc_ldo(19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	regulator_desc_ldo(20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	regulator_desc_ldo(21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	regulator_desc_ldo(22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	regulator_desc_ldo(23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	regulator_desc_ldo(24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	regulator_desc_ldo(25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	regulator_desc_ldo(26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	regulator_desc_buck1(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	regulator_desc_buck_dvs(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	regulator_desc_buck_dvs(3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	regulator_desc_buck_dvs(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	regulator_desc_buck(5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	regulator_desc_buck(6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	regulator_desc_buck(7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	regulator_desc_buck(8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	regulator_desc_buck(9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) static int max77686_pmic_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	struct max77686_data *max77686;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	dev_dbg(&pdev->dev, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	max77686 = devm_kzalloc(&pdev->dev, sizeof(struct max77686_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 				GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	if (!max77686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	max77686->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	config.dev = iodev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	config.regmap = iodev->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	config.driver_data = max77686;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	platform_set_drvdata(pdev, max77686);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	for (i = 0; i < MAX77686_REGULATORS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 		struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 		int id = regulators[i].id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 		max77686->opmode[id] = MAX77686_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 		rdev = devm_regulator_register(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 						&regulators[i], &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 		if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 			int ret = PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 			dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 				"regulator init failed for %d: %d\n", i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static const struct platform_device_id max77686_pmic_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	{"max77686-pmic", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) MODULE_DEVICE_TABLE(platform, max77686_pmic_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static struct platform_driver max77686_pmic_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 		.name = "max77686-pmic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	.probe = max77686_pmic_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	.id_table = max77686_pmic_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) module_platform_driver(max77686_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) MODULE_DESCRIPTION("MAXIM 77686 Regulator Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) MODULE_LICENSE("GPL");