^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * TI LM363X Regulator Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2015 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Milo Kim <milo.kim@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/ti-lmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mfd/ti-lmu-register.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* LM3631 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define LM3631_BOOST_VSEL_MAX 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define LM3631_LDO_VSEL_MAX 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define LM3631_CONT_VSEL_MAX 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LM3631_VBOOST_MIN 4500000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define LM3631_VCONT_MIN 1800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LM3631_VLDO_MIN 4000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ENABLE_TIME_USEC 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* LM3632 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LM3632_BOOST_VSEL_MAX 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LM3632_LDO_VSEL_MAX 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define LM3632_VBOOST_MIN 4500000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define LM3632_VLDO_MIN 4000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* LM36274 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define LM36274_BOOST_VSEL_MAX 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LM36274_LDO_VSEL_MAX 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define LM36274_VOLTAGE_MIN 4000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Common */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LM363X_STEP_50mV 50000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LM363X_STEP_500mV 500000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static const int ldo_cont_enable_time[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 0, 2000, 5000, 10000, 20000, 50000, 100000, 200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int lm363x_regulator_enable_time(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) enum lm363x_regulator_id id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned int val, addr, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case LM3631_LDO_CONT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) addr = LM3631_REG_ENTIME_VCONT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) mask = LM3631_ENTIME_CONT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) case LM3631_LDO_OREF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) addr = LM3631_REG_ENTIME_VOREF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) mask = LM3631_ENTIME_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) case LM3631_LDO_POS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) addr = LM3631_REG_ENTIME_VPOS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) mask = LM3631_ENTIME_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) case LM3631_LDO_NEG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) addr = LM3631_REG_ENTIME_VNEG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) mask = LM3631_ENTIME_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (regmap_read(rdev->regmap, addr, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) val = (val & mask) >> LM3631_ENTIME_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (id == LM3631_LDO_CONT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return ldo_cont_enable_time[val];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return ENABLE_TIME_USEC * val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static const struct regulator_ops lm363x_boost_voltage_table_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static const struct regulator_ops lm363x_regulator_voltage_table_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .enable_time = lm363x_regulator_enable_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static const struct regulator_desc lm363x_regulator_desc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* LM3631 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .name = "vboost",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .of_match = "vboost",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .id = LM3631_BOOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .ops = &lm363x_boost_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .n_voltages = LM3631_BOOST_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .min_uV = LM3631_VBOOST_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .vsel_reg = LM3631_REG_VOUT_BOOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .vsel_mask = LM3631_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .name = "ldo_cont",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .of_match = "vcont",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .id = LM3631_LDO_CONT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .ops = &lm363x_regulator_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .n_voltages = LM3631_CONT_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .min_uV = LM3631_VCONT_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .uV_step = LM363X_STEP_500mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .vsel_reg = LM3631_REG_VOUT_CONT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .vsel_mask = LM3631_VOUT_CONT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .enable_reg = LM3631_REG_LDO_CTRL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .enable_mask = LM3631_EN_CONT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .name = "ldo_oref",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .of_match = "voref",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .id = LM3631_LDO_OREF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .ops = &lm363x_regulator_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .n_voltages = LM3631_LDO_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .min_uV = LM3631_VLDO_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .vsel_reg = LM3631_REG_VOUT_OREF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .vsel_mask = LM3631_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .enable_reg = LM3631_REG_LDO_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .enable_mask = LM3631_EN_OREF_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .name = "ldo_vpos",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .of_match = "vpos",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .id = LM3631_LDO_POS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .ops = &lm363x_regulator_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .n_voltages = LM3631_LDO_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .min_uV = LM3631_VLDO_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .vsel_reg = LM3631_REG_VOUT_POS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .vsel_mask = LM3631_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .enable_reg = LM3631_REG_LDO_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .enable_mask = LM3631_EN_VPOS_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .name = "ldo_vneg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .of_match = "vneg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .id = LM3631_LDO_NEG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .ops = &lm363x_regulator_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .n_voltages = LM3631_LDO_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .min_uV = LM3631_VLDO_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .vsel_reg = LM3631_REG_VOUT_NEG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .vsel_mask = LM3631_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .enable_reg = LM3631_REG_LDO_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .enable_mask = LM3631_EN_VNEG_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* LM3632 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .name = "vboost",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .of_match = "vboost",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .id = LM3632_BOOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .ops = &lm363x_boost_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .n_voltages = LM3632_BOOST_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .min_uV = LM3632_VBOOST_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .vsel_reg = LM3632_REG_VOUT_BOOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .vsel_mask = LM3632_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .name = "ldo_vpos",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .of_match = "vpos",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .id = LM3632_LDO_POS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .ops = &lm363x_regulator_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .n_voltages = LM3632_LDO_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .min_uV = LM3632_VLDO_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .vsel_reg = LM3632_REG_VOUT_POS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .vsel_mask = LM3632_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .enable_reg = LM3632_REG_BIAS_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .enable_mask = LM3632_EN_VPOS_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .name = "ldo_vneg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .of_match = "vneg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .id = LM3632_LDO_NEG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .ops = &lm363x_regulator_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .n_voltages = LM3632_LDO_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .min_uV = LM3632_VLDO_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .vsel_reg = LM3632_REG_VOUT_NEG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .vsel_mask = LM3632_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .enable_reg = LM3632_REG_BIAS_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .enable_mask = LM3632_EN_VNEG_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /* LM36274 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .name = "vboost",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .of_match = "vboost",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .id = LM36274_BOOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .ops = &lm363x_boost_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .n_voltages = LM36274_BOOST_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .min_uV = LM36274_VOLTAGE_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .vsel_reg = LM36274_REG_VOUT_BOOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .vsel_mask = LM36274_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .name = "ldo_vpos",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .of_match = "vpos",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .id = LM36274_LDO_POS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .ops = &lm363x_regulator_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .n_voltages = LM36274_LDO_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .min_uV = LM36274_VOLTAGE_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .vsel_reg = LM36274_REG_VOUT_POS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .vsel_mask = LM36274_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .enable_reg = LM36274_REG_BIAS_CONFIG_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .enable_mask = LM36274_EN_VPOS_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .name = "ldo_vneg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .of_match = "vneg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .id = LM36274_LDO_NEG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .ops = &lm363x_regulator_voltage_table_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .n_voltages = LM36274_LDO_VSEL_MAX + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .min_uV = LM36274_VOLTAGE_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .uV_step = LM363X_STEP_50mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .vsel_reg = LM36274_REG_VOUT_NEG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .vsel_mask = LM36274_VOUT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .enable_reg = LM36274_REG_BIAS_CONFIG_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .enable_mask = LM36274_EN_VNEG_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static struct gpio_desc *lm363x_regulator_of_get_enable_gpio(struct device *dev, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * Check LCM_EN1/2_GPIO is configured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * Those pins are used for enabling VPOS/VNEG LDOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * Do not use devm* here: the regulator core takes over the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * lifecycle management of the GPIO descriptor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) case LM3632_LDO_POS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) case LM36274_LDO_POS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return gpiod_get_index_optional(dev, "enable", 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_NONEXCLUSIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) case LM3632_LDO_NEG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) case LM36274_LDO_NEG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return gpiod_get_index_optional(dev, "enable", 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_NONEXCLUSIVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static int lm363x_regulator_set_ext_en(struct regmap *regmap, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) int ext_en_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) case LM3632_LDO_POS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) case LM3632_LDO_NEG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ext_en_mask = LM3632_EXT_EN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) case LM36274_LDO_POS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) case LM36274_LDO_NEG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ext_en_mask = LM36274_EXT_EN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) return regmap_update_bits(regmap, lm363x_regulator_desc[id].enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) ext_en_mask, ext_en_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static int lm363x_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct ti_lmu *lmu = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct regmap *regmap = lmu->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct regulator_config cfg = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) int id = pdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) struct gpio_desc *gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) cfg.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) cfg.regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) * LM3632 LDOs can be controlled by external pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) * Register update is required if the pin is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) gpiod = lm363x_regulator_of_get_enable_gpio(dev, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (IS_ERR(gpiod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return PTR_ERR(gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (gpiod) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) cfg.ena_gpiod = gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ret = lm363x_regulator_set_ext_en(regmap, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) gpiod_put(gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) dev_err(dev, "External pin err: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) rdev = devm_regulator_register(dev, &lm363x_regulator_desc[id], &cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ret = PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) dev_err(dev, "[%d] regulator register err: %d\n", id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static struct platform_driver lm363x_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .probe = lm363x_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .name = "lm363x-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) module_platform_driver(lm363x_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) MODULE_DESCRIPTION("TI LM363X Regulator Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) MODULE_AUTHOR("Milo Kim");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) MODULE_ALIAS("platform:lm363x-regulator");