^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // FAN53555 Fairchild Digitally Programmable TinyBuck Regulator Driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Supported Part Numbers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // FAN53555UC00X/01X/03X/04X/05X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // Copyright (c) 2012 Marvell Technology Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) // Yunfan Zhang <yfzhang@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/regulator/fan53555.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Voltage setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FAN53555_VSEL0 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define FAN53555_VSEL1 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RK860X_VSEL0 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RK860X_VSEL1 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RK860X_MAX_SET 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define TCS452X_VSEL0 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define TCS452X_VSEL1 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define TCS452X_TIME 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define TCS452X_COMMAND 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define TCS452X_LIMCONF 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define FAN53555_CONTROL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* IC Type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define FAN53555_ID1 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* IC mask version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define FAN53555_ID2 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* Monitor register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define FAN53555_MONITOR 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* VSEL bit definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define VSEL_BUCK_EN (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define VSEL_MODE (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define VSEL_NSEL_MASK 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* Chip ID and Verison */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define DIE_ID 0x0F /* ID1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define DIE_REV 0x0F /* ID2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Control bit definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define CTL_OUTPUT_DISCHG (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define CTL_SLEW_MASK (0x7 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define CTL_SLEW_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define CTL_RESET (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define CTL_MODE_VSEL0_MODE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define CTL_MODE_VSEL1_MODE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define RK_VSEL_NSEL_MASK 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define TCS_VSEL_NSEL_MASK 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define TCS_VSEL0_MODE (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define TCS_VSEL1_MODE (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define TCS_SLEW_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define TCS_SLEW_MASK (0x3 < 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define FAN53555_NVOLTAGES_64 64 /* Numbers of voltages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define FAN53555_NVOLTAGES_127 127 /* Numbers of voltages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define FAN53555_NVOLTAGES_160 160 /* Numbers of voltages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum fan53555_vendor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) FAN53526_VENDOR_FAIRCHILD = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) FAN53555_VENDOR_FAIRCHILD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) FAN53555_VENDOR_RK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) FAN53555_VENDOR_SILERGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) FAN53555_VENDOR_TCS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) FAN53526_CHIP_ID_01 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) FAN53526_CHIP_REV_08 = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* IC Type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) FAN53555_CHIP_ID_00 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) FAN53555_CHIP_ID_01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) FAN53555_CHIP_ID_02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) FAN53555_CHIP_ID_03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) FAN53555_CHIP_ID_04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) FAN53555_CHIP_ID_05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) FAN53555_CHIP_ID_08 = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* IC mask revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) FAN53555_CHIP_REV_00 = 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) FAN53555_CHIP_REV_13 = 0xf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) SILERGY_SYR82X = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) SILERGY_SYR83X = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct fan53555_device_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) enum fan53555_vendor vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct regulator_init_data *regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* IC Type and Rev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int chip_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Voltage setting register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned int vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned int sleep_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned int en_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned int sleep_en_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned int mode_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) unsigned int vol_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned int mode_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) unsigned int slew_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) unsigned int slew_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) unsigned int slew_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Voltage range and step(linear) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned int vsel_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned int vsel_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned int n_voltages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* Voltage slew rate limiting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) unsigned int slew_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* Sleep voltage cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned int sleep_vol_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct gpio_desc *vsel_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned int sleep_vsel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static unsigned int fan53555_map_mode(unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return mode == REGULATOR_MODE_FAST ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int fan53555_get_voltage(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (di->vendor == FAN53555_VENDOR_RK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ret = regmap_read(di->regmap, RK860X_MAX_SET, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ret = regulator_get_voltage_sel_regmap(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (ret > val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ret = regulator_get_voltage_sel_regmap(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int fan53555_set_suspend_voltage(struct regulator_dev *rdev, int uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (di->sleep_vol_cache == uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ret = regulator_map_voltage_linear(rdev, uV, uV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ret = regmap_update_bits(di->regmap, di->sleep_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) di->vol_mask, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* Cache the sleep voltage setting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * Might not be the real voltage which is rounded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) di->sleep_vol_cache = uV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int fan53555_set_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return regmap_update_bits(di->regmap, di->sleep_en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) VSEL_BUCK_EN, VSEL_BUCK_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static int fan53555_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return regmap_update_bits(di->regmap, di->sleep_en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) VSEL_BUCK_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static int fan53555_set_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (di->vsel_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) gpiod_set_raw_value(di->vsel_gpio, !di->sleep_vsel_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return regmap_update_bits(di->regmap, di->en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) VSEL_BUCK_EN, VSEL_BUCK_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static int fan53555_set_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (di->vsel_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) gpiod_set_raw_value(di->vsel_gpio, di->sleep_vsel_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return regmap_update_bits(di->regmap, di->en_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) VSEL_BUCK_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static int fan53555_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (di->vsel_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (di->sleep_vsel_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return !gpiod_get_raw_value(di->vsel_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return gpiod_get_raw_value(di->vsel_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ret = regmap_read(di->regmap, di->en_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (val & VSEL_BUCK_EN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int fan53555_set_mode(struct regulator_dev *rdev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) case REGULATOR_MODE_FAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) regmap_update_bits(di->regmap, di->mode_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) di->mode_mask, di->mode_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) regmap_update_bits(di->regmap, di->mode_reg, di->mode_mask, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static unsigned int fan53555_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ret = regmap_read(di->regmap, di->mode_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (val & di->mode_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static const int slew_rates[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 64000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 32000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 16000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static const int tcs_slew_rates[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 18700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 9300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 4600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 2300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static int fan53555_set_ramp(struct regulator_dev *rdev, int ramp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) struct fan53555_device_info *di = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) int regval = -1, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) const int *slew_rate_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) int slew_rate_n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) switch (di->vendor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) case FAN53555_VENDOR_FAIRCHILD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) case FAN53555_VENDOR_RK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) case FAN53555_VENDOR_SILERGY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) slew_rate_t = slew_rates;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) slew_rate_n = ARRAY_SIZE(slew_rates);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) case FAN53555_VENDOR_TCS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) slew_rate_t = tcs_slew_rates;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) slew_rate_n = ARRAY_SIZE(tcs_slew_rates);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) for (i = 0; i < slew_rate_n; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (ramp <= slew_rate_t[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) regval = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (regval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) dev_err(di->dev, "unsupported ramp value %d\n", ramp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return regmap_update_bits(di->regmap, di->slew_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) di->slew_mask, regval << di->slew_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static const struct regulator_ops fan53555_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .get_voltage_sel = fan53555_get_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .set_voltage_time_sel = regulator_set_voltage_time_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .set_suspend_voltage = fan53555_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .enable = fan53555_set_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .disable = fan53555_set_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .is_enabled = fan53555_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .set_mode = fan53555_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .get_mode = fan53555_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .set_ramp_delay = fan53555_set_ramp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .set_suspend_enable = fan53555_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .set_suspend_disable = fan53555_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static int fan53526_voltages_setup_fairchild(struct fan53555_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* Init voltage range and step */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) switch (di->chip_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) case FAN53526_CHIP_ID_01:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) switch (di->chip_rev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) case FAN53526_CHIP_REV_08:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) di->vsel_min = 600000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) di->vsel_step = 6250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) dev_err(di->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) "Chip ID %d with rev %d not supported!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) di->chip_id, di->chip_rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) dev_err(di->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) "Chip ID %d not supported!\n", di->chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) di->n_voltages = FAN53555_NVOLTAGES_64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static int fan53555_voltages_setup_fairchild(struct fan53555_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* Init voltage range and step */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) switch (di->chip_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) case FAN53555_CHIP_ID_00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) switch (di->chip_rev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) case FAN53555_CHIP_REV_00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) di->vsel_min = 600000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) di->vsel_step = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) case FAN53555_CHIP_REV_13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) di->vsel_min = 800000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) di->vsel_step = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) dev_err(di->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) "Chip ID %d with rev %d not supported!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) di->chip_id, di->chip_rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) case FAN53555_CHIP_ID_01:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) case FAN53555_CHIP_ID_03:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) case FAN53555_CHIP_ID_05:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) case FAN53555_CHIP_ID_08:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) di->vsel_min = 600000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) di->vsel_step = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) case FAN53555_CHIP_ID_04:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) di->vsel_min = 603000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) di->vsel_step = 12826;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) dev_err(di->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) "Chip ID %d not supported!\n", di->chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) di->vol_mask = VSEL_NSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) di->mode_reg = di->vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) di->mode_mask = VSEL_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) di->slew_reg = FAN53555_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) di->slew_mask = CTL_SLEW_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) di->slew_shift = CTL_SLEW_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) di->n_voltages = FAN53555_NVOLTAGES_64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static int fan53555_voltages_setup_rk(struct fan53555_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct fan53555_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int ret = 0, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (di->sleep_vsel_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) di->sleep_reg = RK860X_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) di->vol_reg = RK860X_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) di->mode_reg = FAN53555_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) di->en_reg = FAN53555_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) di->sleep_en_reg = FAN53555_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) di->sleep_reg = RK860X_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) di->vol_reg = RK860X_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) di->mode_reg = FAN53555_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) di->en_reg = FAN53555_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) di->sleep_en_reg = FAN53555_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) di->mode_mask = VSEL_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) di->vol_mask = RK_VSEL_NSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) di->slew_reg = FAN53555_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) di->slew_mask = CTL_SLEW_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) di->slew_shift = CTL_SLEW_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) /* Init voltage range and step */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) di->vsel_min = 500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) di->vsel_step = 6250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) di->n_voltages = FAN53555_NVOLTAGES_160;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (pdata->limit_volt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (pdata->limit_volt < di->vsel_min ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) pdata->limit_volt > 1500000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) pdata->limit_volt = 1500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) val = (pdata->limit_volt - di->vsel_min) / di->vsel_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) ret = regmap_write(di->regmap, RK860X_MAX_SET, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) dev_err(di->dev, "Failed to set limit voltage!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static int fan53555_voltages_setup_silergy(struct fan53555_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) /* Init voltage range and step */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) switch (di->chip_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) case SILERGY_SYR82X:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) case SILERGY_SYR83X:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) di->vsel_min = 712500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) di->vsel_step = 12500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) dev_err(di->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) "Chip ID %d not supported!\n", di->chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) di->vol_mask = VSEL_NSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) di->mode_reg = di->vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) di->mode_mask = VSEL_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) di->slew_reg = FAN53555_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) di->slew_reg = FAN53555_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) di->slew_mask = CTL_SLEW_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) di->slew_shift = CTL_SLEW_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) di->n_voltages = FAN53555_NVOLTAGES_64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static int fan53555_voltages_setup_tcs(struct fan53555_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (di->sleep_vsel_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) di->sleep_reg = TCS452X_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) di->vol_reg = TCS452X_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) di->mode_mask = TCS_VSEL0_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) di->sleep_reg = TCS452X_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) di->vol_reg = TCS452X_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) di->mode_mask = TCS_VSEL1_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) di->mode_reg = TCS452X_COMMAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) di->vol_mask = TCS_VSEL_NSEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) di->slew_reg = TCS452X_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) di->slew_mask = TCS_SLEW_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) di->slew_shift = TCS_SLEW_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /* Init voltage range and step */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) di->vsel_min = 600000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) di->vsel_step = 6250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) di->n_voltages = FAN53555_NVOLTAGES_127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) di->en_reg = di->vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) di->sleep_en_reg = di->sleep_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* For 00,01,03,05 options:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * VOUT = 0.60V + NSELx * 10mV, from 0.60 to 1.23V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * For 04 option:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * VOUT = 0.603V + NSELx * 12.826mV, from 0.603 to 1.411V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static int fan53555_device_setup(struct fan53555_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) struct fan53555_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /* Setup voltage control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) switch (pdata->sleep_vsel_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) case FAN53555_VSEL_ID_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) di->sleep_reg = FAN53555_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) di->vol_reg = FAN53555_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) case FAN53555_VSEL_ID_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) di->sleep_reg = FAN53555_VSEL1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) di->vol_reg = FAN53555_VSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) dev_err(di->dev, "Invalid VSEL ID!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) di->en_reg = di->vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) di->sleep_en_reg = di->sleep_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) /* Setup voltage range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) switch (di->vendor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) case FAN53526_VENDOR_FAIRCHILD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) di->mode_reg = FAN53555_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) switch (pdata->sleep_vsel_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) case FAN53555_VSEL_ID_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) di->mode_mask = CTL_MODE_VSEL1_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) case FAN53555_VSEL_ID_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) di->mode_mask = CTL_MODE_VSEL0_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) ret = fan53526_voltages_setup_fairchild(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) case FAN53555_VENDOR_FAIRCHILD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) ret = fan53555_voltages_setup_fairchild(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) case FAN53555_VENDOR_RK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) ret = fan53555_voltages_setup_rk(di, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) case FAN53555_VENDOR_SILERGY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) ret = fan53555_voltages_setup_silergy(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) case FAN53555_VENDOR_TCS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) ret = fan53555_voltages_setup_tcs(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) dev_err(di->dev, "vendor %d not supported!\n", di->vendor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) static int fan53555_regulator_register(struct fan53555_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) struct regulator_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) struct regulator_desc *rdesc = &di->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) rdesc->name = "fan53555-reg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) rdesc->supply_name = "vin";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) rdesc->ops = &fan53555_regulator_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) rdesc->type = REGULATOR_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) rdesc->n_voltages = di->n_voltages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) rdesc->enable_reg = di->en_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) rdesc->enable_mask = VSEL_BUCK_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) rdesc->min_uV = di->vsel_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) rdesc->uV_step = di->vsel_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) rdesc->vsel_reg = di->vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) rdesc->vsel_mask = di->vol_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) rdesc->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) rdesc->enable_time = 400;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) di->rdev = devm_regulator_register(di->dev, &di->desc, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) return PTR_ERR_OR_ZERO(di->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static const struct regmap_config fan53555_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static struct fan53555_platform_data *fan53555_parse_dt(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) const struct regulator_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) struct fan53555_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) int ret, flag, limit_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) pdata->regulator = of_get_regulator_init_data(dev, np, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) pdata->regulator->constraints.initial_state = PM_SUSPEND_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) if (!(of_property_read_u32(np, "limit-microvolt", &limit_volt)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) pdata->limit_volt = limit_volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ret = of_property_read_u32(np, "fcs,suspend-voltage-selector",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) pdata->sleep_vsel_id = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if (pdata->sleep_vsel_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) flag = GPIOD_OUT_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) flag = GPIOD_OUT_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) pdata->vsel_gpio =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) devm_gpiod_get_index_optional(dev, "vsel", 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (IS_ERR(pdata->vsel_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) ret = PTR_ERR(pdata->vsel_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) dev_err(dev, "failed to get vesl gpio (%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) pdata->vsel_gpio = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) return pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static const struct of_device_id __maybe_unused fan53555_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .compatible = "fcs,fan53526",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) .data = (void *)FAN53526_VENDOR_FAIRCHILD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .compatible = "fcs,fan53555",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .data = (void *)FAN53555_VENDOR_FAIRCHILD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .compatible = "silergy,syr827",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) .data = (void *)FAN53555_VENDOR_SILERGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .compatible = "silergy,syr828",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .data = (void *)FAN53555_VENDOR_SILERGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .compatible = "tcs,tcs452x", /* tcs4525/4526 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .data = (void *)FAN53555_VENDOR_TCS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) MODULE_DEVICE_TABLE(of, fan53555_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) static int fan53555_regulator_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct device_node *np = client->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) struct fan53555_device_info *di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) struct fan53555_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) di = devm_kzalloc(&client->dev, sizeof(struct fan53555_device_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (!di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) di->desc.of_map_mode = fan53555_map_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) pdata = fan53555_parse_dt(&client->dev, np, &di->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (!pdata || !pdata->regulator) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) dev_err(&client->dev, "Platform data not found!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) di->vsel_gpio = pdata->vsel_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) di->sleep_vsel_id = pdata->sleep_vsel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) di->regulator = pdata->regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (client->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) di->vendor =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) (unsigned long)of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) /* if no ramp constraint set, get the pdata ramp_delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (!di->regulator->constraints.ramp_delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (pdata->slew_rate >= ARRAY_SIZE(slew_rates)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) dev_err(&client->dev, "Invalid slew_rate\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) di->regulator->constraints.ramp_delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) = slew_rates[pdata->slew_rate];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) di->vendor = id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) di->regmap = devm_regmap_init_i2c(client, &fan53555_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) if (IS_ERR(di->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) dev_err(&client->dev, "Failed to allocate regmap!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) return PTR_ERR(di->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) di->dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) i2c_set_clientdata(client, di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) /* Get chip ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) ret = regmap_read(di->regmap, FAN53555_ID1, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) dev_err(&client->dev, "Failed to get chip ID!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) di->chip_id = val & DIE_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) /* Get chip revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) ret = regmap_read(di->regmap, FAN53555_ID2, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) dev_err(&client->dev, "Failed to get chip Rev!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) di->chip_rev = val & DIE_REV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) dev_info(&client->dev, "FAN53555 Option[%d] Rev[%d] Detected!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) di->chip_id, di->chip_rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) /* Device init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) ret = fan53555_device_setup(di, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) dev_err(&client->dev, "Failed to setup device!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) /* Register regulator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) config.dev = di->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) config.init_data = di->regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) config.regmap = di->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) config.driver_data = di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) config.of_node = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) ret = fan53555_regulator_register(di, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) dev_err(&client->dev, "Failed to register regulator!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static void fan53555_regulator_shutdown(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) struct fan53555_device_info *di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) di = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) dev_info(di->dev, "fan53555..... reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) switch (di->vendor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) case FAN53555_VENDOR_FAIRCHILD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) case FAN53555_VENDOR_RK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) case FAN53555_VENDOR_SILERGY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) ret = regmap_update_bits(di->regmap, di->slew_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) CTL_RESET, CTL_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) case FAN53555_VENDOR_TCS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) ret = regmap_update_bits(di->regmap, TCS452X_LIMCONF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) CTL_RESET, CTL_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) * the device can't return 'ack' during the reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) * it will return -ENXIO, ignore this error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (ret == -ENXIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) dev_err(di->dev, "reset: force fan53555_reset error! ret=%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) dev_info(di->dev, "reset: force fan53555_reset ok!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) static const struct i2c_device_id fan53555_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) .name = "fan53526",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .driver_data = FAN53526_VENDOR_FAIRCHILD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .name = "fan53555",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .driver_data = FAN53555_VENDOR_FAIRCHILD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) .name = "syr827",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) .driver_data = FAN53555_VENDOR_SILERGY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .name = "syr828",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) .driver_data = FAN53555_VENDOR_SILERGY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) .name = "tcs452x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) .driver_data = FAN53555_VENDOR_TCS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) MODULE_DEVICE_TABLE(i2c, fan53555_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) static struct i2c_driver fan53555_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .name = "fan53555-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .of_match_table = of_match_ptr(fan53555_dt_ids),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) .probe = fan53555_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) .shutdown = fan53555_regulator_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .id_table = fan53555_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) module_i2c_driver(fan53555_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) MODULE_AUTHOR("Yunfan Zhang <yfzhang@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) MODULE_DESCRIPTION("FAN53555 regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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