^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Regulator driver for DA9063 PMIC series
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright 2012 Dialog Semiconductors Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright 2013 Philipp Zabel, Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // Author: Krystian Garbaciak <krystian.garbaciak@diasemi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mfd/da9063/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/mfd/da9063/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* Definition for registering regmap bit fields using a mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BFIELD(_reg, _mask) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) REG_FIELD(_reg, __builtin_ffs((int)_mask) - 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) sizeof(unsigned int) * 8 - __builtin_clz((_mask)) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* DA9063 and DA9063L regulator IDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* BUCKs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) DA9063_ID_BCORE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) DA9063_ID_BCORE2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) DA9063_ID_BPRO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) DA9063_ID_BMEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) DA9063_ID_BIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) DA9063_ID_BPERI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* BCORE1 and BCORE2 in merged mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) DA9063_ID_BCORES_MERGED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* BMEM and BIO in merged mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) DA9063_ID_BMEM_BIO_MERGED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* When two BUCKs are merged, they cannot be reused separately */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* LDOs on both DA9063 and DA9063L */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) DA9063_ID_LDO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) DA9063_ID_LDO7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) DA9063_ID_LDO8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) DA9063_ID_LDO9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) DA9063_ID_LDO11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* DA9063-only LDOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) DA9063_ID_LDO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) DA9063_ID_LDO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) DA9063_ID_LDO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) DA9063_ID_LDO5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) DA9063_ID_LDO6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) DA9063_ID_LDO10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Old regulator platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct da9063_regulator_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct regulator_init_data *initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct da9063_regulators_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned int n_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct da9063_regulator_data *regulator_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* Regulator capabilities and registers description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct da9063_regulator_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* DA9063 main register fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct reg_field mode; /* buck mode of operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct reg_field suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct reg_field sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct reg_field suspend_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned int suspend_vsel_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* DA9063 event detection bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct reg_field oc_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* Macros for LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define DA9063_LDO(chip, regl_name, min_mV, step_mV, max_mV) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .desc.id = chip##_ID_##regl_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .desc.name = __stringify(chip##_##regl_name), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .desc.ops = &da9063_ldo_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .desc.min_uV = (min_mV) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .desc.uV_step = (step_mV) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .desc.n_voltages = (((max_mV) - (min_mV))/(step_mV) + 1 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) + (DA9063_V##regl_name##_BIAS)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .desc.enable_reg = DA9063_REG_##regl_name##_CONT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .desc.enable_mask = DA9063_LDO_EN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .desc.vsel_reg = DA9063_REG_V##regl_name##_A, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .desc.vsel_mask = DA9063_V##regl_name##_MASK, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .desc.linear_min_sel = DA9063_V##regl_name##_BIAS, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .sleep = BFIELD(DA9063_REG_V##regl_name##_A, DA9063_LDO_SL), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .suspend = BFIELD(DA9063_REG_##regl_name##_CONT, DA9063_LDO_CONF), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .suspend_sleep = BFIELD(DA9063_REG_V##regl_name##_B, DA9063_LDO_SL), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .suspend_vsel_reg = DA9063_REG_V##regl_name##_B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* Macros for voltage DC/DC converters (BUCKs) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define DA9063_BUCK(chip, regl_name, min_mV, step_mV, max_mV, limits_array, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) creg, cmask) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .desc.id = chip##_ID_##regl_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .desc.name = __stringify(chip##_##regl_name), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .desc.ops = &da9063_buck_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .desc.min_uV = (min_mV) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .desc.uV_step = (step_mV) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .desc.n_voltages = ((max_mV) - (min_mV))/(step_mV) + 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .desc.csel_reg = (creg), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .desc.csel_mask = (cmask), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .desc.curr_table = limits_array, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .desc.n_current_limits = ARRAY_SIZE(limits_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define DA9063_BUCK_COMMON_FIELDS(regl_name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .desc.enable_reg = DA9063_REG_##regl_name##_CONT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .desc.enable_mask = DA9063_BUCK_EN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .desc.vsel_reg = DA9063_REG_V##regl_name##_A, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .desc.vsel_mask = DA9063_VBUCK_MASK, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .desc.linear_min_sel = DA9063_VBUCK_BIAS, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .sleep = BFIELD(DA9063_REG_V##regl_name##_A, DA9063_BUCK_SL), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .suspend = BFIELD(DA9063_REG_##regl_name##_CONT, DA9063_BUCK_CONF), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .suspend_sleep = BFIELD(DA9063_REG_V##regl_name##_B, DA9063_BUCK_SL), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .suspend_vsel_reg = DA9063_REG_V##regl_name##_B, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .mode = BFIELD(DA9063_REG_##regl_name##_CFG, DA9063_BUCK_MODE_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* Defines asignment of regulators info table to chip model */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct da9063_dev_model {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) const struct da9063_regulator_info *regulator_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) unsigned int n_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) enum da9063_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* Single regulator settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct da9063_regulator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct da9063 *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) const struct da9063_regulator_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct regmap_field *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct regmap_field *suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct regmap_field *sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct regmap_field *suspend_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* Encapsulates all information for the regulators driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct da9063_regulators {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) unsigned int n_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* Array size to be defined during init. Keep at end. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct da9063_regulator regulator[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* BUCK modes for DA9063 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) BUCK_MODE_MANUAL, /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) BUCK_MODE_SLEEP, /* 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) BUCK_MODE_SYNC, /* 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) BUCK_MODE_AUTO /* 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /* Regulator operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * Current limits array (in uA) for BCORE1, BCORE2, BPRO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * Entry indexes corresponds to register values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const unsigned int da9063_buck_a_limits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 500000, 600000, 700000, 800000, 900000, 1000000, 1100000, 1200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1900000, 2000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * Current limits array (in uA) for BMEM, BIO, BPERI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * Entry indexes corresponds to register values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static const unsigned int da9063_buck_b_limits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 1500000, 1600000, 1700000, 1800000, 1900000, 2000000, 2100000, 2200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 2300000, 2400000, 2500000, 2600000, 2700000, 2800000, 2900000, 3000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * Current limits array (in uA) for merged BCORE1 and BCORE2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * Entry indexes corresponds to register values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static const unsigned int da9063_bcores_merged_limits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 1000000, 1200000, 1400000, 1600000, 1800000, 2000000, 2200000, 2400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 2600000, 2800000, 3000000, 3200000, 3400000, 3600000, 3800000, 4000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * Current limits array (in uA) for merged BMEM and BIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * Entry indexes corresponds to register values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static const unsigned int da9063_bmem_bio_merged_limits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 3000000, 3200000, 3400000, 3600000, 3800000, 4000000, 4200000, 4400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 4600000, 4800000, 5000000, 5200000, 5400000, 5600000, 5800000, 6000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int da9063_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) case REGULATOR_MODE_FAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) val = BUCK_MODE_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) val = BUCK_MODE_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) case REGULATOR_MODE_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) val = BUCK_MODE_SLEEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return regmap_field_write(regl->mode, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * Bucks use single mode register field for normal operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * and suspend state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * There are 3 modes to map to: FAST, NORMAL, and STANDBY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static unsigned int da9063_buck_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ret = regmap_field_read(regl->mode, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) case BUCK_MODE_MANUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /* Sleep flag bit decides the mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) case BUCK_MODE_SLEEP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return REGULATOR_MODE_STANDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) case BUCK_MODE_SYNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) case BUCK_MODE_AUTO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = regmap_field_read(regl->sleep, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return REGULATOR_MODE_STANDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return REGULATOR_MODE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * LDOs use sleep flags - one for normal and one for suspend state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * There are 2 modes to map to: NORMAL and STANDBY (sleep) for each state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static int da9063_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) case REGULATOR_MODE_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) val = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return regmap_field_write(regl->sleep, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static unsigned int da9063_ldo_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) int ret, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ret = regmap_field_read(regl->sleep, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return REGULATOR_MODE_STANDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static int da9063_buck_get_status(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int ret = regulator_is_enabled_regmap(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (ret == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ret = REGULATOR_STATUS_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) } else if (ret > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ret = da9063_buck_get_mode(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (ret > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ret = regulator_mode_to_status(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) else if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static int da9063_ldo_get_status(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) int ret = regulator_is_enabled_regmap(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (ret == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ret = REGULATOR_STATUS_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) } else if (ret > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) ret = da9063_ldo_get_mode(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (ret > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ret = regulator_mode_to_status(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) else if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static int da9063_set_suspend_voltage(struct regulator_dev *rdev, int uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) const struct da9063_regulator_info *rinfo = regl->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) int ret, sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) sel = regulator_map_voltage_linear(rdev, uV, uV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (sel < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) sel <<= ffs(rdev->desc->vsel_mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) ret = regmap_update_bits(regl->hw->regmap, rinfo->suspend_vsel_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) rdev->desc->vsel_mask, sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int da9063_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return regmap_field_write(regl->suspend, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static int da9063_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return regmap_field_write(regl->suspend, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static int da9063_buck_set_suspend_mode(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) case REGULATOR_MODE_FAST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) val = BUCK_MODE_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) val = BUCK_MODE_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) case REGULATOR_MODE_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) val = BUCK_MODE_SLEEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return regmap_field_write(regl->mode, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int da9063_ldo_set_suspend_mode(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct da9063_regulator *regl = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) case REGULATOR_MODE_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) val = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return regmap_field_write(regl->suspend_sleep, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static const struct regulator_ops da9063_buck_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .set_current_limit = regulator_set_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .get_current_limit = regulator_get_current_limit_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .set_mode = da9063_buck_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .get_mode = da9063_buck_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .get_status = da9063_buck_get_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .set_suspend_voltage = da9063_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .set_suspend_enable = da9063_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .set_suspend_disable = da9063_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .set_suspend_mode = da9063_buck_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static const struct regulator_ops da9063_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .set_mode = da9063_ldo_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .get_mode = da9063_ldo_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .get_status = da9063_ldo_get_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .set_suspend_voltage = da9063_set_suspend_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .set_suspend_enable = da9063_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .set_suspend_disable = da9063_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .set_suspend_mode = da9063_ldo_set_suspend_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* Info of regulators for DA9063 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static const struct da9063_regulator_info da9063_regulator_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) DA9063_BUCK(DA9063, BCORE1, 300, 10, 1570,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) da9063_buck_a_limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) DA9063_REG_BUCK_ILIM_C, DA9063_BCORE1_ILIM_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) DA9063_BUCK_COMMON_FIELDS(BCORE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) DA9063_BUCK(DA9063, BCORE2, 300, 10, 1570,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) da9063_buck_a_limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) DA9063_REG_BUCK_ILIM_C, DA9063_BCORE2_ILIM_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) DA9063_BUCK_COMMON_FIELDS(BCORE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) DA9063_BUCK(DA9063, BPRO, 530, 10, 1800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) da9063_buck_a_limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) DA9063_REG_BUCK_ILIM_B, DA9063_BPRO_ILIM_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) DA9063_BUCK_COMMON_FIELDS(BPRO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) DA9063_BUCK(DA9063, BMEM, 800, 20, 3340,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) da9063_buck_b_limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) DA9063_REG_BUCK_ILIM_A, DA9063_BMEM_ILIM_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) DA9063_BUCK_COMMON_FIELDS(BMEM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) DA9063_BUCK(DA9063, BIO, 800, 20, 3340,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) da9063_buck_b_limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) DA9063_REG_BUCK_ILIM_A, DA9063_BIO_ILIM_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) DA9063_BUCK_COMMON_FIELDS(BIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) DA9063_BUCK(DA9063, BPERI, 800, 20, 3340,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) da9063_buck_b_limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) DA9063_REG_BUCK_ILIM_B, DA9063_BPERI_ILIM_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) DA9063_BUCK_COMMON_FIELDS(BPERI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) DA9063_BUCK(DA9063, BCORES_MERGED, 300, 10, 1570,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) da9063_bcores_merged_limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) DA9063_REG_BUCK_ILIM_C, DA9063_BCORE1_ILIM_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* BCORES_MERGED uses the same register fields as BCORE1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) DA9063_BUCK_COMMON_FIELDS(BCORE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) DA9063_BUCK(DA9063, BMEM_BIO_MERGED, 800, 20, 3340,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) da9063_bmem_bio_merged_limits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) DA9063_REG_BUCK_ILIM_A, DA9063_BMEM_ILIM_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* BMEM_BIO_MERGED uses the same register fields as BMEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) DA9063_BUCK_COMMON_FIELDS(BMEM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) DA9063_LDO(DA9063, LDO3, 900, 20, 3440),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO3_LIM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) DA9063_LDO(DA9063, LDO7, 900, 50, 3600),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO7_LIM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) DA9063_LDO(DA9063, LDO8, 900, 50, 3600),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO8_LIM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) DA9063_LDO(DA9063, LDO9, 950, 50, 3600),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) DA9063_LDO(DA9063, LDO11, 900, 50, 3600),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO11_LIM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* The following LDOs are present only on DA9063, not on DA9063L */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) DA9063_LDO(DA9063, LDO1, 600, 20, 1860),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) DA9063_LDO(DA9063, LDO2, 600, 20, 1860),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) DA9063_LDO(DA9063, LDO4, 900, 20, 3440),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO4_LIM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) DA9063_LDO(DA9063, LDO5, 900, 50, 3600),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) DA9063_LDO(DA9063, LDO6, 900, 50, 3600),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) DA9063_LDO(DA9063, LDO10, 900, 50, 3600),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) /* Link chip model with regulators info table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static struct da9063_dev_model regulators_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .regulator_info = da9063_regulator_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .n_regulators = ARRAY_SIZE(da9063_regulator_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .type = PMIC_TYPE_DA9063,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .regulator_info = da9063_regulator_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .n_regulators = ARRAY_SIZE(da9063_regulator_info) - 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .type = PMIC_TYPE_DA9063L,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /* Regulator interrupt handlers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) static irqreturn_t da9063_ldo_lim_event(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) struct da9063_regulators *regulators = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) struct da9063 *hw = regulators->regulator[0].hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) struct da9063_regulator *regl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) int bits, i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ret = regmap_read(hw->regmap, DA9063_REG_STATUS_D, &bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) for (i = regulators->n_regulators - 1; i >= 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) regl = ®ulators->regulator[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (regl->info->oc_event.reg != DA9063_REG_STATUS_D)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (BIT(regl->info->oc_event.lsb) & bits) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) regulator_notifier_call_chain(regl->rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) REGULATOR_EVENT_OVER_CURRENT, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * Probing and Initialisation functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) static const struct regulator_init_data *da9063_get_regulator_initdata(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) const struct da9063_regulators_pdata *regl_pdata, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) for (i = 0; i < regl_pdata->n_regulators; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (id == regl_pdata->regulator_data[i].id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return regl_pdata->regulator_data[i].initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static struct of_regulator_match da9063_matches[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) [DA9063_ID_BCORE1] = { .name = "bcore1" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) [DA9063_ID_BCORE2] = { .name = "bcore2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) [DA9063_ID_BPRO] = { .name = "bpro", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) [DA9063_ID_BMEM] = { .name = "bmem", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) [DA9063_ID_BIO] = { .name = "bio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) [DA9063_ID_BPERI] = { .name = "bperi", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) [DA9063_ID_BCORES_MERGED] = { .name = "bcores-merged" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) [DA9063_ID_BMEM_BIO_MERGED] = { .name = "bmem-bio-merged", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) [DA9063_ID_LDO3] = { .name = "ldo3", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) [DA9063_ID_LDO7] = { .name = "ldo7", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) [DA9063_ID_LDO8] = { .name = "ldo8", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) [DA9063_ID_LDO9] = { .name = "ldo9", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) [DA9063_ID_LDO11] = { .name = "ldo11", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /* The following LDOs are present only on DA9063, not on DA9063L */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) [DA9063_ID_LDO1] = { .name = "ldo1", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) [DA9063_ID_LDO2] = { .name = "ldo2", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) [DA9063_ID_LDO4] = { .name = "ldo4", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) [DA9063_ID_LDO5] = { .name = "ldo5", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) [DA9063_ID_LDO6] = { .name = "ldo6", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) [DA9063_ID_LDO10] = { .name = "ldo10", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static struct da9063_regulators_pdata *da9063_parse_regulators_dt(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) struct of_regulator_match **da9063_reg_matches)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) struct da9063_regulators_pdata *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) struct da9063_regulator_data *rdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) int da9063_matches_len = ARRAY_SIZE(da9063_matches);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) int i, n, num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (da9063->type == PMIC_TYPE_DA9063L)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) da9063_matches_len -= 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) node = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (!node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) dev_err(&pdev->dev, "Regulators device node not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) num = of_regulator_match(&pdev->dev, node, da9063_matches,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) da9063_matches_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) if (num < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) dev_err(&pdev->dev, "Failed to match regulators\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) pdata->regulator_data = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) num, sizeof(*pdata->regulator_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (!pdata->regulator_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) pdata->n_regulators = num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) n = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) for (i = 0; i < da9063_matches_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if (!da9063_matches[i].init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) rdata = &pdata->regulator_data[n];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) rdata->id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) rdata->initdata = da9063_matches[i].init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) n++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) *da9063_reg_matches = da9063_matches;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) return pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static int da9063_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) struct of_regulator_match *da9063_reg_matches = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) struct da9063_regulators_pdata *regl_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) const struct da9063_dev_model *model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) struct da9063_regulators *regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct da9063_regulator *regl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) struct regulator_config config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) bool bcores_merged, bmem_bio_merged;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) int id, irq, n, n_regulators, ret, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) regl_pdata = da9063_parse_regulators_dt(pdev, &da9063_reg_matches);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (IS_ERR(regl_pdata) || regl_pdata->n_regulators == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) "No regulators defined for the platform\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /* Find regulators set for particular device model */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) for (model = regulators_models; model->regulator_info; model++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (model->type == da9063->type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (!model->regulator_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) dev_err(&pdev->dev, "Chip model not recognised (%u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) da9063->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ret = regmap_read(da9063->regmap, DA9063_REG_CONFIG_H, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) "Error while reading BUCKs configuration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) bcores_merged = val & DA9063_BCORE_MERGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) bmem_bio_merged = val & DA9063_BUCK_MERGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) n_regulators = model->n_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) if (bcores_merged)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) n_regulators -= 2; /* remove BCORE1, BCORE2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) n_regulators--; /* remove BCORES_MERGED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) if (bmem_bio_merged)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) n_regulators -= 2; /* remove BMEM, BIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) n_regulators--; /* remove BMEM_BIO_MERGED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) /* Allocate memory required by usable regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) regulators = devm_kzalloc(&pdev->dev, struct_size(regulators,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) regulator, n_regulators), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (!regulators)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) regulators->n_regulators = n_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) platform_set_drvdata(pdev, regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) /* Register all regulators declared in platform information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) n = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) while (n < regulators->n_regulators) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) /* Skip regulator IDs depending on merge mode configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) case DA9063_ID_BCORE1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) case DA9063_ID_BCORE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) if (bcores_merged) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) id++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) case DA9063_ID_BMEM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) case DA9063_ID_BIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) if (bmem_bio_merged) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) id++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) case DA9063_ID_BCORES_MERGED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) if (!bcores_merged) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) id++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) case DA9063_ID_BMEM_BIO_MERGED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (!bmem_bio_merged) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) id++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) /* Initialise regulator structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) regl = ®ulators->regulator[n];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) regl->hw = da9063;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) regl->info = &model->regulator_info[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) regl->desc = regl->info->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) regl->desc.type = REGULATOR_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) regl->desc.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) if (regl->info->mode.reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) regl->mode = devm_regmap_field_alloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) da9063->regmap, regl->info->mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if (IS_ERR(regl->mode))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) return PTR_ERR(regl->mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) if (regl->info->suspend.reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) regl->suspend = devm_regmap_field_alloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) da9063->regmap, regl->info->suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (IS_ERR(regl->suspend))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) return PTR_ERR(regl->suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) if (regl->info->sleep.reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) regl->sleep = devm_regmap_field_alloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) da9063->regmap, regl->info->sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) if (IS_ERR(regl->sleep))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) return PTR_ERR(regl->sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) if (regl->info->suspend_sleep.reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) regl->suspend_sleep = devm_regmap_field_alloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) da9063->regmap, regl->info->suspend_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) if (IS_ERR(regl->suspend_sleep))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) return PTR_ERR(regl->suspend_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) /* Register regulator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) memset(&config, 0, sizeof(config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) config.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) config.init_data = da9063_get_regulator_initdata(regl_pdata, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) config.driver_data = regl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (da9063_reg_matches)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) config.of_node = da9063_reg_matches[id].of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) config.regmap = da9063->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) regl->rdev = devm_regulator_register(&pdev->dev, ®l->desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) if (IS_ERR(regl->rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) "Failed to register %s regulator\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) regl->desc.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return PTR_ERR(regl->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) id++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) n++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /* LDOs overcurrent event support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) irq = platform_get_irq_byname(pdev, "LDO_LIM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) ret = devm_request_threaded_irq(&pdev->dev, irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) NULL, da9063_ldo_lim_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) IRQF_TRIGGER_LOW | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) "LDO_LIM", regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) dev_err(&pdev->dev, "Failed to request LDO_LIM IRQ.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) static struct platform_driver da9063_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .name = DA9063_DRVNAME_REGULATORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) .probe = da9063_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static int __init da9063_regulator_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) return platform_driver_register(&da9063_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) subsys_initcall(da9063_regulator_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static void __exit da9063_regulator_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) platform_driver_unregister(&da9063_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) module_exit(da9063_regulator_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) /* Module information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) MODULE_AUTHOR("Krystian Garbaciak <krystian.garbaciak@diasemi.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) MODULE_DESCRIPTION("DA9063 regulators driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) MODULE_ALIAS("platform:" DA9063_DRVNAME_REGULATORS);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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