^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Regulators driver for Dialog Semiconductor DA903x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (C) 2006-2008 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright (C) 2008 Compulab Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/da903x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* DA9030 Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define DA9030_INVAL (-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define DA9030_LDO1011 (0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DA9030_LDO15 (0x11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define DA9030_LDO1416 (0x12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define DA9030_LDO1819 (0x13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DA9030_LDO17 (0x14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DA9030_BUCK2DVM1 (0x15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DA9030_BUCK2DVM2 (0x16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DA9030_RCTL11 (0x17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DA9030_RCTL21 (0x18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DA9030_LDO1 (0x90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DA9030_LDO23 (0x91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DA9030_LDO45 (0x92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DA9030_LDO6 (0x93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define DA9030_LDO78 (0x94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define DA9030_LDO912 (0x95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define DA9030_BUCK (0x96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DA9030_RCTL12 (0x97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DA9030_RCTL22 (0x98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DA9030_LDO_UNLOCK (0xa0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define DA9030_LDO_UNLOCK_MASK (0xe0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define DA9034_OVER1 (0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* DA9034 Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define DA9034_INVAL (-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define DA9034_OVER2 (0x11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define DA9034_OVER3 (0x12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define DA9034_LDO643 (0x13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define DA9034_LDO987 (0x14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define DA9034_LDO1110 (0x15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define DA9034_LDO1312 (0x16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define DA9034_LDO1514 (0x17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define DA9034_VCC1 (0x20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define DA9034_ADTV1 (0x23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define DA9034_ADTV2 (0x24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define DA9034_AVRC (0x25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define DA9034_CDTV1 (0x26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define DA9034_CDTV2 (0x27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define DA9034_CVRC (0x28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define DA9034_SDTV1 (0x29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define DA9034_SDTV2 (0x2a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define DA9034_SVRC (0x2b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define DA9034_MDTV1 (0x32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define DA9034_MDTV2 (0x33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define DA9034_MVRC (0x34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* DA9035 Registers. DA9034 Registers are comptabile to DA9035. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define DA9035_OVER3 (0x12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define DA9035_VCC2 (0x1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define DA9035_3DTV1 (0x2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define DA9035_3DTV2 (0x2d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define DA9035_3VRC (0x2e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define DA9035_AUTOSKIP (0x2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct da903x_regulator_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int max_uV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int vol_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int vol_nbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int update_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) int update_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int enable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int enable_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static inline struct device *to_da903x_dev(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return rdev_get_dev(rdev)->parent->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static inline int check_range(struct da903x_regulator_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int min_uV, int max_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (min_uV < info->desc.min_uV || min_uV > info->max_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* DA9030/DA9034 common operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int da903x_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct device *da9034_dev = to_da903x_dev(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) uint8_t val, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (rdev->desc->n_voltages == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) val = selector << info->vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return da903x_update(da9034_dev, info->vol_reg, val, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int da903x_get_voltage_sel(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct device *da9034_dev = to_da903x_dev(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) uint8_t val, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (rdev->desc->n_voltages == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ret = da903x_read(da9034_dev, info->vol_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) val = (val & mask) >> info->vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int da903x_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct device *da9034_dev = to_da903x_dev(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return da903x_set_bits(da9034_dev, info->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 1 << info->enable_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int da903x_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct device *da9034_dev = to_da903x_dev(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return da903x_clr_bits(da9034_dev, info->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 1 << info->enable_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int da903x_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct device *da9034_dev = to_da903x_dev(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) uint8_t reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ret = da903x_read(da9034_dev, info->enable_reg, ®_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return !!(reg_val & (1 << info->enable_bit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* DA9030 specific operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int da9030_set_ldo1_15_voltage_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct device *da903x_dev = to_da903x_dev(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) uint8_t val, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) val = selector << info->vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) val |= DA9030_LDO_UNLOCK; /* have to set UNLOCK bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) mask |= DA9030_LDO_UNLOCK_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* write twice */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ret = da903x_update(da903x_dev, info->vol_reg, val, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return da903x_update(da903x_dev, info->vol_reg, val, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int da9030_map_ldo14_voltage(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) int min_uV, int max_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int thresh, sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (check_range(info, min_uV, max_uV)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) thresh = (info->max_uV + info->desc.min_uV) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (min_uV < thresh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) sel = DIV_ROUND_UP(thresh - min_uV, info->desc.uV_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) sel |= 0x4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) sel = DIV_ROUND_UP(min_uV - thresh, info->desc.uV_step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static int da9030_list_ldo14_voltage(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) int volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (selector & 0x4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) volt = rdev->desc->min_uV +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) rdev->desc->uV_step * (3 - (selector & ~0x4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) volt = (info->max_uV + rdev->desc->min_uV) / 2 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) rdev->desc->uV_step * (selector & ~0x4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (volt > info->max_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* DA9034 specific operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int da9034_set_dvc_voltage_sel(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) struct da903x_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct device *da9034_dev = to_da903x_dev(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) uint8_t val, mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) val = selector << info->vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ret = da903x_update(da9034_dev, info->vol_reg, val, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ret = da903x_set_bits(da9034_dev, info->update_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 1 << info->update_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static const struct linear_range da9034_ldo12_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) REGULATOR_LINEAR_RANGE(1700000, 0, 7, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) REGULATOR_LINEAR_RANGE(2700000, 8, 15, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static const struct regulator_ops da903x_regulator_ldo_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .set_voltage_sel = da903x_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .get_voltage_sel = da903x_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .enable = da903x_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .disable = da903x_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .is_enabled = da903x_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* NOTE: this is dedicated for the insane DA9030 LDO14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const struct regulator_ops da9030_regulator_ldo14_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .set_voltage_sel = da903x_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .get_voltage_sel = da903x_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .list_voltage = da9030_list_ldo14_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .map_voltage = da9030_map_ldo14_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .enable = da903x_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .disable = da903x_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .is_enabled = da903x_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* NOTE: this is dedicated for the DA9030 LDO1 and LDO15 that have locks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const struct regulator_ops da9030_regulator_ldo1_15_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .set_voltage_sel = da9030_set_ldo1_15_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .get_voltage_sel = da903x_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .enable = da903x_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .disable = da903x_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .is_enabled = da903x_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static const struct regulator_ops da9034_regulator_dvc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .set_voltage_sel = da9034_set_dvc_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .get_voltage_sel = da903x_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .list_voltage = regulator_list_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .map_voltage = regulator_map_voltage_linear,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .enable = da903x_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .disable = da903x_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .is_enabled = da903x_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* NOTE: this is dedicated for the insane LDO12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static const struct regulator_ops da9034_regulator_ldo12_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .set_voltage_sel = da903x_set_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .get_voltage_sel = da903x_get_voltage_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .enable = da903x_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .disable = da903x_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .is_enabled = da903x_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .desc = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .name = "LDO" #_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .ops = &da903x_regulator_ldo_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .id = _pmic##_ID_LDO##_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .n_voltages = (step) ? ((max - min) / step + 1) : 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .min_uV = (min) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .uV_step = (step) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .max_uV = (max) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .vol_reg = _pmic##_##vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .vol_shift = (shift), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .vol_nbits = (nbits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .enable_reg = _pmic##_##ereg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .enable_bit = (ebit), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #define DA903x_DVC(_pmic, _id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .desc = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .name = #_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .ops = &da9034_regulator_dvc_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .id = _pmic##_ID_##_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .n_voltages = (step) ? ((max - min) / step + 1) : 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .min_uV = (min) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .uV_step = (step) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .max_uV = (max) * 1000, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .vol_reg = _pmic##_##vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .vol_shift = (0), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .vol_nbits = (nbits), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .update_reg = _pmic##_##ureg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .update_bit = (ubit), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .enable_reg = _pmic##_##ereg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .enable_bit = (ebit), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) #define DA9030_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) DA903x_DVC(DA9030, _id, min, max, step, vreg, nbits, ureg, ubit, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ereg, ebit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define DA9034_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) DA903x_DVC(DA9034, _id, min, max, step, vreg, nbits, ureg, ubit, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ereg, ebit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #define DA9035_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) DA903x_DVC(DA9035, _id, min, max, step, vreg, nbits, ureg, ubit, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) ereg, ebit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static struct da903x_regulator_info da903x_regulator_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* DA9030 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) DA9030_DVC(BUCK2, 850, 1625, 25, BUCK2DVM1, 5, BUCK2DVM1, 7, RCTL11, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) DA9030_LDO( 1, 1200, 3200, 100, LDO1, 0, 5, RCTL12, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) DA9030_LDO( 2, 1800, 3200, 100, LDO23, 0, 4, RCTL12, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) DA9030_LDO( 3, 1800, 3200, 100, LDO23, 4, 4, RCTL12, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) DA9030_LDO( 4, 1800, 3200, 100, LDO45, 0, 4, RCTL12, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) DA9030_LDO( 5, 1800, 3200, 100, LDO45, 4, 4, RCTL12, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) DA9030_LDO( 6, 1800, 3200, 100, LDO6, 0, 4, RCTL12, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) DA9030_LDO( 7, 1800, 3200, 100, LDO78, 0, 4, RCTL12, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) DA9030_LDO( 8, 1800, 3200, 100, LDO78, 4, 4, RCTL22, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) DA9030_LDO( 9, 1800, 3200, 100, LDO912, 0, 4, RCTL22, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) DA9030_LDO(10, 1800, 3200, 100, LDO1011, 0, 4, RCTL22, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) DA9030_LDO(11, 1800, 3200, 100, LDO1011, 4, 4, RCTL22, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) DA9030_LDO(12, 1800, 3200, 100, LDO912, 4, 4, RCTL22, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) DA9030_LDO(14, 2760, 2940, 30, LDO1416, 0, 3, RCTL11, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) DA9030_LDO(15, 1100, 2650, 50, LDO15, 0, 5, RCTL11, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) DA9030_LDO(16, 1100, 2650, 50, LDO1416, 3, 5, RCTL11, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) DA9030_LDO(17, 1800, 3200, 100, LDO17, 0, 4, RCTL11, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) DA9030_LDO(18, 1800, 3200, 100, LDO1819, 0, 4, RCTL21, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) DA9030_LDO(19, 1800, 3200, 100, LDO1819, 4, 4, RCTL21, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) DA9030_LDO(13, 2100, 2100, 0, INVAL, 0, 0, RCTL11, 3), /* fixed @2.1V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* DA9034 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) DA9034_DVC(BUCK1, 725, 1500, 25, ADTV2, 5, VCC1, 0, OVER1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) DA9034_DVC(BUCK2, 725, 1500, 25, CDTV2, 5, VCC1, 2, OVER1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) DA9034_DVC(LDO2, 725, 1500, 25, SDTV2, 5, VCC1, 4, OVER1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) DA9034_DVC(LDO1, 1700, 2075, 25, MDTV1, 4, VCC1, 6, OVER3, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) DA9034_LDO( 3, 1800, 3300, 100, LDO643, 0, 4, OVER3, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) DA9034_LDO( 4, 1800, 2900,1100, LDO643, 4, 1, OVER3, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) DA9034_LDO( 6, 2500, 2850, 50, LDO643, 5, 3, OVER2, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) DA9034_LDO( 7, 2700, 3050, 50, LDO987, 0, 3, OVER2, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) DA9034_LDO( 8, 2700, 2850, 50, LDO987, 3, 2, OVER2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) DA9034_LDO( 9, 2700, 3050, 50, LDO987, 5, 3, OVER2, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) DA9034_LDO(10, 2700, 3050, 50, LDO1110, 0, 3, OVER2, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) DA9034_LDO(11, 1800, 3300, 100, LDO1110, 4, 4, OVER2, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) DA9034_LDO(12, 1700, 3050, 50, LDO1312, 0, 4, OVER3, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) DA9034_LDO(13, 1800, 3300, 100, LDO1312, 4, 4, OVER2, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) DA9034_LDO(14, 1800, 3300, 100, LDO1514, 0, 4, OVER3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) DA9034_LDO(15, 1800, 3300, 100, LDO1514, 4, 4, OVER3, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) DA9034_LDO(5, 3100, 3100, 0, INVAL, 0, 0, OVER3, 7), /* fixed @3.1V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* DA9035 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) DA9035_DVC(BUCK3, 1800, 2200, 100, 3DTV1, 3, VCC2, 0, OVER3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static inline struct da903x_regulator_info *find_regulator_info(int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) struct da903x_regulator_info *ri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) for (i = 0; i < ARRAY_SIZE(da903x_regulator_info); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) ri = &da903x_regulator_info[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (ri->desc.id == id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return ri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static int da903x_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct da903x_regulator_info *ri = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) ri = find_regulator_info(pdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (ri == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) dev_err(&pdev->dev, "invalid regulator ID specified\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) /* Workaround for the weird LDO12 voltage setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (ri->desc.id == DA9034_ID_LDO12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) ri->desc.ops = &da9034_regulator_ldo12_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) ri->desc.n_voltages = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) ri->desc.linear_ranges = da9034_ldo12_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) ri->desc.n_linear_ranges = ARRAY_SIZE(da9034_ldo12_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (ri->desc.id == DA9030_ID_LDO14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) ri->desc.ops = &da9030_regulator_ldo14_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (ri->desc.id == DA9030_ID_LDO1 || ri->desc.id == DA9030_ID_LDO15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) ri->desc.ops = &da9030_regulator_ldo1_15_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) config.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) config.init_data = dev_get_platdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) config.driver_data = ri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) rdev = devm_regulator_register(&pdev->dev, &ri->desc, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) dev_err(&pdev->dev, "failed to register regulator %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) ri->desc.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) platform_set_drvdata(pdev, rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static struct platform_driver da903x_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .name = "da903x-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .probe = da903x_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static int __init da903x_regulator_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return platform_driver_register(&da903x_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) subsys_initcall(da903x_regulator_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) static void __exit da903x_regulator_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) platform_driver_unregister(&da903x_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) module_exit(da903x_regulator_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) "Mike Rapoport <mike@compulab.co.il>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) MODULE_DESCRIPTION("Regulator Driver for Dialog Semiconductor DA903X PMIC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) MODULE_ALIAS("platform:da903x-regulator");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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