^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright 2020 Google LLC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/platform_data/cros_ec_proto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct cros_ec_regulator_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct regulator_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct cros_ec_device *ec_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u32 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u16 *voltages_mV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u16 num_voltages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static int cros_ec_cmd(struct cros_ec_device *ec, u32 version, u32 command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) void *outdata, u32 outsize, void *indata, u32 insize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct cros_ec_command *msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) msg = kzalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if (!msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) msg->version = version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) msg->command = command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) msg->outsize = outsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) msg->insize = insize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (outdata && outsize > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) memcpy(msg->data, outdata, outsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ret = cros_ec_cmd_xfer_status(ec, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) goto cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (insize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) memcpy(indata, msg->data, insize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) kfree(msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int cros_ec_regulator_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct cros_ec_regulator_data *data = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct ec_params_regulator_enable cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .index = data->index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .enable = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_ENABLE, &cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) sizeof(cmd), NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static int cros_ec_regulator_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct cros_ec_regulator_data *data = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct ec_params_regulator_enable cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .index = data->index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .enable = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_ENABLE, &cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) sizeof(cmd), NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int cros_ec_regulator_is_enabled(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct cros_ec_regulator_data *data = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct ec_params_regulator_is_enabled cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .index = data->index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct ec_response_regulator_is_enabled resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ret = cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_IS_ENABLED, &cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) sizeof(cmd), &resp, sizeof(resp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return resp.enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int cros_ec_regulator_list_voltage(struct regulator_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned int selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct cros_ec_regulator_data *data = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (selector >= data->num_voltages)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return data->voltages_mV[selector] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int cros_ec_regulator_get_voltage(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct cros_ec_regulator_data *data = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct ec_params_regulator_get_voltage cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .index = data->index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct ec_response_regulator_get_voltage resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ret = cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_GET_VOLTAGE, &cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) sizeof(cmd), &resp, sizeof(resp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return resp.voltage_mv * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int cros_ec_regulator_set_voltage(struct regulator_dev *dev, int min_uV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int max_uV, unsigned int *selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct cros_ec_regulator_data *data = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) int min_mV = DIV_ROUND_UP(min_uV, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int max_mV = max_uV / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct ec_params_regulator_set_voltage cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .index = data->index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .min_mv = min_mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .max_mv = max_mV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * This can happen when the given range [min_uV, max_uV] doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * contain any voltage that can be represented exactly in mV.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (min_mV > max_mV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_SET_VOLTAGE, &cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) sizeof(cmd), NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static const struct regulator_ops cros_ec_regulator_voltage_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .enable = cros_ec_regulator_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .disable = cros_ec_regulator_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .is_enabled = cros_ec_regulator_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .list_voltage = cros_ec_regulator_list_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .get_voltage = cros_ec_regulator_get_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .set_voltage = cros_ec_regulator_set_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int cros_ec_regulator_init_info(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct cros_ec_regulator_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct ec_params_regulator_get_info cmd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .index = data->index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct ec_response_regulator_get_info resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ret = cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_GET_INFO, &cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) sizeof(cmd), &resp, sizeof(resp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) data->num_voltages =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) min_t(u16, ARRAY_SIZE(resp.voltages_mv), resp.num_voltages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) data->voltages_mV =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) devm_kmemdup(dev, resp.voltages_mv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) sizeof(u16) * data->num_voltages, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (!data->voltages_mV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) data->desc.n_voltages = data->num_voltages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* Make sure the returned name is always a valid string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) resp.name[ARRAY_SIZE(resp.name) - 1] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) data->desc.name = devm_kstrdup(dev, resp.name, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (!data->desc.name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int cros_ec_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct cros_ec_regulator_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct regulator_init_data *init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct regulator_config cfg = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct regulator_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) drvdata = devm_kzalloc(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) &pdev->dev, sizeof(struct cros_ec_regulator_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (!drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) drvdata->ec_dev = dev_get_drvdata(dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) desc = &drvdata->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) init_data = of_get_regulator_init_data(dev, np, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (!init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ret = of_property_read_u32(np, "reg", &drvdata->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) desc->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) desc->type = REGULATOR_VOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) desc->ops = &cros_ec_regulator_voltage_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = cros_ec_regulator_init_info(dev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) cfg.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) cfg.init_data = init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) cfg.driver_data = drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) cfg.of_node = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) drvdata->dev = devm_regulator_register(dev, &drvdata->desc, &cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (IS_ERR(drvdata->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret = PTR_ERR(drvdata->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) dev_err(&pdev->dev, "Failed to register regulator: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) platform_set_drvdata(pdev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static const struct of_device_id regulator_cros_ec_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) { .compatible = "google,cros-ec-regulator", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MODULE_DEVICE_TABLE(of, regulator_cros_ec_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static struct platform_driver cros_ec_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .probe = cros_ec_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .name = "cros-ec-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .of_match_table = regulator_cros_ec_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) module_platform_driver(cros_ec_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) MODULE_DESCRIPTION("ChromeOS EC controlled regulator");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MODULE_AUTHOR("Pi-Hsun Shih <pihsun@chromium.org>");