^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Voltage and current regulation for AD5398 and AD5821
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2010 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Enter bugs at http://blackfin.uclinux.org/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define AD5398_CURRENT_EN_MASK 0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct ad5398_chip_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int min_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int max_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned int current_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned int current_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int current_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static int ad5398_calc_current(struct ad5398_chip_info *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned range_uA = chip->max_uA - chip->min_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return chip->min_uA + (selector * range_uA / chip->current_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int ad5398_read_reg(struct i2c_client *client, unsigned short *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ret = i2c_master_recv(client, (char *)&val, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) dev_err(&client->dev, "I2C read error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) *data = be16_to_cpu(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static int ad5398_write_reg(struct i2c_client *client, const unsigned short data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) val = cpu_to_be16(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ret = i2c_master_send(client, (char *)&val, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (ret != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) dev_err(&client->dev, "I2C write error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int ad5398_get_current_limit(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct ad5398_chip_info *chip = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct i2c_client *client = chip->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned short data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ret = ad5398_read_reg(client, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) ret = (data & chip->current_mask) >> chip->current_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return ad5398_calc_current(chip, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int ad5398_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct ad5398_chip_info *chip = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct i2c_client *client = chip->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned range_uA = chip->max_uA - chip->min_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned selector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned short data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (min_uA < chip->min_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) min_uA = chip->min_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (max_uA > chip->max_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) max_uA = chip->max_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (min_uA > chip->max_uA || max_uA < chip->min_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) selector = DIV_ROUND_UP((min_uA - chip->min_uA) * chip->current_level,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) range_uA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (ad5398_calc_current(chip, selector) > max_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dev_dbg(&client->dev, "changing current %duA\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ad5398_calc_current(chip, selector));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* read chip enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ret = ad5398_read_reg(client, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* prepare register data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) selector = (selector << chip->current_offset) & chip->current_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) data = (unsigned short)selector | (data & AD5398_CURRENT_EN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* write the new current value back as well as enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = ad5398_write_reg(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int ad5398_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct ad5398_chip_info *chip = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct i2c_client *client = chip->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned short data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ret = ad5398_read_reg(client, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (data & AD5398_CURRENT_EN_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int ad5398_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct ad5398_chip_info *chip = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct i2c_client *client = chip->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned short data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ret = ad5398_read_reg(client, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (data & AD5398_CURRENT_EN_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) data |= AD5398_CURRENT_EN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ret = ad5398_write_reg(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int ad5398_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct ad5398_chip_info *chip = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct i2c_client *client = chip->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) unsigned short data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = ad5398_read_reg(client, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (!(data & AD5398_CURRENT_EN_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) data &= ~AD5398_CURRENT_EN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ret = ad5398_write_reg(client, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static const struct regulator_ops ad5398_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .get_current_limit = ad5398_get_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .set_current_limit = ad5398_set_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .enable = ad5398_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .disable = ad5398_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .is_enabled = ad5398_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static const struct regulator_desc ad5398_reg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .name = "isink",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .ops = &ad5398_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .type = REGULATOR_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct ad5398_current_data_format {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) int current_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int current_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int min_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) int max_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static const struct ad5398_current_data_format df_10_4_120 = {10, 4, 0, 120000};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static const struct i2c_device_id ad5398_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) { "ad5398", (kernel_ulong_t)&df_10_4_120 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) { "ad5821", (kernel_ulong_t)&df_10_4_120 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) MODULE_DEVICE_TABLE(i2c, ad5398_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int ad5398_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct regulator_init_data *init_data = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct ad5398_chip_info *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) const struct ad5398_current_data_format *df =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) (struct ad5398_current_data_format *)id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (!init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) config.dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) config.init_data = init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) config.driver_data = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) chip->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) chip->min_uA = df->min_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) chip->max_uA = df->max_uA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) chip->current_level = 1 << df->current_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) chip->current_offset = df->current_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) chip->current_mask = (chip->current_level - 1) << chip->current_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) chip->rdev = devm_regulator_register(&client->dev, &ad5398_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (IS_ERR(chip->rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) dev_err(&client->dev, "failed to register %s %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) id->name, ad5398_reg.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return PTR_ERR(chip->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) i2c_set_clientdata(client, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) dev_dbg(&client->dev, "%s regulator driver is registered.\n", id->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static struct i2c_driver ad5398_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .probe = ad5398_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .name = "ad5398",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .id_table = ad5398_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static int __init ad5398_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return i2c_add_driver(&ad5398_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) subsys_initcall(ad5398_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static void __exit ad5398_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) i2c_del_driver(&ad5398_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) module_exit(ad5398_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MODULE_DESCRIPTION("AD5398 and AD5821 current regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MODULE_AUTHOR("Sonic Zhang");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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