Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Voltage regulation driver for active-semi ACT8945A PMIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2015 Atmel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Author: Wenyou Yang <wenyou.yang@atmel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <dt-bindings/regulator/active-semi,8945a-regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * ACT8945A Global Register Map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define ACT8945A_SYS_MODE	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define ACT8945A_SYS_CTRL	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define ACT8945A_SYS_UNLK_REGS	0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define ACT8945A_DCDC1_VSET1	0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define ACT8945A_DCDC1_VSET2	0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define ACT8945A_DCDC1_CTRL	0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ACT8945A_DCDC1_SUS	0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define ACT8945A_DCDC2_VSET1	0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define ACT8945A_DCDC2_VSET2	0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define ACT8945A_DCDC2_CTRL	0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define ACT8945A_DCDC2_SUS	0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ACT8945A_DCDC3_VSET1	0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ACT8945A_DCDC3_VSET2	0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define ACT8945A_DCDC3_CTRL	0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ACT8945A_DCDC3_SUS	0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define ACT8945A_LDO1_VSET	0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define ACT8945A_LDO1_CTRL	0x51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define ACT8945A_LDO1_SUS	0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define ACT8945A_LDO2_VSET	0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define ACT8945A_LDO2_CTRL	0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define ACT8945A_LDO2_SUS	0x56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define ACT8945A_LDO3_VSET	0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define ACT8945A_LDO3_CTRL	0x61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define ACT8945A_LDO3_SUS	0x62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define ACT8945A_LDO4_VSET	0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define ACT8945A_LDO4_CTRL	0x65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define ACT8945A_LDO4_SUS	0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * Field Definitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define ACT8945A_ENA		0x80	/* ON - [7] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define ACT8945A_VSEL_MASK	0x3F	/* VSET - [5:0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * ACT8945A Voltage Number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define ACT8945A_VOLTAGE_NUM	64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	ACT8945A_ID_DCDC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	ACT8945A_ID_DCDC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	ACT8945A_ID_DCDC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	ACT8945A_ID_LDO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	ACT8945A_ID_LDO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	ACT8945A_ID_LDO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	ACT8945A_ID_LDO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	ACT8945A_ID_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) struct act8945a_pmic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u32 op_mode[ACT8945A_ID_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static const struct linear_range act8945a_voltage_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	REGULATOR_LINEAR_RANGE(600000, 0, 23, 25000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	REGULATOR_LINEAR_RANGE(1200000, 24, 47, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	REGULATOR_LINEAR_RANGE(2400000, 48, 63, 100000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) static int act8945a_set_suspend_state(struct regulator_dev *rdev, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	struct regmap *regmap = rdev->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	int reg, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	case ACT8945A_ID_DCDC1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		reg = ACT8945A_DCDC1_SUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		val = 0xa8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	case ACT8945A_ID_DCDC2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		reg = ACT8945A_DCDC2_SUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		val = 0xa8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	case ACT8945A_ID_DCDC3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		reg = ACT8945A_DCDC3_SUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		val = 0xa8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	case ACT8945A_ID_LDO1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		reg = ACT8945A_LDO1_SUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		val = 0xe8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	case ACT8945A_ID_LDO2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		reg = ACT8945A_LDO2_SUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		val = 0xe8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	case ACT8945A_ID_LDO3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		reg = ACT8945A_LDO3_SUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		val = 0xe8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	case ACT8945A_ID_LDO4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		reg = ACT8945A_LDO4_SUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		val = 0xe8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		val |= BIT(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	 * Ask the PMIC to enable/disable this output when entering hibernate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	 * mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	return regmap_write(regmap, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int act8945a_set_suspend_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	return act8945a_set_suspend_state(rdev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int act8945a_set_suspend_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	return act8945a_set_suspend_state(rdev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static unsigned int act8945a_of_map_mode(unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	case ACT8945A_REGULATOR_MODE_FIXED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	case ACT8945A_REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	case ACT8945A_REGULATOR_MODE_LOWPOWER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return REGULATOR_MODE_STANDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		return REGULATOR_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int act8945a_set_mode(struct regulator_dev *rdev, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	struct act8945a_pmic *act8945a = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	struct regmap *regmap = rdev->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	int reg, ret, val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	case ACT8945A_ID_DCDC1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		reg = ACT8945A_DCDC1_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	case ACT8945A_ID_DCDC2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		reg = ACT8945A_DCDC2_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	case ACT8945A_ID_DCDC3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		reg = ACT8945A_DCDC3_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	case ACT8945A_ID_LDO1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		reg = ACT8945A_LDO1_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	case ACT8945A_ID_LDO2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		reg = ACT8945A_LDO2_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	case ACT8945A_ID_LDO3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		reg = ACT8945A_LDO3_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	case ACT8945A_ID_LDO4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		reg = ACT8945A_LDO4_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	case REGULATOR_MODE_STANDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		if (id > ACT8945A_ID_DCDC3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			val = BIT(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		if (id <= ACT8945A_ID_DCDC3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			val = BIT(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	ret = regmap_update_bits(regmap, reg, BIT(5), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	act8945a->op_mode[id] = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static unsigned int act8945a_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	struct act8945a_pmic *act8945a = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	int id = rdev_get_id(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (id < ACT8945A_ID_DCDC1 || id >= ACT8945A_ID_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	return act8945a->op_mode[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static const struct regulator_ops act8945a_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	.list_voltage		= regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	.map_voltage		= regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	.enable			= regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	.disable		= regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	.set_mode		= act8945a_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	.get_mode		= act8945a_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	.is_enabled		= regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	.set_suspend_enable	= act8945a_set_suspend_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	.set_suspend_disable	= act8945a_set_suspend_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define ACT89xx_REG(_name, _family, _id, _vsel_reg, _supply)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	[_family##_ID_##_id] = {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		.name			= _name,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		.supply_name		= _supply,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		.of_match		= of_match_ptr("REG_"#_id),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		.of_map_mode		= act8945a_of_map_mode,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		.regulators_node	= of_match_ptr("regulators"),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		.id			= _family##_ID_##_id,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		.type			= REGULATOR_VOLTAGE,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		.ops			= &act8945a_ops,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		.n_voltages		= ACT8945A_VOLTAGE_NUM,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		.linear_ranges		= act8945a_voltage_ranges,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		.n_linear_ranges	= ARRAY_SIZE(act8945a_voltage_ranges), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		.vsel_reg		= _family##_##_id##_##_vsel_reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		.vsel_mask		= ACT8945A_VSEL_MASK,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		.enable_reg		= _family##_##_id##_CTRL,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		.enable_mask		= ACT8945A_ENA,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		.owner			= THIS_MODULE,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const struct regulator_desc act8945a_regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	ACT89xx_REG("DCDC_REG1", ACT8945A, DCDC1, VSET1, "vp1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	ACT89xx_REG("DCDC_REG2", ACT8945A, DCDC2, VSET1, "vp2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	ACT89xx_REG("DCDC_REG3", ACT8945A, DCDC3, VSET1, "vp3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	ACT89xx_REG("LDO_REG1", ACT8945A, LDO1, VSET, "inl45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	ACT89xx_REG("LDO_REG2", ACT8945A, LDO2, VSET, "inl45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	ACT89xx_REG("LDO_REG3", ACT8945A, LDO3, VSET, "inl67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	ACT89xx_REG("LDO_REG4", ACT8945A, LDO4, VSET, "inl67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static const struct regulator_desc act8945a_alt_regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	ACT89xx_REG("DCDC_REG1", ACT8945A, DCDC1, VSET2, "vp1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	ACT89xx_REG("DCDC_REG2", ACT8945A, DCDC2, VSET2, "vp2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	ACT89xx_REG("DCDC_REG3", ACT8945A, DCDC3, VSET2, "vp3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	ACT89xx_REG("LDO_REG1", ACT8945A, LDO1, VSET, "inl45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	ACT89xx_REG("LDO_REG2", ACT8945A, LDO2, VSET, "inl45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	ACT89xx_REG("LDO_REG3", ACT8945A, LDO3, VSET, "inl67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	ACT89xx_REG("LDO_REG4", ACT8945A, LDO4, VSET, "inl67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static int act8945a_pmic_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	const struct regulator_desc *regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	struct act8945a_pmic *act8945a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	int i, num_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	bool voltage_select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	act8945a = devm_kzalloc(&pdev->dev, sizeof(*act8945a), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	if (!act8945a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	act8945a->regmap = dev_get_regmap(pdev->dev.parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	if (!act8945a->regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			"could not retrieve regmap from parent device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	voltage_select = of_property_read_bool(pdev->dev.parent->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 					       "active-semi,vsel-high");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	if (voltage_select) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		regulators = act8945a_alt_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		num_regulators = ARRAY_SIZE(act8945a_alt_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		regulators = act8945a_regulators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		num_regulators = ARRAY_SIZE(act8945a_regulators);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	config.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	config.dev->of_node = pdev->dev.parent->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	config.driver_data = act8945a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	for (i = 0; i < num_regulators; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		rdev = devm_regulator_register(&pdev->dev, &regulators[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 					       &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 			dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 				"failed to register %s regulator\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 				regulators[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 			return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	platform_set_drvdata(pdev, act8945a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	/* Unlock expert registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	return regmap_write(act8945a->regmap, ACT8945A_SYS_UNLK_REGS, 0xef);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int __maybe_unused act8945a_suspend(struct device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	struct act8945a_pmic *act8945a = dev_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	 * Ask the PMIC to enter the suspend mode on the next PWRHLD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	 * transition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	return regmap_write(act8945a->regmap, ACT8945A_SYS_CTRL, 0x42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static SIMPLE_DEV_PM_OPS(act8945a_pm, act8945a_suspend, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static void act8945a_pmic_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	struct act8945a_pmic *act8945a = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	 * Ask the PMIC to shutdown everything on the next PWRHLD transition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	regmap_write(act8945a->regmap, ACT8945A_SYS_CTRL, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static struct platform_driver act8945a_pmic_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		.name = "act8945a-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		.pm = &act8945a_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	.probe = act8945a_pmic_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	.shutdown = act8945a_pmic_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) module_platform_driver(act8945a_pmic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) MODULE_DESCRIPTION("Active-semi ACT8945A voltage regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) MODULE_AUTHOR("Wenyou Yang <wenyou.yang@atmel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) MODULE_LICENSE("GPL");