^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) ST-Ericsson SA 2010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Authors: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file is based on drivers/regulator/ab8500.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * AB8500 external regulators
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * ab8500-ext supports the following regulators:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * - VextSupply3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/mfd/abx500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/mfd/abx500/ab8500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/regulator/ab8500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Main display, u8500 R3 uib */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* Main display, u8500 uib and ST uib */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Secondary display, ST uib */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* SFH7741 proximity sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) REGULATOR_SUPPLY("vcc", "gpio-keys.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* BH1780GLS ambient light sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) REGULATOR_SUPPLY("vcc", "2-0029"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* lsm303dlh accelerometer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) REGULATOR_SUPPLY("vdd", "2-0018"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* lsm303dlhc accelerometer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) REGULATOR_SUPPLY("vdd", "2-0019"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* lsm303dlh magnetometer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) REGULATOR_SUPPLY("vdd", "2-001e"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* Rohm BU21013 Touchscreen devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) REGULATOR_SUPPLY("avdd", "3-005c"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) REGULATOR_SUPPLY("avdd", "3-005d"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* Synaptics RMI4 Touchscreen device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) REGULATOR_SUPPLY("vdd", "3-004b"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* L3G4200D Gyroscope device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) REGULATOR_SUPPLY("vdd", "2-0068"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* Ambient light sensor device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) REGULATOR_SUPPLY("vdd", "3-0029"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* Pressure sensor device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) REGULATOR_SUPPLY("vdd", "2-005c"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Cypress TrueTouch Touchscreen device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) REGULATOR_SUPPLY("vcpin", "spi8.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Camera device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) REGULATOR_SUPPLY("vaux12v5", "mmio_camera"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* On-board eMMC power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) REGULATOR_SUPPLY("vmmc", "sdi4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* AB8500 audio codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* AB8500 accessory detect 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* AB8500 Tv-out device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* AV8100 HDMI device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) REGULATOR_SUPPLY("v-SD-STM", "stm"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* External MMC slot power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) REGULATOR_SUPPLY("vmmc", "sdi0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* TV-out DENC supply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Internal general-purpose ADC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* ADC for charger */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* AB8500 Tv-out device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static struct regulator_consumer_supply ab8500_vaud_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* AB8500 audio-codec main supply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) REGULATOR_SUPPLY("vaud", "ab8500-codec.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static struct regulator_consumer_supply ab8500_vamic1_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* AB8500 audio-codec Mic1 supply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) REGULATOR_SUPPLY("vamic1", "ab8500-codec.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static struct regulator_consumer_supply ab8500_vamic2_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* AB8500 audio-codec Mic2 supply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) REGULATOR_SUPPLY("vamic2", "ab8500-codec.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static struct regulator_consumer_supply ab8500_vdmic_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* AB8500 audio-codec DMic supply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) REGULATOR_SUPPLY("vdmic", "ab8500-codec.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* SoC core supply, no device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) REGULATOR_SUPPLY("v-intcore", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* USB Transceiver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Handled by abx500 clk driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static struct regulator_consumer_supply ab8500_vana_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* DB8500 DSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) REGULATOR_SUPPLY("vdddsi1v2", "mcde"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* DB8500 CSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* ab8500 regulator register initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * VanaRequestCtrl = HP/LP depending on VxRequest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * VextSupply1RequestCtrl = HP/LP depending on VxRequest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xf0, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * VextSupply2RequestCtrl = HP/LP depending on VxRequest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * VextSupply3RequestCtrl = HP/LP depending on VxRequest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * Vaux1RequestCtrl = HP/LP depending on VxRequest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * Vaux2RequestCtrl = HP/LP depending on VxRequest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0xff, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * Vaux3RequestCtrl = HP/LP depending on VxRequest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * SwHPReq = Control through SWValid disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * VanaSysClkReq1HPValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * Vaux1SysClkReq1HPValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * Vaux2SysClkReq1HPValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * Vaux3SysClkReq1HPValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * VextSupply1SysClkReq1HPValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * VextSupply2SysClkReq1HPValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * VanaHwHPReq1Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * Vaux1HwHPreq1Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * Vaux2HwHPReq1Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * Vaux3HwHPReqValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0xe8, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * VextSupply1HwHPReq1Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * VextSupply2HwHPReq1Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * VextSupply3HwHPReq1Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x07, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * VanaHwHPReq2Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * Vaux1HwHPReq2Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * Vaux2HwHPReq2Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * Vaux3HwHPReq2Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0xe8, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * VextSupply1HwHPReq2Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * VextSupply2HwHPReq2Valid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * VextSupply3HwHPReq2Valid = HWReq2 controlled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x07, 0x04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * VanaSwHPReqValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * Vaux1SwHPReqValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0xa0, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * Vaux2SwHPReqValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * Vaux3SwHPReqValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * VextSupply1SwHPReqValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * VextSupply2SwHPReqValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * VextSupply3SwHPReqValid = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x1f, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * SysClkReq2Valid1 = SysClkReq2 controlled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * SysClkReq3Valid1 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * SysClkReq4Valid1 = SysClkReq4 controlled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * SysClkReq5Valid1 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * SysClkReq6Valid1 = SysClkReq6 controlled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * SysClkReq7Valid1 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * SysClkReq8Valid1 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0xfe, 0x2a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * SysClkReq2Valid2 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * SysClkReq3Valid2 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * SysClkReq4Valid2 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * SysClkReq5Valid2 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * SysClkReq6Valid2 = SysClkReq6 controlled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * SysClkReq7Valid2 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * SysClkReq8Valid2 = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0xfe, 0x20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * VTVoutEna = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * Vintcore12Ena = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * Vintcore12Sel = 1.25 V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * Vintcore12LP = inactive (HP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * VTVoutLP = inactive (HP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0xfe, 0x10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * VaudioEna = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * VdmicEna = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * Vamic1Ena = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * Vamic2Ena = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x1e, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * Vamic1_dzout = high-Z when Vamic1 is disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * Vamic2_dzout = high-Z when Vamic2 is disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * VPll = Hw controlled (NOTE! PRCMU bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * VanaRegu = force off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * VrefDDREna = disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * VrefDDRSleepMode = inactive (no pulldown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x03, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * VextSupply1Regu = force LP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * VextSupply2Regu = force OFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * VextSupply3Regu = force HP (-> STBB2=LP and TPS=LP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0xff, 0x13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * Vaux1Regu = force HP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * Vaux2Regu = force off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * Vaux3Regu = force off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x03, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * Vaux1Sel = 2.8 V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x0f, 0x0C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * Vaux2Sel = 2.9 V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0f, 0x0d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * Vaux3Sel = 2.91 V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07, 0x07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * VextSupply12LP = disabled (no LP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x01, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * Vaux1Disch = short discharge time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * Vaux2Disch = short discharge time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * Vaux3Disch = short discharge time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * Vintcore12Disch = short discharge time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * VTVoutDisch = short discharge time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * VaudioDisch = short discharge time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0xfc, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * VanaDisch = short discharge time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * VdmicPullDownEna = pulldown disabled when Vdmic is disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * VdmicDisch = short discharge time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x16, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* AB8500 regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /* supplies to the display/camera */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) [AB8500_LDO_AUX1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .supply_regulator = "ab8500-ext-supply3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .name = "V-DISPLAY",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .min_uV = 2800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .max_uV = 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .boot_on = 1, /* display is on at boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .consumer_supplies = ab8500_vaux1_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* supplies to the on-board eMMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) [AB8500_LDO_AUX2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .supply_regulator = "ab8500-ext-supply3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .name = "V-eMMC1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .min_uV = 1100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .max_uV = 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) REGULATOR_CHANGE_STATUS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) REGULATOR_CHANGE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .valid_modes_mask = REGULATOR_MODE_NORMAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) REGULATOR_MODE_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .consumer_supplies = ab8500_vaux2_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* supply for VAUX3, supplies to SDcard slots */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) [AB8500_LDO_AUX3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .supply_regulator = "ab8500-ext-supply3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .name = "V-MMC-SD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .min_uV = 1100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .max_uV = 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) REGULATOR_CHANGE_STATUS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) REGULATOR_CHANGE_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .valid_modes_mask = REGULATOR_MODE_NORMAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) REGULATOR_MODE_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .consumer_supplies = ab8500_vaux3_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* supply for tvout, gpadc, TVOUT LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) [AB8500_LDO_TVOUT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .name = "V-TVOUT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .num_consumer_supplies = ARRAY_SIZE(ab8500_vtvout_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .consumer_supplies = ab8500_vtvout_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* supply for ab8500-vaudio, VAUDIO LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) [AB8500_LDO_AUDIO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .name = "V-AUD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .consumer_supplies = ab8500_vaud_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /* supply for v-anamic1 VAMic1-LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) [AB8500_LDO_ANAMIC1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .name = "V-AMIC1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .consumer_supplies = ab8500_vamic1_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) [AB8500_LDO_ANAMIC2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .name = "V-AMIC2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .consumer_supplies = ab8500_vamic2_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) /* supply for v-dmic, VDMIC LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) [AB8500_LDO_DMIC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .name = "V-DMIC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .num_consumer_supplies = ARRAY_SIZE(ab8500_vdmic_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .consumer_supplies = ab8500_vdmic_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* supply for v-intcore12, VINTCORE12 LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) [AB8500_LDO_INTCORE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .name = "V-INTCORE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .min_uV = 1250000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .max_uV = 1350000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .input_uV = 1800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) REGULATOR_CHANGE_STATUS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) REGULATOR_CHANGE_MODE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) REGULATOR_CHANGE_DRMS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .valid_modes_mask = REGULATOR_MODE_NORMAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) REGULATOR_MODE_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .consumer_supplies = ab8500_vintcore_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* supply for U8500 CSI-DSI, VANA LDO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) [AB8500_LDO_ANA] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .name = "V-CSI-DSI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .consumer_supplies = ab8500_vana_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) /* supply for VextSupply3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /* SIM supply for 3 V SIM cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) REGULATOR_SUPPLY("vinvsim", "sim-detect.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) * AB8500 external regulators
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static struct regulator_init_data ab8500_ext_regulators[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /* fixed Vbat supplies VSMPS1_EXT_1V8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) [AB8500_EXT_SUPPLY1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .name = "ab8500-ext-supply1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .min_uV = 1800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .max_uV = 1800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .initial_mode = REGULATOR_MODE_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .boot_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) [AB8500_EXT_SUPPLY2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .name = "ab8500-ext-supply2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .min_uV = 1360000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .max_uV = 1360000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) [AB8500_EXT_SUPPLY3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .name = "ab8500-ext-supply3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .min_uV = 3400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .max_uV = 3400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .boot_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .num_consumer_supplies =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) ARRAY_SIZE(ab8500_ext_supply3_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) .consumer_supplies = ab8500_ext_supply3_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .reg_init = ab8500_reg_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .num_reg_init = ARRAY_SIZE(ab8500_reg_init),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .regulator = ab8500_regulators,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .num_regulator = ARRAY_SIZE(ab8500_regulators),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .ext_regulator = ab8500_ext_regulators,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * struct ab8500_ext_regulator_info - ab8500 regulator information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * @dev: device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * @desc: regulator description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * @cfg: regulator configuration (extension of regulator FW configuration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) * @update_bank: bank to control on/off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) * @update_reg: register to control on/off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * @update_mask: mask to enable/disable and set mode of regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * @update_val: bits holding the regulator current mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) * @update_val_hp: bits to set EN pin active (LPn pin deactive)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) * normally this means high power mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) * @update_val_lp: bits to set EN pin active and LPn pin active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) * normally this means low power mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) * @update_val_hw: bits to set regulator pins in HW control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) * SysClkReq pins and logic will choose mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) struct ab8500_ext_regulator_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) struct ab8500_ext_regulator_cfg *cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) u8 update_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) u8 update_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) u8 update_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) u8 update_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) u8 update_val_hp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) u8 update_val_lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) u8 update_val_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) static int ab8500_ext_regulator_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) u8 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (info == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) * To satisfy both HW high power request and SW request, the regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) * must be on in high power.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (info->cfg && info->cfg->hwreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) regval = info->update_val_hp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) regval = info->update_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) ret = abx500_mask_and_set_register_interruptible(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) info->update_bank, info->update_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) info->update_mask, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) dev_err(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) "couldn't set enable bits for regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) dev_dbg(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) "%s-enable (bank, reg, mask, value): 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) info->desc.name, info->update_bank, info->update_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) info->update_mask, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static int ab8500_ext_regulator_disable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) u8 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (info == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) * Set the regulator in HW request mode if configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (info->cfg && info->cfg->hwreq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) regval = info->update_val_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) regval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) ret = abx500_mask_and_set_register_interruptible(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) info->update_bank, info->update_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) info->update_mask, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) dev_err(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) "couldn't set disable bits for regulator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) dev_dbg(rdev_get_dev(rdev), "%s-disable (bank, reg, mask, value):"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) " 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) info->desc.name, info->update_bank, info->update_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) info->update_mask, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static int ab8500_ext_regulator_is_enabled(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) u8 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (info == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ret = abx500_get_register_interruptible(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) info->update_bank, info->update_reg, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) dev_err(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) "couldn't read 0x%x register\n", info->update_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) dev_dbg(rdev_get_dev(rdev), "%s-is_enabled (bank, reg, mask, value):"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) " 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) info->desc.name, info->update_bank, info->update_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) info->update_mask, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (((regval & info->update_mask) == info->update_val_lp) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) ((regval & info->update_mask) == info->update_val_hp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static int ab8500_ext_regulator_set_mode(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) u8 regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (info == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) case REGULATOR_MODE_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) regval = info->update_val_hp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) case REGULATOR_MODE_IDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) regval = info->update_val_lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) /* If regulator is enabled and info->cfg->hwreq is set, the regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) must be on in high power, so we don't need to write the register with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) the same value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (ab8500_ext_regulator_is_enabled(rdev) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) !(info->cfg && info->cfg->hwreq)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) ret = abx500_mask_and_set_register_interruptible(info->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) info->update_bank, info->update_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) info->update_mask, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) dev_err(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) "Could not set regulator mode.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) dev_dbg(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) "%s-set_mode (bank, reg, mask, value): "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) "0x%x, 0x%x, 0x%x, 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) info->desc.name, info->update_bank, info->update_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) info->update_mask, regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) info->update_val = regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static unsigned int ab8500_ext_regulator_get_mode(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) struct ab8500_ext_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) if (info == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (info->update_val == info->update_val_hp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) ret = REGULATOR_MODE_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) else if (info->update_val == info->update_val_lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) ret = REGULATOR_MODE_IDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static int ab8500_ext_set_voltage(struct regulator_dev *rdev, int min_uV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) int max_uV, unsigned *selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct regulation_constraints *regu_constraints = rdev->constraints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) if (!regu_constraints) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) dev_err(rdev_get_dev(rdev), "No regulator constraints\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (regu_constraints->min_uV == min_uV &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) regu_constraints->max_uV == max_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) dev_err(rdev_get_dev(rdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) "Requested min %duV max %duV != constrained min %duV max %duV\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) min_uV, max_uV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) regu_constraints->min_uV, regu_constraints->max_uV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) static int ab8500_ext_list_voltage(struct regulator_dev *rdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) struct regulation_constraints *regu_constraints = rdev->constraints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) if (regu_constraints == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) dev_err(rdev_get_dev(rdev), "regulator constraints null pointer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) /* return the uV for the fixed regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (regu_constraints->min_uV && regu_constraints->max_uV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (regu_constraints->min_uV == regu_constraints->max_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) return regu_constraints->min_uV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) static const struct regulator_ops ab8500_ext_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .enable = ab8500_ext_regulator_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .disable = ab8500_ext_regulator_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) .is_enabled = ab8500_ext_regulator_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) .set_mode = ab8500_ext_regulator_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) .get_mode = ab8500_ext_regulator_get_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) .set_voltage = ab8500_ext_set_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) .list_voltage = ab8500_ext_list_voltage,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) static struct ab8500_ext_regulator_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) ab8500_ext_regulator_info[AB8500_NUM_EXT_REGULATORS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) [AB8500_EXT_SUPPLY1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .name = "VEXTSUPPLY1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .of_match = of_match_ptr("ab8500_ext1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .ops = &ab8500_ext_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .id = AB8500_EXT_SUPPLY1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .update_bank = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .update_reg = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .update_mask = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .update_val = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .update_val_hp = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) .update_val_lp = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .update_val_hw = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) [AB8500_EXT_SUPPLY2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .name = "VEXTSUPPLY2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .of_match = of_match_ptr("ab8500_ext2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) .ops = &ab8500_ext_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .id = AB8500_EXT_SUPPLY2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) .update_bank = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) .update_reg = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) .update_mask = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) .update_val = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) .update_val_hp = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) .update_val_lp = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .update_val_hw = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) [AB8500_EXT_SUPPLY3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) .desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) .name = "VEXTSUPPLY3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) .of_match = of_match_ptr("ab8500_ext3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .ops = &ab8500_ext_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) .id = AB8500_EXT_SUPPLY3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .update_bank = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) .update_reg = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .update_mask = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .update_val = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .update_val_hp = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) .update_val_lp = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) .update_val_hw = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) static int ab8500_ext_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) struct ab8500_regulator_platform_data *pdata = &ab8500_regulator_plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) if (!ab8500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) dev_err(&pdev->dev, "null mfd parent\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) /* make sure the platform data has the correct size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (pdata->num_ext_regulator != ARRAY_SIZE(ab8500_ext_regulator_info)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) /* check for AB8500 2.x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) if (is_ab8500_2p0_or_earlier(ab8500)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) struct ab8500_ext_regulator_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) /* VextSupply3LPn is inverted on AB8500 2.x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) info = &ab8500_ext_regulator_info[AB8500_EXT_SUPPLY3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) info->update_val = 0x30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) info->update_val_hp = 0x30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) info->update_val_lp = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /* register all regulators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) for (i = 0; i < ARRAY_SIZE(ab8500_ext_regulator_info); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) struct ab8500_ext_regulator_info *info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) /* assign per-regulator data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) info = &ab8500_ext_regulator_info[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) info->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) info->cfg = (struct ab8500_ext_regulator_cfg *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) pdata->ext_regulator[i].driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) config.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) config.driver_data = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) config.init_data = &pdata->ext_regulator[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) /* register regulator with framework */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) rdev = devm_regulator_register(&pdev->dev, &info->desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (IS_ERR(rdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) dev_err(&pdev->dev, "failed to register regulator %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) info->desc.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) return PTR_ERR(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) dev_dbg(&pdev->dev, "%s-probed\n", info->desc.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) static struct platform_driver ab8500_ext_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) .probe = ab8500_ext_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .name = "ab8500-ext-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) static int __init ab8500_ext_regulator_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) ret = platform_driver_register(&ab8500_ext_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) pr_err("Failed to register ab8500 ext regulator: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) subsys_initcall(ab8500_ext_regulator_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) static void __exit ab8500_ext_regulator_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) platform_driver_unregister(&ab8500_ext_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) module_exit(ab8500_ext_regulator_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) MODULE_DESCRIPTION("AB8500 external regulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) MODULE_ALIAS("platform:ab8500-ext-regulator");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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