^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Regulators driver for Marvell 88PM800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2012 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Joseph(Yossi) Hanin <yhanin@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Yi Zhang <yizhang@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mfd/88pm80x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* LDO1 with DVC[0..3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PM800_LDO1_VOUT (0x08) /* VOUT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PM800_LDO1_VOUT_2 (0x09)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PM800_LDO1_VOUT_3 (0x0A)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PM800_LDO2_VOUT (0x0B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PM800_LDO3_VOUT (0x0C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PM800_LDO4_VOUT (0x0D)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PM800_LDO5_VOUT (0x0E)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PM800_LDO6_VOUT (0x0F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PM800_LDO7_VOUT (0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PM800_LDO8_VOUT (0x11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PM800_LDO9_VOUT (0x12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PM800_LDO10_VOUT (0x13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PM800_LDO11_VOUT (0x14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PM800_LDO12_VOUT (0x15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PM800_LDO13_VOUT (0x16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PM800_LDO14_VOUT (0x17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define PM800_LDO15_VOUT (0x18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PM800_LDO16_VOUT (0x19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PM800_LDO17_VOUT (0x1A)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PM800_LDO18_VOUT (0x1B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PM800_LDO19_VOUT (0x1C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* BUCK1 with DVC[0..3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PM800_BUCK1 (0x3C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define PM800_BUCK1_1 (0x3D)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define PM800_BUCK1_2 (0x3E)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PM800_BUCK1_3 (0x3F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PM800_BUCK2 (0x40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PM800_BUCK3 (0x41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PM800_BUCK4 (0x42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PM800_BUCK4_1 (0x43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PM800_BUCK4_2 (0x44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PM800_BUCK4_3 (0x45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PM800_BUCK5 (0x46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PM800_BUCK_ENA (0x50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define PM800_LDO_ENA1_1 (0x51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PM800_LDO_ENA1_2 (0x52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define PM800_LDO_ENA1_3 (0x53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PM800_LDO_ENA2_1 (0x56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PM800_LDO_ENA2_2 (0x57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PM800_LDO_ENA2_3 (0x58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define PM800_BUCK1_MISC1 (0x78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define PM800_BUCK3_MISC1 (0x7E)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define PM800_BUCK4_MISC1 (0x81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define PM800_BUCK5_MISC1 (0x84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct pm800_regulator_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct regulator_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int max_ua;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * vreg - the buck regs string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * ereg - the string for the enable register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * ebit - the bit number in the enable register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * amax - the current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * Buck has 2 kinds of voltage steps. It is easy to find voltage by ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * not the constant voltage table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * n_volt - Number of available selectors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define PM800_BUCK(match, vreg, ereg, ebit, amax, volt_ranges, n_volt) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .desc = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .name = #vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .of_match = of_match_ptr(#match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .regulators_node = of_match_ptr("regulators"), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .ops = &pm800_volt_range_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .id = PM800_ID_##vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .n_voltages = n_volt, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .linear_ranges = volt_ranges, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .vsel_reg = PM800_##vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .vsel_mask = 0x7f, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .enable_reg = PM800_##ereg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .enable_mask = 1 << (ebit), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .max_ua = (amax), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * vreg - the LDO regs string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * ereg - the string for the enable register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * ebit - the bit number in the enable register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * amax - the current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * volt_table - the LDO voltage table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * For all the LDOes, there are too many ranges. Using volt_table will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * simpler and faster.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define PM800_LDO(match, vreg, ereg, ebit, amax, ldo_volt_table) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .desc = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .name = #vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .of_match = of_match_ptr(#match), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .regulators_node = of_match_ptr("regulators"), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .ops = &pm800_volt_table_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .type = REGULATOR_VOLTAGE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .id = PM800_ID_##vreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .n_voltages = ARRAY_SIZE(ldo_volt_table), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .vsel_reg = PM800_##vreg##_VOUT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .vsel_mask = 0xf, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .enable_reg = PM800_##ereg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .enable_mask = 1 << (ebit), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .volt_table = ldo_volt_table, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .max_ua = (amax), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Ranges are sorted in ascending order. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const struct linear_range buck1_volt_range[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) REGULATOR_LINEAR_RANGE(600000, 0, 0x4f, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) REGULATOR_LINEAR_RANGE(1600000, 0x50, 0x54, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* BUCK 2~5 have same ranges. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static const struct linear_range buck2_5_volt_range[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) REGULATOR_LINEAR_RANGE(600000, 0, 0x4f, 12500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) REGULATOR_LINEAR_RANGE(1600000, 0x50, 0x72, 50000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static const unsigned int ldo1_volt_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 600000, 650000, 700000, 750000, 800000, 850000, 900000, 950000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 1000000, 1050000, 1100000, 1150000, 1200000, 1300000, 1400000, 1500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const unsigned int ldo2_volt_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 1700000, 1800000, 1900000, 2000000, 2100000, 2500000, 2700000, 2800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* LDO 3~17 have same voltage table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static const unsigned int ldo3_17_volt_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 1200000, 1250000, 1700000, 1800000, 1850000, 1900000, 2500000, 2600000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 2700000, 2750000, 2800000, 2850000, 2900000, 3000000, 3100000, 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* LDO 18~19 have same voltage table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const unsigned int ldo18_19_volt_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 1700000, 1800000, 1900000, 2500000, 2800000, 2900000, 3100000, 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int pm800_get_current_limit(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct pm800_regulator_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return info->max_ua;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static const struct regulator_ops pm800_volt_range_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .list_voltage = regulator_list_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .map_voltage = regulator_map_voltage_linear_range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .get_current_limit = pm800_get_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const struct regulator_ops pm800_volt_table_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .list_voltage = regulator_list_voltage_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .map_voltage = regulator_map_voltage_iterate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .set_voltage_sel = regulator_set_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .get_voltage_sel = regulator_get_voltage_sel_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .enable = regulator_enable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .get_current_limit = pm800_get_current_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* The array is indexed by id(PM800_ID_XXX) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static struct pm800_regulator_info pm800_regulator_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PM800_BUCK(buck1, BUCK1, BUCK_ENA, 0, 3000000, buck1_volt_range, 0x55),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PM800_BUCK(buck2, BUCK2, BUCK_ENA, 1, 1200000, buck2_5_volt_range, 0x73),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PM800_BUCK(buck3, BUCK3, BUCK_ENA, 2, 1200000, buck2_5_volt_range, 0x73),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PM800_BUCK(buck4, BUCK4, BUCK_ENA, 3, 1200000, buck2_5_volt_range, 0x73),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PM800_BUCK(buck5, BUCK5, BUCK_ENA, 4, 1200000, buck2_5_volt_range, 0x73),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) PM800_LDO(ldo1, LDO1, LDO_ENA1_1, 0, 200000, ldo1_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PM800_LDO(ldo2, LDO2, LDO_ENA1_1, 1, 10000, ldo2_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PM800_LDO(ldo3, LDO3, LDO_ENA1_1, 2, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) PM800_LDO(ldo4, LDO4, LDO_ENA1_1, 3, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PM800_LDO(ldo5, LDO5, LDO_ENA1_1, 4, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PM800_LDO(ldo6, LDO6, LDO_ENA1_1, 5, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PM800_LDO(ldo7, LDO7, LDO_ENA1_1, 6, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PM800_LDO(ldo8, LDO8, LDO_ENA1_1, 7, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) PM800_LDO(ldo9, LDO9, LDO_ENA1_2, 0, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PM800_LDO(ldo10, LDO10, LDO_ENA1_2, 1, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) PM800_LDO(ldo11, LDO11, LDO_ENA1_2, 2, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PM800_LDO(ldo12, LDO12, LDO_ENA1_2, 3, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PM800_LDO(ldo13, LDO13, LDO_ENA1_2, 4, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PM800_LDO(ldo14, LDO14, LDO_ENA1_2, 5, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PM800_LDO(ldo15, LDO15, LDO_ENA1_2, 6, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) PM800_LDO(ldo16, LDO16, LDO_ENA1_2, 7, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PM800_LDO(ldo17, LDO17, LDO_ENA1_3, 0, 300000, ldo3_17_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) PM800_LDO(ldo18, LDO18, LDO_ENA1_3, 1, 200000, ldo18_19_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PM800_LDO(ldo19, LDO19, LDO_ENA1_3, 2, 200000, ldo18_19_volt_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int pm800_regulator_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct pm80x_chip *chip = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct pm80x_platform_data *pdata = dev_get_platdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) struct regulator_init_data *init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (pdata && pdata->num_regulators) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) unsigned int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* Check whether num_regulator is valid. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) for (i = 0; i < ARRAY_SIZE(pdata->regulators); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (pdata->regulators[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (count != pdata->num_regulators)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) config.dev = chip->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) config.regmap = chip->subchip->regmap_power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) for (i = 0; i < PM800_ID_RG_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct regulator_dev *regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (pdata && pdata->num_regulators) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) init_data = pdata->regulators[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (!init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) config.init_data = init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) config.driver_data = &pm800_regulator_info[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) regulator = devm_regulator_register(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) &pm800_regulator_info[i].desc, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (IS_ERR(regulator)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ret = PTR_ERR(regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) dev_err(&pdev->dev, "Failed to register %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) pm800_regulator_info[i].desc.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static struct platform_driver pm800_regulator_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .name = "88pm80x-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .probe = pm800_regulator_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) module_platform_driver(pm800_regulator_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MODULE_AUTHOR("Joseph(Yossi) Hanin <yhanin@marvell.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM800 PMIC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MODULE_ALIAS("platform:88pm800-regulator");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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