^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Intel Low Power Subsystem PWM controller driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014, Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Derived from the original pwm-lpss.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __PWM_LPSS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __PWM_LPSS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pwm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define MAX_PWMS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct pwm_lpss_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct pwm_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) void __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) const struct pwm_lpss_boardinfo *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct pwm_lpss_boardinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned long clk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int npwm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned long base_unit_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) bool bypass;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * messes with the PWM0 controllers state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) bool other_devices_aml_touches_pwm_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) const struct pwm_lpss_boardinfo *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int pwm_lpss_remove(struct pwm_lpss_chip *lpwm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #endif /* __PWM_LPSS_H */