Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Marvell Berlin PWM driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2015 Marvell Technology Group Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Antoine Tenart <antoine.tenart@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/pwm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define BERLIN_PWM_EN			0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define  BERLIN_PWM_ENABLE		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define BERLIN_PWM_CONTROL		0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * The prescaler claims to support 8 different moduli, configured using the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * low three bits of PWM_CONTROL. (Sequentially, they are 1, 4, 8, 16, 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * 256, 1024, and 4096.)  However, the moduli from 4 to 1024 appear to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * implemented by internally shifting TCNT left without adding additional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * bits. So, the max TCNT that actually works for a modulus of 4 is 0x3fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * for 8, 0x1fff; and so on. This means that those moduli are entirely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * useless, as we could just do the shift ourselves. The 4096 modulus is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * implemented with a real prescaler, so we do use that, but we treat it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * as a flag instead of pretending the modulus is actually configurable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define  BERLIN_PWM_PRESCALE_4096	0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define  BERLIN_PWM_INVERT_POLARITY	BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define BERLIN_PWM_DUTY			0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define BERLIN_PWM_TCNT			0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define  BERLIN_PWM_MAX_TCNT		65535
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) struct berlin_pwm_channel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	u32 enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	u32 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	u32 duty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	u32 tcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) struct berlin_pwm_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct pwm_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static inline struct berlin_pwm_chip *to_berlin_pwm_chip(struct pwm_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	return container_of(chip, struct berlin_pwm_chip, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static inline u32 berlin_pwm_readl(struct berlin_pwm_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 				   unsigned int channel, unsigned long offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	return readl_relaxed(chip->base + channel * 0x10 + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static inline void berlin_pwm_writel(struct berlin_pwm_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 				     unsigned int channel, u32 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 				     unsigned long offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	writel_relaxed(value, chip->base + channel * 0x10 + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static int berlin_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct berlin_pwm_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	channel = kzalloc(sizeof(*channel), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	if (!channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	return pwm_set_chip_data(pwm, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static void berlin_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	struct berlin_pwm_channel *channel = pwm_get_chip_data(pwm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	kfree(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static int berlin_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			     int duty_ns, int period_ns)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	bool prescale_4096 = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	u32 value, duty, period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	u64 cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	cycles = clk_get_rate(pwm->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	cycles *= period_ns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	do_div(cycles, NSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (cycles > BERLIN_PWM_MAX_TCNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		prescale_4096 = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		cycles >>= 12; // Prescaled by 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		if (cycles > BERLIN_PWM_MAX_TCNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	period = cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	cycles *= duty_ns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	do_div(cycles, period_ns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	duty = cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	if (prescale_4096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		value |= BERLIN_PWM_PRESCALE_4096;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		value &= ~BERLIN_PWM_PRESCALE_4096;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	berlin_pwm_writel(pwm, pwm_dev->hwpwm, duty, BERLIN_PWM_DUTY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	berlin_pwm_writel(pwm, pwm_dev->hwpwm, period, BERLIN_PWM_TCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int berlin_pwm_set_polarity(struct pwm_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 				   struct pwm_device *pwm_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 				   enum pwm_polarity polarity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (polarity == PWM_POLARITY_NORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		value &= ~BERLIN_PWM_INVERT_POLARITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		value |= BERLIN_PWM_INVERT_POLARITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int berlin_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	value |= BERLIN_PWM_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static void berlin_pwm_disable(struct pwm_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			       struct pwm_device *pwm_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	value &= ~BERLIN_PWM_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static const struct pwm_ops berlin_pwm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.request = berlin_pwm_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.free = berlin_pwm_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.config = berlin_pwm_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.set_polarity = berlin_pwm_set_polarity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.enable = berlin_pwm_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.disable = berlin_pwm_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static const struct of_device_id berlin_pwm_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	{ .compatible = "marvell,berlin-pwm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MODULE_DEVICE_TABLE(of, berlin_pwm_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int berlin_pwm_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	struct berlin_pwm_chip *pwm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (!pwm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	pwm->base = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (IS_ERR(pwm->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		return PTR_ERR(pwm->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	pwm->clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (IS_ERR(pwm->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		return PTR_ERR(pwm->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	ret = clk_prepare_enable(pwm->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	pwm->chip.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	pwm->chip.ops = &berlin_pwm_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	pwm->chip.base = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	pwm->chip.npwm = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	pwm->chip.of_xlate = of_pwm_xlate_with_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	pwm->chip.of_pwm_n_cells = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	ret = pwmchip_add(&pwm->chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		clk_disable_unprepare(pwm->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	platform_set_drvdata(pdev, pwm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static int berlin_pwm_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	struct berlin_pwm_chip *pwm = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	ret = pwmchip_remove(&pwm->chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	clk_disable_unprepare(pwm->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static int berlin_pwm_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	struct berlin_pwm_chip *pwm = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	for (i = 0; i < pwm->chip.npwm; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		struct berlin_pwm_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		channel = pwm_get_chip_data(&pwm->chip.pwms[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		if (!channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		channel->enable = berlin_pwm_readl(pwm, i, BERLIN_PWM_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		channel->ctrl = berlin_pwm_readl(pwm, i, BERLIN_PWM_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		channel->duty = berlin_pwm_readl(pwm, i, BERLIN_PWM_DUTY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		channel->tcnt = berlin_pwm_readl(pwm, i, BERLIN_PWM_TCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	clk_disable_unprepare(pwm->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int berlin_pwm_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	struct berlin_pwm_chip *pwm = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	ret = clk_prepare_enable(pwm->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	for (i = 0; i < pwm->chip.npwm; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		struct berlin_pwm_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		channel = pwm_get_chip_data(&pwm->chip.pwms[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		if (!channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		berlin_pwm_writel(pwm, i, channel->ctrl, BERLIN_PWM_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		berlin_pwm_writel(pwm, i, channel->duty, BERLIN_PWM_DUTY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		berlin_pwm_writel(pwm, i, channel->tcnt, BERLIN_PWM_TCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		berlin_pwm_writel(pwm, i, channel->enable, BERLIN_PWM_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static SIMPLE_DEV_PM_OPS(berlin_pwm_pm_ops, berlin_pwm_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			 berlin_pwm_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static struct platform_driver berlin_pwm_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.probe = berlin_pwm_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	.remove = berlin_pwm_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		.name = "berlin-pwm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		.of_match_table = berlin_pwm_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		.pm = &berlin_pwm_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) module_platform_driver(berlin_pwm_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MODULE_DESCRIPTION("Marvell Berlin PWM driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MODULE_LICENSE("GPL v2");