^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) ST-Ericsson SA 2010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Arun R Murthy <arun.murthy@stericsson.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pwm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mfd/abx500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/abx500/ab8500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * PWM Out generators
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Bank: 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define AB8500_PWM_OUT_CTRL1_REG 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define AB8500_PWM_OUT_CTRL2_REG 0x61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define AB8500_PWM_OUT_CTRL7_REG 0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct ab8500_pwm_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct pwm_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int ab8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int duty_ns, int period_ns)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int higher_val, lower_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * get the first 8 bits that are be written to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * AB8500_PWM_OUT_CTRL1_REG[0:7]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) lower_val = duty_ns & 0x00FF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * get bits [9:10] that are to be written to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * AB8500_PWM_OUT_CTRL2_REG[0:1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) higher_val = ((duty_ns & 0x0300) >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) reg = AB8500_PWM_OUT_CTRL1_REG + ((chip->base - 1) * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ret = abx500_set_register_interruptible(chip->dev, AB8500_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) reg, (u8)lower_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ret = abx500_set_register_interruptible(chip->dev, AB8500_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) (reg + 1), (u8)higher_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static int ab8500_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ret = abx500_mask_and_set_register_interruptible(chip->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) AB8500_MISC, AB8500_PWM_OUT_CTRL7_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 1 << (chip->base - 1), 1 << (chip->base - 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) dev_err(chip->dev, "%s: Failed to enable PWM, Error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) pwm->label, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static void ab8500_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ret = abx500_mask_and_set_register_interruptible(chip->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) AB8500_MISC, AB8500_PWM_OUT_CTRL7_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 1 << (chip->base - 1), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dev_err(chip->dev, "%s: Failed to disable PWM, Error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) pwm->label, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static const struct pwm_ops ab8500_pwm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .config = ab8500_pwm_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .enable = ab8500_pwm_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .disable = ab8500_pwm_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int ab8500_pwm_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct ab8500_pwm_chip *ab8500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * Nothing to be done in probe, this is required to get the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * device which is required for ab8500 read and write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (ab8500 == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ab8500->chip.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ab8500->chip.ops = &ab8500_pwm_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ab8500->chip.base = pdev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ab8500->chip.npwm = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) err = pwmchip_add(&ab8500->chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dev_dbg(&pdev->dev, "pwm probe successful\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) platform_set_drvdata(pdev, ab8500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int ab8500_pwm_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct ab8500_pwm_chip *ab8500 = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) err = pwmchip_remove(&ab8500->chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) dev_dbg(&pdev->dev, "pwm driver removed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static struct platform_driver ab8500_pwm_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .name = "ab8500-pwm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .probe = ab8500_pwm_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .remove = ab8500_pwm_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) module_platform_driver(ab8500_pwm_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MODULE_AUTHOR("Arun MURTHY <arun.murthy@stericsson.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MODULE_DESCRIPTION("AB8500 Pulse Width Modulation Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MODULE_ALIAS("platform:ab8500-pwm");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MODULE_LICENSE("GPL v2");