^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Intel Running Average Power Limit (RAPL) Driver via MSR interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2019, Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/log2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/powercap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/intel_rapl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/iosf_mbi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/cpu_device_id.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/intel-family.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Local defines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define MSR_PLATFORM_POWER_LIMIT 0x0000065C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define MSR_VR_CURRENT_CONFIG 0x00000601
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* private data for RAPL MSR Interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static struct rapl_if_priv rapl_msr_priv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .reg_unit = MSR_RAPL_POWER_UNIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .regs[RAPL_DOMAIN_PACKAGE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .regs[RAPL_DOMAIN_PP0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .regs[RAPL_DOMAIN_PP1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .regs[RAPL_DOMAIN_DRAM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .regs[RAPL_DOMAIN_PLATFORM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .limits[RAPL_DOMAIN_PACKAGE] = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .limits[RAPL_DOMAIN_PLATFORM] = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Handles CPU hotplug on multi-socket systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * If a CPU goes online as the first CPU of the physical package
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * we add the RAPL package to the system. Similarly, when the last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * CPU of the package is removed, we remove the RAPL package and its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * associated domains. Cooling devices are handled accordingly at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * per-domain level.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static int rapl_cpu_online(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct rapl_package *rp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (!rp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) rp = rapl_add_package(cpu, &rapl_msr_priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (IS_ERR(rp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return PTR_ERR(rp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) cpumask_set_cpu(cpu, &rp->cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int rapl_cpu_down_prep(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct rapl_package *rp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int lead_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!rp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) cpumask_clear_cpu(cpu, &rp->cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) lead_cpu = cpumask_first(&rp->cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (lead_cpu >= nr_cpu_ids)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) rapl_remove_package(rp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) else if (rp->lead_cpu == cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) rp->lead_cpu = lead_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u32 msr = (u32)ra->reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ra->value &= ra->mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static void rapl_msr_update_func(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct reg_action *ra = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u32 msr = (u32)ra->reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u64 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ra->err = rdmsrl_safe(msr, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (ra->err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) val &= ~ra->mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) val |= ra->value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ra->err = wrmsrl_safe(msr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (WARN_ON_ONCE(ret))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return ra->err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* List of verified CPUs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static const struct x86_cpu_id pl4_support_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { X86_VENDOR_INTEL, 6, INTEL_FAM6_TIGERLAKE_L, X86_FEATURE_ANY },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int rapl_msr_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) rapl_msr_priv.read_raw = rapl_msr_read_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) rapl_msr_priv.write_raw = rapl_msr_write_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) rapl_msr_priv.limits[RAPL_DOMAIN_PACKAGE] = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) rapl_msr_priv.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MSR_VR_CURRENT_CONFIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) pr_info("PL4 support detected.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) rapl_msr_priv.control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (IS_ERR(rapl_msr_priv.control_type)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) pr_debug("failed to register powercap control_type.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return PTR_ERR(rapl_msr_priv.control_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) rapl_cpu_online, rapl_cpu_down_prep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) rapl_msr_priv.pcap_rapl_online = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) powercap_unregister_control_type(rapl_msr_priv.control_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static int rapl_msr_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) powercap_unregister_control_type(rapl_msr_priv.control_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static const struct platform_device_id rapl_msr_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { .name = "intel_rapl_msr", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MODULE_DEVICE_TABLE(platform, rapl_msr_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static struct platform_driver intel_rapl_msr_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .probe = rapl_msr_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .remove = rapl_msr_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .id_table = rapl_msr_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .name = "intel_rapl_msr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) module_platform_driver(intel_rapl_msr_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit) control via MSR interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MODULE_AUTHOR("Zhang Rui <rui.zhang@intel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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