^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for UCS1002 Programmable USB Port Power Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2019 Zodiac Inflight Innovations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/bits.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/freezer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kthread.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/power_supply.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/regulator/of_regulator.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* UCS1002 Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define UCS1002_REG_CURRENT_MEASUREMENT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * The Total Accumulated Charge registers store the total accumulated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * charge delivered from the VS source to a portable device. The total
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * value is calculated using four registers, from 01h to 04h. The bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * weighting of the registers is given in mA/hrs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define UCS1002_REG_TOTAL_ACC_CHARGE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* Other Status Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define UCS1002_REG_OTHER_STATUS 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) # define F_ADET_PIN BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) # define F_CHG_ACT BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* Interrupt Status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define UCS1002_REG_INTERRUPT_STATUS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) # define F_ERR BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) # define F_DISCHARGE_ERR BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) # define F_RESET BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) # define F_MIN_KEEP_OUT BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) # define F_TSD BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) # define F_OVER_VOLT BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) # define F_BACK_VOLT BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) # define F_OVER_ILIM BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Pin Status Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define UCS1002_REG_PIN_STATUS 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) # define UCS1002_PWR_STATE_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) # define F_PWR_EN_PIN BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) # define F_M2_PIN BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) # define F_M1_PIN BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) # define F_EM_EN_PIN BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) # define F_SEL_PIN BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) # define F_ACTIVE_MODE_MASK GENMASK(5, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) # define F_ACTIVE_MODE_PASSTHROUGH F_M2_PIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) # define F_ACTIVE_MODE_DEDICATED F_EM_EN_PIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) # define F_ACTIVE_MODE_BC12_DCP (F_M2_PIN | F_EM_EN_PIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) # define F_ACTIVE_MODE_BC12_SDP F_M1_PIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) # define F_ACTIVE_MODE_BC12_CDP (F_M1_PIN | F_M2_PIN | F_EM_EN_PIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* General Configuration Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define UCS1002_REG_GENERAL_CFG 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) # define F_RATION_EN BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Emulation Configuration Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define UCS1002_REG_EMU_CFG 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Switch Configuration Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define UCS1002_REG_SWITCH_CFG 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) # define F_PIN_IGNORE BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) # define F_EM_EN_SET BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) # define F_M2_SET BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) # define F_M1_SET BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) # define F_S0_SET BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) # define F_PWR_EN_SET BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) # define F_LATCH_SET BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) # define V_SET_ACTIVE_MODE_MASK GENMASK(5, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) # define V_SET_ACTIVE_MODE_PASSTHROUGH F_M2_SET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) # define V_SET_ACTIVE_MODE_DEDICATED F_EM_EN_SET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) # define V_SET_ACTIVE_MODE_BC12_DCP (F_M2_SET | F_EM_EN_SET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) # define V_SET_ACTIVE_MODE_BC12_SDP F_M1_SET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) # define V_SET_ACTIVE_MODE_BC12_CDP (F_M1_SET | F_M2_SET | F_EM_EN_SET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* Current Limit Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define UCS1002_REG_ILIMIT 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) # define UCS1002_ILIM_SW_MASK GENMASK(3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* Product ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define UCS1002_REG_PRODUCT_ID 0xfd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) # define UCS1002_PRODUCT_ID 0x4e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* Manufacture name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define UCS1002_MANUFACTURER "SMSC"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct ucs1002_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct power_supply *charger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct regulator_desc *regulator_descriptor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct regulator_dev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) bool present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) bool output_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct delayed_work health_poll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int health;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static enum power_supply_property ucs1002_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) POWER_SUPPLY_PROP_ONLINE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) POWER_SUPPLY_PROP_CURRENT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) POWER_SUPPLY_PROP_PRESENT, /* the presence of PED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) POWER_SUPPLY_PROP_USB_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int ucs1002_get_online(struct ucs1002_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ret = regmap_read(info->regmap, UCS1002_REG_OTHER_STATUS, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) val->intval = !!(reg & F_CHG_ACT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int ucs1002_get_charge(struct ucs1002_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * To fit within 32 bits some values are rounded (uA/h)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * For Total Accumulated Charge Middle Low Byte register, addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * 03h, byte 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * B0: 0.01084 mA/h rounded to 11 uA/h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * B1: 0.02169 mA/h rounded to 22 uA/h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * B2: 0.04340 mA/h rounded to 43 uA/h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * B3: 0.08676 mA/h rounded to 87 uA/h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * B4: 0.17350 mA/h rounded to 173 uÁ/h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * For Total Accumulated Charge Low Byte register, addr 04h,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * byte 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * B6: 0.00271 mA/h rounded to 3 uA/h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * B7: 0.005422 mA/h rounded to 5 uA/h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static const int bit_weights_uAh[BITS_PER_TYPE(u32)] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * Bit corresponding to low byte (offset 0x04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * B0 B1 B2 B3 B4 B5 B6 B7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 0, 0, 0, 0, 0, 0, 3, 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * Bit corresponding to middle low byte (offset 0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * B0 B1 B2 B3 B4 B5 B6 B7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 11, 22, 43, 87, 173, 347, 694, 1388,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * Bit corresponding to middle high byte (offset 0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * B0 B1 B2 B3 B4 B5 B6 B7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 2776, 5552, 11105, 22210, 44420, 88840, 177700, 355400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * Bit corresponding to high byte (offset 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * B0 B1 B2 B3 B4 B5 B6 B7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 710700, 1421000, 2843000, 5685000, 11371000, 22742000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 45484000, 90968000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) unsigned long total_acc_charger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) ret = regmap_bulk_read(info->regmap, UCS1002_REG_TOTAL_ACC_CHARGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) ®, sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) total_acc_charger = be32_to_cpu(reg); /* BE as per offsets above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) val->intval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) for_each_set_bit(i, &total_acc_charger, ARRAY_SIZE(bit_weights_uAh))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) val->intval += bit_weights_uAh[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static int ucs1002_get_current(struct ucs1002_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * The Current Measurement register stores the measured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * current value delivered to the portable device. The range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * is from 9.76 mA to 2.5 A.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static const int bit_weights_uA[BITS_PER_TYPE(u8)] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 9760, 19500, 39000, 78100, 156200, 312300, 624600, 1249300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned long current_measurement;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ret = regmap_read(info->regmap, UCS1002_REG_CURRENT_MEASUREMENT, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) current_measurement = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) val->intval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) for_each_set_bit(i, ¤t_measurement, ARRAY_SIZE(bit_weights_uA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) val->intval += bit_weights_uA[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * The Current Limit register stores the maximum current used by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * port switch. The range is from 500mA to 2.5 A.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static const u32 ucs1002_current_limit_uA[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 500000, 900000, 1000000, 1200000, 1500000, 1800000, 2000000, 2500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static int ucs1002_get_max_current(struct ucs1002_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (info->output_disable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) val->intval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ret = regmap_read(info->regmap, UCS1002_REG_ILIMIT, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) val->intval = ucs1002_current_limit_uA[reg & UCS1002_ILIM_SW_MASK];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static int ucs1002_set_max_current(struct ucs1002_info *info, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) int ret, idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (val == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) info->output_disable = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) regulator_disable_regmap(info->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) for (idx = 0; idx < ARRAY_SIZE(ucs1002_current_limit_uA); idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (val == ucs1002_current_limit_uA[idx])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (idx == ARRAY_SIZE(ucs1002_current_limit_uA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ret = regmap_write(info->regmap, UCS1002_REG_ILIMIT, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * Any current limit setting exceeding the one set via ILIM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * pin will be rejected, so we read out freshly changed limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * to make sure that it took effect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ret = regmap_read(info->regmap, UCS1002_REG_ILIMIT, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (reg != idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) info->output_disable = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (info->rdev && info->rdev->use_count &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) !regulator_is_enabled_regmap(info->rdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) regulator_enable_regmap(info->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static enum power_supply_usb_type ucs1002_usb_types[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) POWER_SUPPLY_USB_TYPE_PD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) POWER_SUPPLY_USB_TYPE_SDP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) POWER_SUPPLY_USB_TYPE_DCP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) POWER_SUPPLY_USB_TYPE_CDP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) POWER_SUPPLY_USB_TYPE_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int ucs1002_set_usb_type(struct ucs1002_info *info, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (val < 0 || val >= ARRAY_SIZE(ucs1002_usb_types))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) switch (ucs1002_usb_types[val]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) case POWER_SUPPLY_USB_TYPE_PD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) mode = V_SET_ACTIVE_MODE_DEDICATED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) case POWER_SUPPLY_USB_TYPE_SDP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) mode = V_SET_ACTIVE_MODE_BC12_SDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) case POWER_SUPPLY_USB_TYPE_DCP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) mode = V_SET_ACTIVE_MODE_BC12_DCP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) case POWER_SUPPLY_USB_TYPE_CDP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) mode = V_SET_ACTIVE_MODE_BC12_CDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return regmap_update_bits(info->regmap, UCS1002_REG_SWITCH_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) V_SET_ACTIVE_MODE_MASK, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static int ucs1002_get_usb_type(struct ucs1002_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) enum power_supply_usb_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) ret = regmap_read(info->regmap, UCS1002_REG_PIN_STATUS, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) switch (reg & F_ACTIVE_MODE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) case F_ACTIVE_MODE_DEDICATED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) type = POWER_SUPPLY_USB_TYPE_PD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) case F_ACTIVE_MODE_BC12_SDP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) type = POWER_SUPPLY_USB_TYPE_SDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) case F_ACTIVE_MODE_BC12_DCP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) type = POWER_SUPPLY_USB_TYPE_DCP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) case F_ACTIVE_MODE_BC12_CDP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) type = POWER_SUPPLY_USB_TYPE_CDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) val->intval = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static int ucs1002_get_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct ucs1002_info *info = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) case POWER_SUPPLY_PROP_ONLINE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return ucs1002_get_online(info, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) case POWER_SUPPLY_PROP_CHARGE_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return ucs1002_get_charge(info, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) case POWER_SUPPLY_PROP_CURRENT_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return ucs1002_get_current(info, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) case POWER_SUPPLY_PROP_CURRENT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) return ucs1002_get_max_current(info, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) case POWER_SUPPLY_PROP_USB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return ucs1002_get_usb_type(info, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) case POWER_SUPPLY_PROP_HEALTH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return val->intval = info->health;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) case POWER_SUPPLY_PROP_PRESENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) val->intval = info->present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) case POWER_SUPPLY_PROP_MANUFACTURER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) val->strval = UCS1002_MANUFACTURER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static int ucs1002_set_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) const union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct ucs1002_info *info = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) case POWER_SUPPLY_PROP_CURRENT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return ucs1002_set_max_current(info, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) case POWER_SUPPLY_PROP_USB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return ucs1002_set_usb_type(info, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static int ucs1002_property_is_writeable(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) enum power_supply_property psp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) case POWER_SUPPLY_PROP_CURRENT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) case POWER_SUPPLY_PROP_USB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static const struct power_supply_desc ucs1002_charger_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .name = "ucs1002",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .type = POWER_SUPPLY_TYPE_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .usb_types = ucs1002_usb_types,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .num_usb_types = ARRAY_SIZE(ucs1002_usb_types),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .get_property = ucs1002_get_property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .set_property = ucs1002_set_property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .property_is_writeable = ucs1002_property_is_writeable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .properties = ucs1002_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .num_properties = ARRAY_SIZE(ucs1002_props),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static void ucs1002_health_poll(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) struct ucs1002_info *info = container_of(work, struct ucs1002_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) health_poll.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) ret = regmap_read(info->regmap, UCS1002_REG_INTERRUPT_STATUS, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /* bad health and no status change, just schedule us again in a while */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if ((reg & F_ERR) && info->health != POWER_SUPPLY_HEALTH_GOOD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) schedule_delayed_work(&info->health_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) msecs_to_jiffies(2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (reg & F_TSD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) info->health = POWER_SUPPLY_HEALTH_OVERHEAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) else if (reg & (F_OVER_VOLT | F_BACK_VOLT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) info->health = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) else if (reg & F_OVER_ILIM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) info->health = POWER_SUPPLY_HEALTH_OVERCURRENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) else if (reg & (F_DISCHARGE_ERR | F_MIN_KEEP_OUT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) info->health = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) info->health = POWER_SUPPLY_HEALTH_GOOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) sysfs_notify(&info->charger->dev.kobj, NULL, "health");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static irqreturn_t ucs1002_charger_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) int ret, regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) bool present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct ucs1002_info *info = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) present = info->present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) ret = regmap_read(info->regmap, UCS1002_REG_OTHER_STATUS, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /* update attached status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) info->present = regval & F_ADET_PIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) /* notify the change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (present != info->present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) power_supply_changed(info->charger);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static irqreturn_t ucs1002_alert_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) struct ucs1002_info *info = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) mod_delayed_work(system_wq, &info->health_poll, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static int ucs1002_regulator_enable(struct regulator_dev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct ucs1002_info *info = rdev_get_drvdata(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) * If the output is disabled due to 0 maximum current, just pretend the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * enable did work. The regulator will be enabled as soon as we get a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * a non-zero maximum current budget.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (info->output_disable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return regulator_enable_regmap(rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static const struct regulator_ops ucs1002_regulator_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .is_enabled = regulator_is_enabled_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .enable = ucs1002_regulator_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) .disable = regulator_disable_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static const struct regulator_desc ucs1002_regulator_descriptor = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .name = "ucs1002-vbus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .ops = &ucs1002_regulator_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .enable_reg = UCS1002_REG_SWITCH_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .enable_mask = F_PWR_EN_SET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .enable_val = F_PWR_EN_SET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) .fixed_uV = 5000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static int ucs1002_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) const struct i2c_device_id *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) struct power_supply_config charger_config = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) const struct regmap_config regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) struct regulator_config regulator_config = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) int irq_a_det, irq_alert, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) struct ucs1002_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) info->regmap = devm_regmap_init_i2c(client, ®map_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ret = PTR_ERR_OR_ZERO(info->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) dev_err(dev, "Regmap initialization failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) info->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) irq_a_det = of_irq_get_byname(dev->of_node, "a_det");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) irq_alert = of_irq_get_byname(dev->of_node, "alert");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) charger_config.of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) charger_config.drv_data = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) ret = regmap_read(info->regmap, UCS1002_REG_PRODUCT_ID, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) dev_err(dev, "Failed to read product ID: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (regval != UCS1002_PRODUCT_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) "Product ID does not match (0x%02x != 0x%02x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) regval, UCS1002_PRODUCT_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* Enable charge rationing by default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) ret = regmap_update_bits(info->regmap, UCS1002_REG_GENERAL_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) F_RATION_EN, F_RATION_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) dev_err(dev, "Failed to read general config: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * Ignore the M1, M2, PWR_EN, and EM_EN pin states. Set active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * mode selection to BC1.2 CDP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) ret = regmap_update_bits(info->regmap, UCS1002_REG_SWITCH_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) V_SET_ACTIVE_MODE_MASK | F_PIN_IGNORE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) V_SET_ACTIVE_MODE_BC12_CDP | F_PIN_IGNORE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) dev_err(dev, "Failed to configure default mode: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) * Be safe and set initial current limit to 500mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) ret = ucs1002_set_max_current(info, 500000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) dev_err(dev, "Failed to set max current default: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) info->charger = devm_power_supply_register(dev, &ucs1002_charger_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) &charger_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ret = PTR_ERR_OR_ZERO(info->charger);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) dev_err(dev, "Failed to register power supply: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) ret = regmap_read(info->regmap, UCS1002_REG_PIN_STATUS, ®val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) dev_err(dev, "Failed to read pin status: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) info->regulator_descriptor =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) devm_kmemdup(dev, &ucs1002_regulator_descriptor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) sizeof(ucs1002_regulator_descriptor),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (!info->regulator_descriptor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) info->regulator_descriptor->enable_is_inverted = !(regval & F_SEL_PIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) regulator_config.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) regulator_config.of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) regulator_config.regmap = info->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) regulator_config.driver_data = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) info->rdev = devm_regulator_register(dev, info->regulator_descriptor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) ®ulator_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) ret = PTR_ERR_OR_ZERO(info->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) dev_err(dev, "Failed to register VBUS regulator: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) info->health = POWER_SUPPLY_HEALTH_GOOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) INIT_DELAYED_WORK(&info->health_poll, ucs1002_health_poll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) if (irq_a_det > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) ret = devm_request_threaded_irq(dev, irq_a_det, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ucs1002_charger_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) "ucs1002-a_det", info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) dev_err(dev, "Failed to request A_DET threaded irq: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (irq_alert > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) ret = devm_request_irq(dev, irq_alert, ucs1002_alert_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 0,"ucs1002-alert", info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) dev_err(dev, "Failed to request ALERT threaded irq: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static const struct of_device_id ucs1002_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) { .compatible = "microchip,ucs1002", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) MODULE_DEVICE_TABLE(of, ucs1002_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static struct i2c_driver ucs1002_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) .name = "ucs1002",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) .of_match_table = ucs1002_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .probe = ucs1002_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) module_i2c_driver(ucs1002_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) MODULE_DESCRIPTION("Microchip UCS1002 Programmable USB Port Power Controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) MODULE_AUTHOR("Enric Balletbo Serra <enric.balletbo@collabora.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) MODULE_AUTHOR("Andrey Smirnov <andrew.smirnov@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags