^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Chrager driver for Sc89890
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Xu Shengfei <xsf@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/power_supply.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Module parameters. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) module_param_named(debug, debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MODULE_PARM_DESC(debug, "Set to one to enable debugging messages.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DBG(args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) if (debug) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) pr_info(args); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define SC89890_MANUFACTURER "SOUTHCHIP"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SC89890_IRQ "sc89890_irq"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define SC89890_ID 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define SC89890_DEBUG_BUF_LEN 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) enum sc89890_fields {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) F_EN_HIZ, F_EN_ILIM, F_IILIM, /* Reg00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) F_BHOT, F_BCOLD, F_VINDPM_OFS, /* Reg01 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) F_CONV_START, F_CONV_RATE, F_BOOSTF, F_ICO_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) F_HVDCP_EN, F_MAXC_EN, F_FORCE_DPM, F_AUTO_DPDM_EN, /* Reg02 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) F_BAT_LOAD_EN, F_WD_RST, F_OTG_CFG, F_CHG_CFG, F_SYSVMIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) F_MIN_VBAT_SEL, /* Reg03 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) F_PUMPX_EN, F_ICHG, /* Reg04 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) F_IPRECHG, F_ITERM, /* Reg05 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) F_VREG, F_BATLOWV, F_VRECHG, /* Reg06 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) F_TERM_EN, F_STAT_DIS, F_WD, F_TMR_EN, F_CHG_TMR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) F_JEITA_ISET, /* Reg07 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) F_BATCMP, F_VCLAMP, F_TREG, /* Reg08 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) F_FORCE_ICO, F_TMR2X_EN, F_BATFET_DIS, F_JEITA_VSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) F_BATFET_DLY, F_BATFET_RST_EN, F_PUMPX_UP, F_PUMPX_DN, /* Reg09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) F_BOOSTV, F_PFM_OTG_DIS, F_BOOSTI, /* Reg0A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) F_VBUS_STAT, F_CHG_STAT, F_PG_STAT, F_SDP_STAT, F_0B_RSVD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) F_VSYS_STAT, /* Reg0B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) F_WD_FAULT, F_BOOST_FAULT, F_CHG_FAULT, F_BAT_FAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) F_NTC_FAULT, /* Reg0C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) F_FORCE_VINDPM, F_VINDPM, /* Reg0D */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) F_THERM_STAT, F_BATV, /* Reg0E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) F_SYSV, /* Reg0F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) F_TSPCT, /* Reg10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) F_VBUS_GD, F_VBUSV, /* Reg11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) F_ICHGR, /* Reg12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) F_VDPM_STAT, F_IDPM_STAT, F_IDPM_LIM, /* Reg13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) F_REG_RST, F_ICO_OPTIMIZED, F_PN, F_TS_PROFILE, F_DEV_REV, /* Reg14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) F_MAX_FIELDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* initial field values, converted to register values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct sc89890_init_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u8 ichg; /* charge current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u8 vreg; /* regulation voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 iterm; /* termination current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u8 iprechg; /* precharge current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u8 sysvmin; /* minimum system voltage limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u8 boostv; /* boost regulation voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u8 boosti; /* boost current limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u8 boostf; /* boost frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u8 ilim_en; /* enable ILIM pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u8 treg; /* thermal regulation threshold */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) u8 rbatcomp; /* IBAT sense resistor value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u8 vclamp; /* IBAT compensation voltage limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct sc89890_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u8 online;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u8 chrg_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u8 chrg_fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u8 vsys_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u8 boost_fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) u8 bat_fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct sc89890_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct power_supply *charger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct regulator_dev *otg_vbus_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned long usb_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct regmap *rmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct regmap_field *rmap_fields[F_MAX_FIELDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct sc89890_init_data init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct sc89890_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct mutex lock; /* protect state data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const struct regmap_range sc89890_readonly_reg_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) regmap_reg_range(0x0b, 0x0c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) regmap_reg_range(0x0e, 0x13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static const struct regmap_access_table sc89890_writeable_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .no_ranges = sc89890_readonly_reg_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .n_no_ranges = ARRAY_SIZE(sc89890_readonly_reg_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static const struct regmap_range sc89890_volatile_reg_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) regmap_reg_range(0x00, 0x00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) regmap_reg_range(0x02, 0x02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) regmap_reg_range(0x09, 0x09),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) regmap_reg_range(0x0b, 0x0b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) regmap_reg_range(0x0c, 0x0c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) regmap_reg_range(0x0d, 0x14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const struct regmap_access_table sc89890_volatile_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .yes_ranges = sc89890_volatile_reg_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .n_yes_ranges = ARRAY_SIZE(sc89890_volatile_reg_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const struct regmap_config sc89890_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .max_register = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .wr_table = &sc89890_writeable_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .volatile_table = &sc89890_volatile_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static const struct reg_field sc89890_reg_fields[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* REG00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) [F_EN_HIZ] = REG_FIELD(0x00, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) [F_EN_ILIM] = REG_FIELD(0x00, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) [F_IILIM] = REG_FIELD(0x00, 0, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* REG01 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) [F_BHOT] = REG_FIELD(0x01, 6, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) [F_BCOLD] = REG_FIELD(0x01, 5, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) [F_VINDPM_OFS] = REG_FIELD(0x01, 0, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* REG02 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) [F_CONV_START] = REG_FIELD(0x02, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) [F_CONV_RATE] = REG_FIELD(0x02, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) [F_BOOSTF] = REG_FIELD(0x02, 5, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) [F_ICO_EN] = REG_FIELD(0x02, 4, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) [F_HVDCP_EN] = REG_FIELD(0x02, 3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) [F_MAXC_EN] = REG_FIELD(0x02, 2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) [F_FORCE_DPM] = REG_FIELD(0x02, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) [F_AUTO_DPDM_EN] = REG_FIELD(0x02, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* REG03 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) [F_BAT_LOAD_EN] = REG_FIELD(0x03, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) [F_WD_RST] = REG_FIELD(0x03, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) [F_OTG_CFG] = REG_FIELD(0x03, 5, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) [F_CHG_CFG] = REG_FIELD(0x03, 4, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) [F_SYSVMIN] = REG_FIELD(0x03, 1, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) [F_MIN_VBAT_SEL] = REG_FIELD(0x03, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* REG04 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) [F_PUMPX_EN] = REG_FIELD(0x04, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) [F_ICHG] = REG_FIELD(0x04, 0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* REG05 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) [F_IPRECHG] = REG_FIELD(0x05, 4, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) [F_ITERM] = REG_FIELD(0x05, 0, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* REG06 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) [F_VREG] = REG_FIELD(0x06, 2, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) [F_BATLOWV] = REG_FIELD(0x06, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) [F_VRECHG] = REG_FIELD(0x06, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* REG07 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) [F_TERM_EN] = REG_FIELD(0x07, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) [F_STAT_DIS] = REG_FIELD(0x07, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) [F_WD] = REG_FIELD(0x07, 4, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) [F_TMR_EN] = REG_FIELD(0x07, 3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) [F_CHG_TMR] = REG_FIELD(0x07, 1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) [F_JEITA_ISET] = REG_FIELD(0x07, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* REG08 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) [F_BATCMP] = REG_FIELD(0x08, 5, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) [F_VCLAMP] = REG_FIELD(0x08, 2, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) [F_TREG] = REG_FIELD(0x08, 0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* REG09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) [F_FORCE_ICO] = REG_FIELD(0x09, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) [F_TMR2X_EN] = REG_FIELD(0x09, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) [F_BATFET_DIS] = REG_FIELD(0x09, 5, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) [F_JEITA_VSET] = REG_FIELD(0x09, 4, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) [F_BATFET_DLY] = REG_FIELD(0x09, 3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) [F_BATFET_RST_EN] = REG_FIELD(0x09, 2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) [F_PUMPX_UP] = REG_FIELD(0x09, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) [F_PUMPX_DN] = REG_FIELD(0x09, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* REG0A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) [F_BOOSTV] = REG_FIELD(0x0A, 4, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) [F_BOOSTI] = REG_FIELD(0x0A, 0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) [F_PFM_OTG_DIS] = REG_FIELD(0x0A, 3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* REG0B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) [F_VBUS_STAT] = REG_FIELD(0x0B, 5, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) [F_CHG_STAT] = REG_FIELD(0x0B, 3, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) [F_PG_STAT] = REG_FIELD(0x0B, 2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) [F_SDP_STAT] = REG_FIELD(0x0B, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) [F_VSYS_STAT] = REG_FIELD(0x0B, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* REG0C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) [F_WD_FAULT] = REG_FIELD(0x0C, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) [F_BOOST_FAULT] = REG_FIELD(0x0C, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) [F_CHG_FAULT] = REG_FIELD(0x0C, 4, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) [F_BAT_FAULT] = REG_FIELD(0x0C, 3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) [F_NTC_FAULT] = REG_FIELD(0x0C, 0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /* REG0D */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) [F_FORCE_VINDPM] = REG_FIELD(0x0D, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) [F_VINDPM] = REG_FIELD(0x0D, 0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* REG0E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) [F_THERM_STAT] = REG_FIELD(0x0E, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) [F_BATV] = REG_FIELD(0x0E, 0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* REG0F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) [F_SYSV] = REG_FIELD(0x0F, 0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /* REG10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) [F_TSPCT] = REG_FIELD(0x10, 0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* REG11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) [F_VBUS_GD] = REG_FIELD(0x11, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) [F_VBUSV] = REG_FIELD(0x11, 0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* REG12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) [F_ICHGR] = REG_FIELD(0x12, 0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* REG13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) [F_VDPM_STAT] = REG_FIELD(0x13, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) [F_IDPM_STAT] = REG_FIELD(0x13, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) [F_IDPM_LIM] = REG_FIELD(0x13, 0, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* REG14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) [F_REG_RST] = REG_FIELD(0x14, 7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) [F_ICO_OPTIMIZED] = REG_FIELD(0x14, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) [F_PN] = REG_FIELD(0x14, 3, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) [F_TS_PROFILE] = REG_FIELD(0x14, 2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) [F_DEV_REV] = REG_FIELD(0x14, 0, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) enum sc89890_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) STATUS_NOT_CHARGING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) STATUS_PRE_CHARGING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) STATUS_FAST_CHARGING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) STATUS_TERMINATION_DONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) enum sc89890_chrg_fault {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) CHRG_FAULT_NORMAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) CHRG_FAULT_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) CHRG_FAULT_THERMAL_SHUTDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) CHRG_FAULT_TIMER_EXPIRED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * Most of the val -> idx conversions can be computed, given the minimum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * maximum and the step between values. For the rest of conversions, we use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * lookup tables.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) enum sc89890_table_ids {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* range tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) TBL_ICHG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) TBL_ITERM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) TBL_IILIM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) TBL_VREG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) TBL_BOOSTV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) TBL_SYSVMIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) TBL_VBATCOMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) TBL_RBATCOMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* lookup tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) TBL_TREG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) TBL_BOOSTI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* Thermal Regulation Threshold lookup table, in degrees Celsius */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const u32 sc89890_treg_tbl[] = { 60, 80, 100, 120 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define SC89890_TREG_TBL_SIZE ARRAY_SIZE(sc89890_treg_tbl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* Boost mode current limit lookup table, in uA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static const u32 sc89890_boosti_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 500000, 700000, 1100000, 1300000, 1600000, 1800000, 2100000, 2400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define SC89890_BOOSTI_TBL_SIZE ARRAY_SIZE(sc89890_boosti_tbl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct sc89890_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u32 min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u32 max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u32 step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct sc89890_lookup {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) const u32 *tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) u32 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static const union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct sc89890_range rt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct sc89890_lookup lt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) } sc89890_tables[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* range tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) [TBL_ICHG] = { .rt = {0, 5056000, 64000} }, /* uA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) [TBL_ITERM] = { .rt = {64000, 1024000, 64000} }, /* uA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) [TBL_IILIM] = { .rt = {100000, 3250000, 50000} }, /* uA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) [TBL_VREG] = { .rt = {3840000, 4608000, 16000} }, /* uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) [TBL_BOOSTV] = { .rt = {4550000, 5510000, 64000} }, /* uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) [TBL_SYSVMIN] = { .rt = {3000000, 3700000, 100000} }, /* uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) [TBL_VBATCOMP] = { .rt = {0, 224000, 32000} }, /* uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) [TBL_RBATCOMP] = { .rt = {0, 140000, 20000} }, /* uOhm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* lookup tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) [TBL_TREG] = { .lt = {sc89890_treg_tbl, SC89890_TREG_TBL_SIZE} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) [TBL_BOOSTI] = { .lt = {sc89890_boosti_tbl, SC89890_BOOSTI_TBL_SIZE} }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int sc89890_field_read(struct sc89890_device *sc89890,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) enum sc89890_fields field_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) ret = regmap_field_read(sc89890->rmap_fields[field_id], &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static int sc89890_field_write(struct sc89890_device *sc89890,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) enum sc89890_fields field_id, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return regmap_field_write(sc89890->rmap_fields[field_id], val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static u8 sc89890_find_idx(u32 value, enum sc89890_table_ids id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) u8 idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (id >= TBL_TREG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) const u32 *tbl = sc89890_tables[id].lt.tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u32 tbl_size = sc89890_tables[id].lt.size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) for (idx = 1; idx < tbl_size && tbl[idx] <= value; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) const struct sc89890_range *rtbl = &sc89890_tables[id].rt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) u8 rtbl_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) rtbl_size = (rtbl->max - rtbl->min) / rtbl->step + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) for (idx = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) idx < rtbl_size && (idx * rtbl->step + rtbl->min <= value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) return idx - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static u32 sc89890_find_val(u8 idx, enum sc89890_table_ids id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) const struct sc89890_range *rtbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* lookup table? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (id >= TBL_TREG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return sc89890_tables[id].lt.tbl[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /* range table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) rtbl = &sc89890_tables[id].rt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return (rtbl->min + idx * rtbl->step);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static bool sc89890_is_adc_property(enum power_supply_property psp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) case POWER_SUPPLY_PROP_VOLTAGE_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) case POWER_SUPPLY_PROP_CURRENT_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) static int sc89890_get_chip_state(struct sc89890_device *sc89890,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) struct sc89890_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) enum sc89890_fields id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) u8 *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) } state_fields[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {F_CHG_STAT, &state->chrg_status},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {F_PG_STAT, &state->online},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {F_VSYS_STAT, &state->vsys_status},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {F_BOOST_FAULT, &state->boost_fault},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {F_BAT_FAULT, &state->bat_fault},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {F_CHG_FAULT, &state->chrg_fault}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) for (i = 0; i < ARRAY_SIZE(state_fields); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) ret = sc89890_field_read(sc89890, state_fields[i].id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) *state_fields[i].data = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) DBG("SC89890: S:CHG/PG/VSYS=%d/%d/%d, F:CHG/BOOST/BAT=%d/%d/%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) state->chrg_status, state->online, state->vsys_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) state->chrg_fault, state->boost_fault, state->bat_fault);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static irqreturn_t __sc89890_handle_irq(struct sc89890_device *sc89890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct sc89890_state new_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) ret = sc89890_get_chip_state(sc89890, &new_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (!memcmp(&sc89890->state, &new_state, sizeof(new_state)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (!new_state.online && sc89890->state.online) { /* power removed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /* disable ADC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) ret = sc89890_field_write(sc89890, F_CONV_START, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) } else if (new_state.online && !sc89890->state.online) { /* power inserted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) /* enable ADC, to have control of charge current/voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ret = sc89890_field_write(sc89890, F_CONV_START, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) sc89890->state = new_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) power_supply_changed(sc89890->charger);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) dev_err(sc89890->dev, "Error communicating with the chip: %pe\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) ERR_PTR(ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) static int sc89890_power_supply_get_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) struct sc89890_device *sc89890 = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) struct sc89890_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) bool do_adc_conv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) mutex_lock(&sc89890->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) /* update state in case we lost an interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) __sc89890_handle_irq(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) state = sc89890->state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) do_adc_conv = !state.online && sc89890_is_adc_property(psp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (do_adc_conv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) sc89890_field_write(sc89890, F_CONV_START, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) mutex_unlock(&sc89890->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (do_adc_conv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) regmap_field_read_poll_timeout(sc89890->rmap_fields[F_CONV_START],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) ret, !ret, 25000, 1000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) case POWER_SUPPLY_PROP_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (!state.online)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) else if (state.chrg_status == STATUS_NOT_CHARGING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) else if (state.chrg_status == STATUS_PRE_CHARGING ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) state.chrg_status == STATUS_FAST_CHARGING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) val->intval = POWER_SUPPLY_STATUS_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) else if (state.chrg_status == STATUS_TERMINATION_DONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) val->intval = POWER_SUPPLY_STATUS_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) case POWER_SUPPLY_PROP_CHARGE_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (!state.online || state.chrg_status == STATUS_NOT_CHARGING ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) state.chrg_status == STATUS_TERMINATION_DONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) else if (state.chrg_status == STATUS_PRE_CHARGING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) val->intval = POWER_SUPPLY_CHARGE_TYPE_STANDARD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) else if (state.chrg_status == STATUS_FAST_CHARGING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) val->intval = POWER_SUPPLY_CHARGE_TYPE_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) else /* unreachable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) val->intval = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) case POWER_SUPPLY_PROP_MANUFACTURER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) val->strval = SC89890_MANUFACTURER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) case POWER_SUPPLY_PROP_MODEL_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) val->strval = "SC89890";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) case POWER_SUPPLY_PROP_ONLINE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) val->intval = !!state.chrg_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) case POWER_SUPPLY_PROP_HEALTH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (!state.chrg_fault && !state.bat_fault && !state.boost_fault)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) val->intval = POWER_SUPPLY_HEALTH_GOOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) else if (state.bat_fault)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) else if (state.chrg_fault == CHRG_FAULT_TIMER_EXPIRED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) val->intval = POWER_SUPPLY_HEALTH_SAFETY_TIMER_EXPIRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) else if (state.chrg_fault == CHRG_FAULT_THERMAL_SHUTDOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) val->intval = POWER_SUPPLY_HEALTH_OVERHEAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) val->intval = sc89890_find_val(sc89890->init_data.ichg, TBL_ICHG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (!state.online) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) val->intval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) ret = sc89890_field_read(sc89890, F_BATV); /* read measured value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* converted_val = 2.304V + ADC_val * 20mV (table 10.3.15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) val->intval = 2304000 + ret * 20000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) val->intval = sc89890_find_val(sc89890->init_data.vreg, TBL_VREG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) val->intval = sc89890_find_val(sc89890->init_data.iprechg, TBL_ITERM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) val->intval = sc89890_find_val(sc89890->init_data.iterm, TBL_ITERM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) ret = sc89890_field_read(sc89890, F_IILIM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) val->intval = sc89890_find_val(ret, TBL_IILIM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) val->intval = 13500000; /* uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) case POWER_SUPPLY_PROP_VOLTAGE_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) ret = sc89890_field_read(sc89890, F_SYSV); /* read measured value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) /* converted_val = 2.304V + ADC_val * 20mV (table 10.3.15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) val->intval = 2304000 + ret * 20000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) case POWER_SUPPLY_PROP_CURRENT_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ret = sc89890_field_read(sc89890, F_ICHGR); /* read measured value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* converted_val = ADC_val * 50mA (table 10.3.19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) val->intval = ret * -50000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static int sc89890_power_supply_set_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) const union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) struct sc89890_device *sc89890 = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) int index, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) index = sc89890_find_idx(val->intval, TBL_ICHG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) ret = sc89890_field_write(sc89890, F_ICHG, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) dev_err(sc89890->dev, "set input voltage limit failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) index = sc89890_find_idx(val->intval, TBL_IILIM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) ret = sc89890_field_write(sc89890, F_IILIM, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) dev_err(sc89890->dev, "set input current limit failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) static irqreturn_t sc89890_irq_handler_thread(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) struct sc89890_device *sc89890 = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) irqreturn_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) mutex_lock(&sc89890->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) ret = __sc89890_handle_irq(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) mutex_unlock(&sc89890->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static int sc89890_chip_reset(struct sc89890_device *sc89890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) int rst_check_counter = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) ret = sc89890_field_write(sc89890, F_REG_RST, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) ret = sc89890_field_read(sc89890, F_REG_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) usleep_range(5, 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) } while (ret == 1 && --rst_check_counter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) if (!rst_check_counter)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) static int sc89890_hw_init(struct sc89890_device *sc89890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) enum sc89890_fields id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) } init_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) {F_ICHG, sc89890->init_data.ichg},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) {F_VREG, sc89890->init_data.vreg},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {F_ITERM, sc89890->init_data.iterm},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {F_IPRECHG, sc89890->init_data.iprechg},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {F_SYSVMIN, sc89890->init_data.sysvmin},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) {F_BOOSTV, sc89890->init_data.boostv},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {F_BOOSTI, sc89890->init_data.boosti},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {F_BOOSTF, sc89890->init_data.boostf},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) {F_EN_ILIM, sc89890->init_data.ilim_en},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) {F_TREG, sc89890->init_data.treg},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {F_BATCMP, sc89890->init_data.rbatcomp},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {F_VCLAMP, sc89890->init_data.vclamp},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) ret = sc89890_chip_reset(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) dev_dbg(sc89890->dev, "Reset failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) /* disable watchdog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) ret = sc89890_field_write(sc89890, F_WD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) dev_dbg(sc89890->dev, "Disabling watchdog failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) /* initialize currents/voltages and other parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) for (i = 0; i < ARRAY_SIZE(init_data); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) ret = sc89890_field_write(sc89890, init_data[i].id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) init_data[i].value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) dev_dbg(sc89890->dev, "Writing init data failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) /* Configure ADC for continuous conversions when charging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) ret = sc89890_field_write(sc89890, F_CONV_RATE, !!sc89890->state.online);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) dev_err(sc89890->dev, "Config ADC failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) ret = sc89890_field_write(sc89890, F_AUTO_DPDM_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) dev_err(sc89890->dev, "Config F_AUTO_DPDM_EN failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) ret = sc89890_field_write(sc89890, F_HVDCP_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) dev_err(sc89890->dev, "Config F_HVDCP_EN failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) ret = sc89890_get_chip_state(sc89890, &sc89890->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) dev_err(sc89890->dev, "Get state failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) static const enum power_supply_property sc89890_power_supply_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) POWER_SUPPLY_PROP_MODEL_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) POWER_SUPPLY_PROP_CHARGE_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) POWER_SUPPLY_PROP_ONLINE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) POWER_SUPPLY_PROP_PRECHARGE_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) static char *sc89890_charger_supplied_to[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) "usb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static const struct power_supply_desc sc89890_power_supply_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .name = "sc89890-charger",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .type = POWER_SUPPLY_TYPE_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .properties = sc89890_power_supply_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) .num_properties = ARRAY_SIZE(sc89890_power_supply_props),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) .set_property = sc89890_power_supply_set_property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) .get_property = sc89890_power_supply_get_property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) static int sc89890_power_supply_init(struct sc89890_device *sc89890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) struct power_supply_config psy_cfg = { .drv_data = sc89890, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) psy_cfg.of_node = sc89890->dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) psy_cfg.supplied_to = sc89890_charger_supplied_to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) psy_cfg.num_supplicants = ARRAY_SIZE(sc89890_charger_supplied_to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) sc89890->charger = devm_power_supply_register(sc89890->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) &sc89890_power_supply_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) &psy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (PTR_ERR_OR_ZERO(sc89890->charger)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) dev_err(sc89890->dev, "failed to register power supply\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) return PTR_ERR(sc89890->charger);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) static int sc89890_get_chip_version(struct sc89890_device *sc89890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) id = sc89890_field_read(sc89890, F_PN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (id < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) dev_err(sc89890->dev, "Cannot read chip ID.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) return id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) } else if (id != SC89890_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) dev_err(sc89890->dev, "Unknown chip ID %d\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) DBG("charge IC: SC89890\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) static void sc89890_set_otg_vbus(struct sc89890_device *sc, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) sc89890_field_write(sc, F_OTG_CFG, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static int sc89890_otg_vbus_enable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) struct sc89890_device *sc = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) sc89890_set_otg_vbus(sc, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) static int sc89890_otg_vbus_disable(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) struct sc89890_device *sc = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) sc89890_set_otg_vbus(sc, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static int sc89890_otg_vbus_is_enabled(struct regulator_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) struct sc89890_device *sc = rdev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) val = sc89890_field_read(sc, F_OTG_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) static const struct regulator_ops sc89890_otg_vbus_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) .enable = sc89890_otg_vbus_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) .disable = sc89890_otg_vbus_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) .is_enabled = sc89890_otg_vbus_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) static const struct regulator_desc sc89890_otg_vbus_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) .name = "otg-vbus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .of_match = "otg-vbus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .regulators_node = of_match_ptr("regulators"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) .ops = &sc89890_otg_vbus_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) .type = REGULATOR_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .fixed_uV = 5000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .n_voltages = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) static int sc89890_register_otg_vbus_regulator(struct sc89890_device *sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) struct regulator_config config = { };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) np = of_get_child_by_name(sc->dev->of_node, "regulators");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) if (!np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) dev_warn(sc->dev, "cannot find regulators node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) config.dev = sc->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) config.driver_data = sc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) sc->otg_vbus_reg = devm_regulator_register(sc->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) &sc89890_otg_vbus_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) if (IS_ERR(sc->otg_vbus_reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) return PTR_ERR(sc->otg_vbus_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) static ssize_t registers_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) struct sc89890_device *sc89890 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) u8 tmpbuf[SC89890_DEBUG_BUF_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) int idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) sc89890_field_write(sc89890, F_CONV_START, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) regmap_field_read_poll_timeout(sc89890->rmap_fields[F_CONV_START],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) ret, !ret, 25000, 1000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) for (addr = 0x0; addr <= 0x14; addr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) ret = regmap_read(sc89890->rmap, addr, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) if (ret == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) len = snprintf(tmpbuf, SC89890_DEBUG_BUF_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) "Reg[%.2X] = 0x%.2x\n", addr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) memcpy(&buf[idx], tmpbuf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) idx += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) val = sc89890_find_val(sc89890->init_data.vreg, TBL_VREG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) pr_info("CHARGE_VOLTAGE_MAX: %d\n", val / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) val = sc89890_find_val(sc89890->init_data.iprechg, TBL_ITERM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) pr_info("PRECHARGE_CURRENT: %d\n", val / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) val = sc89890_find_val(sc89890->init_data.iterm, TBL_ITERM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) pr_info("CHARGE_TERM_CURRENT: %d\n", val / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) ret = sc89890_field_read(sc89890, F_BATV); /* read measured value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) dev_err(dev, "read F_BAT error!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) /* converted_val = 2.304V + ADC_val * 20mV (table 10.3.15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) val = 2304000 + ret * 20000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) pr_info("charge voltage: %d\n", val / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) ret = sc89890_field_read(sc89890, F_IILIM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) dev_err(dev, "read F_IILIM error!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) val = sc89890_find_val(ret, TBL_IILIM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) pr_info("INPUT_CURRENT_LIMIT: %d\n", val / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) ret = sc89890_field_read(sc89890, F_SYSV); /* read measured value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) dev_err(dev, "read F_SYSV error!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) /* converted_val = 2.304V + ADC_val * 20mV (table 10.3.15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) val = 2304000 + ret * 20000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) pr_info("VOLTAGE_NOW: %d\n", val / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) ret = sc89890_field_read(sc89890, F_ICHGR); /* read measured value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) dev_err(dev, "read F_ICHRG error!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) /* converted_val = ADC_val * 50mA (table 10.3.19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) val = ret * -50000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) pr_info("CURRENT_NOW: %d\n", val / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) return idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) static ssize_t registers_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) struct sc89890_device *sc89890 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) ret = sscanf(buf, "%x %x", ®, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if (ret == 2 && reg <= 0x14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) regmap_write(sc89890->rmap, (unsigned char)reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static DEVICE_ATTR_RW(registers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) static void sc89890_create_device_node(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) device_create_file(dev, &dev_attr_registers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) static int sc89890_fw_read_u32_props(struct sc89890_device *sc89890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) struct sc89890_init_data *init = &sc89890->init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) u32 property;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) bool optional;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) enum sc89890_table_ids tbl_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) u8 *conv_data; /* holds converted value from given property */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) } props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) /* required properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) {"sc,charge-current", false, TBL_ICHG, &init->ichg},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) {"sc,battery-regulation-voltage", false, TBL_VREG, &init->vreg},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) {"sc,termination-current", false, TBL_ITERM, &init->iterm},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) {"sc,precharge-current", false, TBL_ITERM, &init->iprechg},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) {"sc,minimum-sys-voltage", false, TBL_SYSVMIN, &init->sysvmin},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) {"sc,boost-voltage", false, TBL_BOOSTV, &init->boostv},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) {"sc,boost-max-current", false, TBL_BOOSTI, &init->boosti},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) /* optional properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) {"sc,thermal-regulation-threshold", true, TBL_TREG, &init->treg},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) {"sc,ibatcomp-micro-ohms", true, TBL_RBATCOMP, &init->rbatcomp},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) {"sc,ibatcomp-clamp-microvolt", true, TBL_VBATCOMP, &init->vclamp},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) /* initialize data for optional properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) init->treg = 3; /* 120 degrees Celsius */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) init->rbatcomp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) init->vclamp = 0; /* IBAT compensation disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) for (i = 0; i < ARRAY_SIZE(props); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) ret = device_property_read_u32(sc89890->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) props[i].name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) &property);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) if (props[i].optional)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) dev_err(sc89890->dev, "Unable to read property %d %s\n", ret,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) props[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) *props[i].conv_data = sc89890_find_idx(property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) props[i].tbl_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) static int sc89890_fw_probe(struct sc89890_device *sc89890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) struct sc89890_init_data *init = &sc89890->init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) ret = sc89890_fw_read_u32_props(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) init->ilim_en = device_property_read_bool(sc89890->dev, "sc,use-ilim-pin");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) init->boostf = device_property_read_bool(sc89890->dev, "sc,boost-low-freq");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) static int sc89890_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) struct sc89890_device *sc89890;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) sc89890 = devm_kzalloc(dev, sizeof(*sc89890), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) if (!sc89890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) sc89890->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) sc89890->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) mutex_init(&sc89890->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) sc89890->rmap = devm_regmap_init_i2c(client, &sc89890_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) if (IS_ERR(sc89890->rmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) dev_err(dev, "failed to allocate register map\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) return PTR_ERR(sc89890->rmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) for (i = 0; i < ARRAY_SIZE(sc89890_reg_fields); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) const struct reg_field *reg_fields = sc89890_reg_fields;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) sc89890->rmap_fields[i] = devm_regmap_field_alloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) sc89890->rmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) reg_fields[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) if (IS_ERR(sc89890->rmap_fields[i])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) dev_err(dev, "cannot allocate regmap field\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) return PTR_ERR(sc89890->rmap_fields[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) i2c_set_clientdata(client, sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) ret = sc89890_get_chip_version(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) dev_err(dev, "Cannot read chip ID or unknown chip.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) ret = sc89890_power_supply_init(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) dev_err(dev, "Failed to register power supply\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) goto irq_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) if (!dev->platform_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) ret = sc89890_fw_probe(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) dev_err(dev, "Cannot read device properties.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) ret = sc89890_hw_init(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) dev_err(dev, "Cannot initialize the chip.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) if (client->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) dev_err(dev, "No irq resource found.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) return client->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) ret = devm_request_threaded_irq(dev, client->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) sc89890_irq_handler_thread,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) SC89890_IRQ, sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) goto irq_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) sc89890_register_otg_vbus_regulator(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) sc89890_create_device_node(sc89890->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) irq_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) static int sc89890_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) struct sc89890_device *sc89890 = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) /* reset all registers to default values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) sc89890_chip_reset(sc89890);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) static int sc89890_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) struct sc89890_device *sc89890 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) * If charger is removed, while in suspend, make sure ADC is disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) * since it consumes slightly more power.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) return sc89890_field_write(sc89890, F_CONV_RATE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) static int sc89890_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) struct sc89890_device *sc89890 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) mutex_lock(&sc89890->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) ret = sc89890_get_chip_state(sc89890, &sc89890->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) /* Re-enable ADC only if charger is plugged in. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) if (sc89890->state.online) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) ret = sc89890_field_write(sc89890, F_CONV_RATE, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) /* signal userspace, maybe state changed while suspended */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) power_supply_changed(sc89890->charger);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) mutex_unlock(&sc89890->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) static const struct dev_pm_ops sc89890_pm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) SET_SYSTEM_SLEEP_PM_OPS(sc89890_suspend, sc89890_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) static const struct i2c_device_id sc89890_i2c_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) { "sc89890", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) MODULE_DEVICE_TABLE(i2c, sc89890_i2c_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) static const struct of_device_id sc89890_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) { .compatible = "sc,sc89890", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) MODULE_DEVICE_TABLE(of, sc89890_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) static const struct acpi_device_id sc89890_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) {"SC898900", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) MODULE_DEVICE_TABLE(acpi, sc89890_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) static struct i2c_driver sc89890_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) .name = "sc89890-charger",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) .of_match_table = of_match_ptr(sc89890_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) .acpi_match_table = ACPI_PTR(sc89890_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) .pm = &sc89890_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) .probe = sc89890_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) .remove = sc89890_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) .id_table = sc89890_i2c_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) module_i2c_driver(sc89890_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) MODULE_AUTHOR("xsf<xsf@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) MODULE_DESCRIPTION("sc89890 charger driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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