^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // max17040_battery.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // fuel-gauge systems for lithium-ion (Li+) batteries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright (C) 2009 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Minkyu Kang <mk7.kang@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/power_supply.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/max17040_battery.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MAX17040_VCELL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MAX17040_SOC 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MAX17040_MODE 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MAX17040_VER 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MAX17040_CONFIG 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define MAX17040_STATUS 0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define MAX17040_CMD 0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define MAX17040_DELAY 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define MAX17040_BATTERY_FULL 95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define MAX17040_RCOMP_DEFAULT 0x9700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define MAX17040_ATHD_MASK 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define MAX17040_ALSC_MASK 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define MAX17040_ATHD_DEFAULT_POWER_UP 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MAX17040_STATUS_HD_MASK 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MAX17040_STATUS_SC_MASK 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MAX17040_CFG_RCOMP_MASK 0xff00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) enum chip_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ID_MAX17040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ID_MAX17041,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ID_MAX17043,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ID_MAX17044,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ID_MAX17048,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ID_MAX17049,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ID_MAX17058,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ID_MAX17059,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* values that differ by chip_id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct chip_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u16 reset_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u16 vcell_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u16 vcell_mul;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u16 vcell_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u8 has_low_soc_alert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u8 rcomp_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u8 has_soc_alert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static struct chip_data max17040_family[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) [ID_MAX17040] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .reset_val = 0x0054,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .vcell_shift = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .vcell_mul = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .vcell_div = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .has_low_soc_alert = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .rcomp_bytes = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .has_soc_alert = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) [ID_MAX17041] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .reset_val = 0x0054,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .vcell_shift = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .vcell_mul = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .vcell_div = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .has_low_soc_alert = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .rcomp_bytes = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .has_soc_alert = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) [ID_MAX17043] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .reset_val = 0x0054,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .vcell_shift = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .vcell_mul = 1250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .vcell_div = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .has_low_soc_alert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .rcomp_bytes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .has_soc_alert = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) [ID_MAX17044] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .reset_val = 0x0054,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .vcell_shift = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .vcell_mul = 2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .vcell_div = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .has_low_soc_alert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .rcomp_bytes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .has_soc_alert = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) [ID_MAX17048] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .reset_val = 0x5400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .vcell_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .vcell_mul = 625,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .vcell_div = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .has_low_soc_alert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .rcomp_bytes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .has_soc_alert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) [ID_MAX17049] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .reset_val = 0x5400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .vcell_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .vcell_mul = 625,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .vcell_div = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .has_low_soc_alert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .rcomp_bytes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .has_soc_alert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) [ID_MAX17058] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .reset_val = 0x5400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .vcell_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .vcell_mul = 625,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .vcell_div = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .has_low_soc_alert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .rcomp_bytes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .has_soc_alert = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) [ID_MAX17059] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .reset_val = 0x5400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .vcell_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .vcell_mul = 625,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .vcell_div = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .has_low_soc_alert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .rcomp_bytes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .has_soc_alert = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct max17040_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct delayed_work work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct power_supply *battery;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct max17040_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct chip_data data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* battery capacity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* State Of Charge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* Low alert threshold from 32% to 1% of the State of Charge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) u32 low_soc_alert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* some devices return twice the capacity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) bool quirk_double_soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* higher 8 bits for 17043+, 16 bits for 17040,41 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) u16 rcomp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static int max17040_reset(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return regmap_write(chip->regmap, MAX17040_CMD, chip->data.reset_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static int max17040_set_low_soc_alert(struct max17040_chip *chip, u32 level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) level = 32 - level * (chip->quirk_double_soc ? 2 : 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return regmap_update_bits(chip->regmap, MAX17040_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MAX17040_ATHD_MASK, level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static int max17040_set_soc_alert(struct max17040_chip *chip, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return regmap_update_bits(chip->regmap, MAX17040_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MAX17040_ALSC_MASK, enable ? MAX17040_ALSC_MASK : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int max17040_set_rcomp(struct max17040_chip *chip, u16 rcomp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) u16 mask = chip->data.rcomp_bytes == 2 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 0xffff : MAX17040_CFG_RCOMP_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return regmap_update_bits(chip->regmap, MAX17040_CONFIG, mask, rcomp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int max17040_raw_vcell_to_uvolts(struct max17040_chip *chip, u16 vcell)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct chip_data *d = &chip->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return (vcell >> d->vcell_shift) * d->vcell_mul / d->vcell_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int max17040_get_vcell(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) u32 vcell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) regmap_read(chip->regmap, MAX17040_VCELL, &vcell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return max17040_raw_vcell_to_uvolts(chip, vcell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static int max17040_get_soc(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) u32 soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) regmap_read(chip->regmap, MAX17040_SOC, &soc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return soc >> (chip->quirk_double_soc ? 9 : 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static int max17040_get_version(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u32 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = regmap_read(chip->regmap, MAX17040_VER, &version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret ? ret : version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static int max17040_get_online(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return chip->pdata && chip->pdata->battery_online ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) chip->pdata->battery_online() : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static int max17040_get_status(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (!chip->pdata || !chip->pdata->charger_online
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) || !chip->pdata->charger_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return POWER_SUPPLY_STATUS_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (max17040_get_soc(chip) > MAX17040_BATTERY_FULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return POWER_SUPPLY_STATUS_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (chip->pdata->charger_online())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (chip->pdata->charger_enable())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return POWER_SUPPLY_STATUS_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return POWER_SUPPLY_STATUS_NOT_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return POWER_SUPPLY_STATUS_DISCHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int max17040_get_of_data(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct device *dev = &chip->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct chip_data *data = &max17040_family[
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) (uintptr_t) of_device_get_match_data(dev)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) int rcomp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) u8 rcomp[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) chip->quirk_double_soc = device_property_read_bool(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) "maxim,double-soc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) chip->low_soc_alert = MAX17040_ATHD_DEFAULT_POWER_UP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) device_property_read_u32(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) "maxim,alert-low-soc-level",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) &chip->low_soc_alert);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (chip->low_soc_alert <= 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) chip->low_soc_alert > (chip->quirk_double_soc ? 16 : 32)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) dev_err(dev, "maxim,alert-low-soc-level out of bounds\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) rcomp_len = device_property_count_u8(dev, "maxim,rcomp");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) chip->rcomp = MAX17040_RCOMP_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (rcomp_len == data->rcomp_bytes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) device_property_read_u8_array(dev, "maxim,rcomp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) rcomp, rcomp_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) chip->rcomp = rcomp_len == 2 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) rcomp[0] << 8 | rcomp[1] :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) rcomp[0] << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) } else if (rcomp_len > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) dev_err(dev, "maxim,rcomp has incorrect length\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static void max17040_check_changes(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) chip->soc = max17040_get_soc(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) chip->status = max17040_get_status(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static void max17040_queue_work(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) queue_delayed_work(system_power_efficient_wq, &chip->work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) MAX17040_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static void max17040_stop_work(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct max17040_chip *chip = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) cancel_delayed_work_sync(&chip->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static void max17040_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct max17040_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) int last_soc, last_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) chip = container_of(work, struct max17040_chip, work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* store SOC and status to check changes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) last_soc = chip->soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) last_status = chip->status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) max17040_check_changes(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* check changes and send uevent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (last_soc != chip->soc || last_status != chip->status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) power_supply_changed(chip->battery);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) max17040_queue_work(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* Returns true if alert cause was SOC change, not low SOC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static bool max17040_handle_soc_alert(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) bool ret = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) regmap_read(chip->regmap, MAX17040_STATUS, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (data & MAX17040_STATUS_HD_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) // this alert was caused by low soc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ret = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (data & MAX17040_STATUS_SC_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) // soc change bit -- deassert to mark as handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) regmap_write(chip->regmap, MAX17040_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) data & ~MAX17040_STATUS_SC_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static irqreturn_t max17040_thread_handler(int id, void *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) struct max17040_chip *chip = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (!(chip->data.has_soc_alert && max17040_handle_soc_alert(chip)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) dev_warn(&chip->client->dev, "IRQ: Alert battery low level\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /* read registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) max17040_check_changes(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /* send uevent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) power_supply_changed(chip->battery);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* reset alert bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) max17040_set_low_soc_alert(chip, chip->low_soc_alert);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static int max17040_enable_alert_irq(struct max17040_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) struct i2c_client *client = chip->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) ret = devm_request_threaded_irq(&client->dev, client->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) max17040_thread_handler, flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) chip->battery->desc->name, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static int max17040_prop_writeable(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) enum power_supply_property psp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static int max17040_set_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) const union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) struct max17040_chip *chip = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* alert threshold can be programmed from 1% up to 16/32% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if ((val->intval < 1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) (val->intval > (chip->quirk_double_soc ? 16 : 32))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) ret = max17040_set_low_soc_alert(chip, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) chip->low_soc_alert = val->intval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static int max17040_get_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct max17040_chip *chip = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) case POWER_SUPPLY_PROP_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) val->intval = max17040_get_status(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) case POWER_SUPPLY_PROP_ONLINE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) val->intval = max17040_get_online(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) case POWER_SUPPLY_PROP_VOLTAGE_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) val->intval = max17040_get_vcell(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) case POWER_SUPPLY_PROP_CAPACITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) val->intval = max17040_get_soc(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) case POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) val->intval = chip->low_soc_alert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static const struct regmap_config max17040_regmap = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .reg_stride = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .val_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .val_format_endian = REGMAP_ENDIAN_BIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static enum power_supply_property max17040_battery_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) POWER_SUPPLY_PROP_ONLINE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) POWER_SUPPLY_PROP_CAPACITY_ALERT_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static const struct power_supply_desc max17040_battery_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .name = "battery",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .type = POWER_SUPPLY_TYPE_BATTERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .get_property = max17040_get_property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .set_property = max17040_set_property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .property_is_writeable = max17040_prop_writeable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .properties = max17040_battery_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .num_properties = ARRAY_SIZE(max17040_battery_props),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static int max17040_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) struct i2c_adapter *adapter = client->adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) struct power_supply_config psy_cfg = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) struct max17040_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) enum chip_id chip_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) bool enable_irq = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) chip->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) chip->regmap = devm_regmap_init_i2c(client, &max17040_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) chip->pdata = client->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (IS_ERR(chip->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return PTR_ERR(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) chip_id = (enum chip_id) id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if (client->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) ret = max17040_get_of_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) chip_id = (enum chip_id) (uintptr_t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) of_device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) chip->data = max17040_family[chip_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) i2c_set_clientdata(client, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) psy_cfg.drv_data = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) chip->battery = devm_power_supply_register(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) &max17040_battery_desc, &psy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (IS_ERR(chip->battery)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) dev_err(&client->dev, "failed: power supply register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return PTR_ERR(chip->battery);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ret = max17040_get_version(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) dev_dbg(&chip->client->dev, "MAX17040 Fuel-Gauge Ver 0x%x\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (chip_id == ID_MAX17040 || chip_id == ID_MAX17041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) max17040_reset(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) max17040_set_rcomp(chip, chip->rcomp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /* check interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (client->irq && chip->data.has_low_soc_alert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ret = max17040_set_low_soc_alert(chip, chip->low_soc_alert);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) "Failed to set low SOC alert: err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) enable_irq = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (client->irq && chip->data.has_soc_alert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) ret = max17040_set_soc_alert(chip, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) "Failed to set SOC alert: err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) enable_irq = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) /* soc alerts negate the need for polling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) INIT_DEFERRABLE_WORK(&chip->work, max17040_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) ret = devm_add_action(&client->dev, max17040_stop_work, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) max17040_queue_work(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (enable_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) ret = max17040_enable_alert_irq(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) client->irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) dev_warn(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) "Failed to get IRQ err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) static int max17040_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) struct max17040_chip *chip = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (client->irq && chip->data.has_soc_alert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) // disable soc alert to prevent wakeup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) max17040_set_soc_alert(chip, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) cancel_delayed_work(&chip->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (client->irq && device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) enable_irq_wake(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static int max17040_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) struct max17040_chip *chip = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (client->irq && device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) disable_irq_wake(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (client->irq && chip->data.has_soc_alert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) max17040_set_soc_alert(chip, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) max17040_queue_work(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static SIMPLE_DEV_PM_OPS(max17040_pm_ops, max17040_suspend, max17040_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) #define MAX17040_PM_OPS (&max17040_pm_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) #define MAX17040_PM_OPS NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) #endif /* CONFIG_PM_SLEEP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) static const struct i2c_device_id max17040_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) { "max17040", ID_MAX17040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) { "max17041", ID_MAX17041 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) { "max17043", ID_MAX17043 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) { "max77836-battery", ID_MAX17043 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) { "max17044", ID_MAX17044 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) { "max17048", ID_MAX17048 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) { "max17049", ID_MAX17049 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) { "max17058", ID_MAX17058 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) { "max17059", ID_MAX17059 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) MODULE_DEVICE_TABLE(i2c, max17040_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) static const struct of_device_id max17040_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) { .compatible = "maxim,max17040", .data = (void *) ID_MAX17040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) { .compatible = "maxim,max17041", .data = (void *) ID_MAX17041 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) { .compatible = "maxim,max17043", .data = (void *) ID_MAX17043 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) { .compatible = "maxim,max77836-battery", .data = (void *) ID_MAX17043 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) { .compatible = "maxim,max17044", .data = (void *) ID_MAX17044 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) { .compatible = "maxim,max17048", .data = (void *) ID_MAX17048 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) { .compatible = "maxim,max17049", .data = (void *) ID_MAX17049 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) { .compatible = "maxim,max17058", .data = (void *) ID_MAX17058 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) { .compatible = "maxim,max17059", .data = (void *) ID_MAX17059 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) MODULE_DEVICE_TABLE(of, max17040_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static struct i2c_driver max17040_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) .name = "max17040",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) .of_match_table = max17040_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) .pm = MAX17040_PM_OPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .probe = max17040_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .id_table = max17040_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) module_i2c_driver(max17040_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) MODULE_AUTHOR("Minkyu Kang <mk7.kang@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) MODULE_DESCRIPTION("MAX17040 Fuel Gauge");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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