Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * 1-wire client/driver for the Maxim/Dallas DS2780 Stand-Alone Fuel Gauge IC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2010 Indesign, LLC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Author: Clifton Barnes <cabarnes@indesign-llc.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Based on ds2760_battery and ds2782_battery drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/power_supply.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/idr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/w1.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include "../../w1/slaves/w1_ds2780.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) /* Current unit measurement in uA for a 1 milli-ohm sense resistor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define DS2780_CURRENT_UNITS	1563
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* Charge unit measurement in uAh for a 1 milli-ohm sense resistor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define DS2780_CHARGE_UNITS		6250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /* Number of bytes in user EEPROM space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define DS2780_USER_EEPROM_SIZE		(DS2780_EEPROM_BLOCK0_END - \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 					DS2780_EEPROM_BLOCK0_START + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /* Number of bytes in parameter EEPROM space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define DS2780_PARAM_EEPROM_SIZE	(DS2780_EEPROM_BLOCK1_END - \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 					DS2780_EEPROM_BLOCK1_START + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) struct ds2780_device_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	struct power_supply *bat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct power_supply_desc bat_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct device *w1_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) enum current_types {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	CURRENT_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static const char model[] = "DS2780";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static const char manufacturer[] = "Maxim/Dallas";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static inline struct ds2780_device_info *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) to_ds2780_device_info(struct power_supply *psy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	return power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) static inline int ds2780_battery_io(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	char *buf, int addr, size_t count, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	return w1_ds2780_io(dev_info->w1_dev, buf, addr, count, io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static inline int ds2780_read8(struct ds2780_device_info *dev_info, u8 *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	int addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	return ds2780_battery_io(dev_info, val, addr, sizeof(u8), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static int ds2780_read16(struct ds2780_device_info *dev_info, s16 *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	int addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u8 raw[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	ret = ds2780_battery_io(dev_info, raw, addr, sizeof(raw), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	*val = (raw[0] << 8) | raw[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) static inline int ds2780_read_block(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	u8 *val, int addr, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	return ds2780_battery_io(dev_info, val, addr, count, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static inline int ds2780_write(struct ds2780_device_info *dev_info, u8 *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	int addr, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	return ds2780_battery_io(dev_info, val, addr, count, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static inline int ds2780_store_eeprom(struct device *dev, int addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	return w1_ds2780_eeprom_cmd(dev, addr, W1_DS2780_COPY_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static inline int ds2780_recall_eeprom(struct device *dev, int addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	return w1_ds2780_eeprom_cmd(dev, addr, W1_DS2780_RECALL_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int ds2780_save_eeprom(struct ds2780_device_info *dev_info, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	ret = ds2780_store_eeprom(dev_info->w1_dev, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	ret = ds2780_recall_eeprom(dev_info->w1_dev, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* Set sense resistor value in mhos */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static int ds2780_set_sense_register(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	u8 conductance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	ret = ds2780_write(dev_info, &conductance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 				DS2780_RSNSP_REG, sizeof(u8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	return ds2780_save_eeprom(dev_info, DS2780_RSNSP_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* Get RSGAIN value from 0 to 1.999 in steps of 0.001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int ds2780_get_rsgain_register(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	u16 *rsgain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	return ds2780_read16(dev_info, rsgain, DS2780_RSGAIN_MSB_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* Set RSGAIN value from 0 to 1.999 in steps of 0.001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int ds2780_set_rsgain_register(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	u16 rsgain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	u8 raw[] = {rsgain >> 8, rsgain & 0xFF};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	ret = ds2780_write(dev_info, raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 				DS2780_RSGAIN_MSB_REG, sizeof(raw));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	return ds2780_save_eeprom(dev_info, DS2780_RSGAIN_MSB_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int ds2780_get_voltage(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	int *voltage_uV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	s16 voltage_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	 * The voltage value is located in 10 bits across the voltage MSB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	 * and LSB registers in two's complement form
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	 * Sign bit of the voltage value is in bit 7 of the voltage MSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	 * Bits 9 - 3 of the voltage value are in bits 6 - 0 of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	 * voltage MSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	 * Bits 2 - 0 of the voltage value are in bits 7 - 5 of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	 * voltage LSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	ret = ds2780_read16(dev_info, &voltage_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 				DS2780_VOLT_MSB_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	 * DS2780 reports voltage in units of 4.88mV, but the battery class
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	 * reports in units of uV, so convert by multiplying by 4880.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	*voltage_uV = (voltage_raw / 32) * 4880;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static int ds2780_get_temperature(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	int *temperature)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	s16 temperature_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	 * The temperature value is located in 10 bits across the temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	 * MSB and LSB registers in two's complement form
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	 * Sign bit of the temperature value is in bit 7 of the temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	 * MSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	 * Bits 9 - 3 of the temperature value are in bits 6 - 0 of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	 * temperature MSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	 * Bits 2 - 0 of the temperature value are in bits 7 - 5 of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	 * temperature LSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	ret = ds2780_read16(dev_info, &temperature_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 				DS2780_TEMP_MSB_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	 * Temperature is measured in units of 0.125 degrees celcius, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	 * power_supply class measures temperature in tenths of degrees
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	 * celsius. The temperature value is stored as a 10 bit number, plus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	 * sign in the upper bits of a 16 bit register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	*temperature = ((temperature_raw / 32) * 125) / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int ds2780_get_current(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	enum current_types type, int *current_uA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	int ret, sense_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	s16 current_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	u8 sense_res_raw, reg_msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	 * The units of measurement for current are dependent on the value of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	 * the sense resistor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ret = ds2780_read8(dev_info, &sense_res_raw, DS2780_RSNSP_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (sense_res_raw == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		dev_err(dev_info->dev, "sense resistor value is 0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	sense_res = 1000 / sense_res_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	if (type == CURRENT_NOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		reg_msb = DS2780_CURRENT_MSB_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	else if (type == CURRENT_AVG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		reg_msb = DS2780_IAVG_MSB_REG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	 * The current value is located in 16 bits across the current MSB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	 * and LSB registers in two's complement form
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	 * Sign bit of the current value is in bit 7 of the current MSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	 * Bits 14 - 8 of the current value are in bits 6 - 0 of the current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	 * MSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	 * Bits 7 - 0 of the current value are in bits 7 - 0 of the current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	 * LSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	ret = ds2780_read16(dev_info, &current_raw, reg_msb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	*current_uA = current_raw * (DS2780_CURRENT_UNITS / sense_res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int ds2780_get_accumulated_current(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	int *accumulated_current)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	int ret, sense_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	s16 current_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	u8 sense_res_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	 * The units of measurement for accumulated current are dependent on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	 * the value of the sense resistor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	ret = ds2780_read8(dev_info, &sense_res_raw, DS2780_RSNSP_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	if (sense_res_raw == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		dev_err(dev_info->dev, "sense resistor value is 0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	sense_res = 1000 / sense_res_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	 * The ACR value is located in 16 bits across the ACR MSB and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	 * LSB registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	 * Bits 15 - 8 of the ACR value are in bits 7 - 0 of the ACR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	 * MSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	 * Bits 7 - 0 of the ACR value are in bits 7 - 0 of the ACR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	 * LSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	ret = ds2780_read16(dev_info, &current_raw, DS2780_ACR_MSB_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	*accumulated_current = current_raw * (DS2780_CHARGE_UNITS / sense_res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static int ds2780_get_capacity(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	int *capacity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	u8 raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	ret = ds2780_read8(dev_info, &raw, DS2780_RARC_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	*capacity = raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	return raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static int ds2780_get_status(struct ds2780_device_info *dev_info, int *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	int ret, current_uA, capacity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	ret = ds2780_get_current(dev_info, CURRENT_NOW, &current_uA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	ret = ds2780_get_capacity(dev_info, &capacity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	if (capacity == 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		*status = POWER_SUPPLY_STATUS_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	else if (current_uA == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		*status = POWER_SUPPLY_STATUS_NOT_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	else if (current_uA < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		*status = POWER_SUPPLY_STATUS_DISCHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		*status = POWER_SUPPLY_STATUS_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int ds2780_get_charge_now(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	int *charge_now)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	u16 charge_raw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	 * The RAAC value is located in 16 bits across the RAAC MSB and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	 * LSB registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	 * Bits 15 - 8 of the RAAC value are in bits 7 - 0 of the RAAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	 * MSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	 * Bits 7 - 0 of the RAAC value are in bits 7 - 0 of the RAAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	 * LSB register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	ret = ds2780_read16(dev_info, &charge_raw, DS2780_RAAC_MSB_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	*charge_now = charge_raw * 1600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static int ds2780_get_control_register(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	u8 *control_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	return ds2780_read8(dev_info, control_reg, DS2780_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static int ds2780_set_control_register(struct ds2780_device_info *dev_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	u8 control_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	ret = ds2780_write(dev_info, &control_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 				DS2780_CONTROL_REG, sizeof(u8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	return ds2780_save_eeprom(dev_info, DS2780_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static int ds2780_battery_get_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		ret = ds2780_get_voltage(dev_info, &val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	case POWER_SUPPLY_PROP_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		ret = ds2780_get_temperature(dev_info, &val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	case POWER_SUPPLY_PROP_MODEL_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 		val->strval = model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	case POWER_SUPPLY_PROP_MANUFACTURER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		val->strval = manufacturer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	case POWER_SUPPLY_PROP_CURRENT_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 		ret = ds2780_get_current(dev_info, CURRENT_NOW, &val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	case POWER_SUPPLY_PROP_CURRENT_AVG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		ret = ds2780_get_current(dev_info, CURRENT_AVG, &val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	case POWER_SUPPLY_PROP_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		ret = ds2780_get_status(dev_info, &val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	case POWER_SUPPLY_PROP_CAPACITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 		ret = ds2780_get_capacity(dev_info, &val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	case POWER_SUPPLY_PROP_CHARGE_COUNTER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 		ret = ds2780_get_accumulated_current(dev_info, &val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	case POWER_SUPPLY_PROP_CHARGE_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 		ret = ds2780_get_charge_now(dev_info, &val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static enum power_supply_property ds2780_battery_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	POWER_SUPPLY_PROP_MODEL_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	POWER_SUPPLY_PROP_CURRENT_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	POWER_SUPPLY_PROP_CHARGE_COUNTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static ssize_t ds2780_get_pmod_enabled(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	u8 control_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	/* Get power mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	ret = ds2780_get_control_register(dev_info, &control_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		 !!(control_reg & DS2780_CONTROL_REG_PMOD));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) static ssize_t ds2780_set_pmod_enabled(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	u8 control_reg, new_setting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	/* Set power mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	ret = ds2780_get_control_register(dev_info, &control_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	ret = kstrtou8(buf, 0, &new_setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	if ((new_setting != 0) && (new_setting != 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 		dev_err(dev_info->dev, "Invalid pmod setting (0 or 1)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	if (new_setting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 		control_reg |= DS2780_CONTROL_REG_PMOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		control_reg &= ~DS2780_CONTROL_REG_PMOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	ret = ds2780_set_control_register(dev_info, control_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static ssize_t ds2780_get_sense_resistor_value(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	u8 sense_resistor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 	ret = ds2780_read8(dev_info, &sense_resistor, DS2780_RSNSP_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	ret = sprintf(buf, "%d\n", sense_resistor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static ssize_t ds2780_set_sense_resistor_value(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	u8 new_setting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	ret = kstrtou8(buf, 0, &new_setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	ret = ds2780_set_sense_register(dev_info, new_setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static ssize_t ds2780_get_rsgain_setting(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	u16 rsgain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	ret = ds2780_get_rsgain_register(dev_info, &rsgain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 	return sprintf(buf, "%d\n", rsgain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static ssize_t ds2780_set_rsgain_setting(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	u16 new_setting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	ret = kstrtou16(buf, 0, &new_setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	/* Gain can only be from 0 to 1.999 in steps of .001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 	if (new_setting > 1999) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 		dev_err(dev_info->dev, "Invalid rsgain setting (0 - 1999)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	ret = ds2780_set_rsgain_register(dev_info, new_setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) static ssize_t ds2780_get_pio_pin(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 	char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	u8 sfr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	ret = ds2780_read8(dev_info, &sfr, DS2780_SFR_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 	ret = sprintf(buf, "%d\n", sfr & DS2780_SFR_REG_PIOSC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) static ssize_t ds2780_set_pio_pin(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 	const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 	u8 new_setting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 	ret = kstrtou8(buf, 0, &new_setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 	if ((new_setting != 0) && (new_setting != 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 		dev_err(dev_info->dev, "Invalid pio_pin setting (0 or 1)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 	ret = ds2780_write(dev_info, &new_setting,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 				DS2780_SFR_REG, sizeof(u8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) static ssize_t ds2780_read_param_eeprom_bin(struct file *filp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 				struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 				struct bin_attribute *bin_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 				char *buf, loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 	struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 	return ds2780_read_block(dev_info, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 				DS2780_EEPROM_BLOCK1_START + off, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static ssize_t ds2780_write_param_eeprom_bin(struct file *filp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 				struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 				struct bin_attribute *bin_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 				char *buf, loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 	struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) 	ret = ds2780_write(dev_info, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 				DS2780_EEPROM_BLOCK1_START + off, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 	ret = ds2780_save_eeprom(dev_info, DS2780_EEPROM_BLOCK1_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static struct bin_attribute ds2780_param_eeprom_bin_attr = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 	.attr = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 		.name = "param_eeprom",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 		.mode = S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 	.size = DS2780_PARAM_EEPROM_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 	.read = ds2780_read_param_eeprom_bin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 	.write = ds2780_write_param_eeprom_bin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static ssize_t ds2780_read_user_eeprom_bin(struct file *filp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 				struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 				struct bin_attribute *bin_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 				char *buf, loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 	struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 	return ds2780_read_block(dev_info, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 				DS2780_EEPROM_BLOCK0_START + off, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static ssize_t ds2780_write_user_eeprom_bin(struct file *filp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 				struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) 				struct bin_attribute *bin_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 				char *buf, loff_t off, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 	struct device *dev = container_of(kobj, struct device, kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 	struct power_supply *psy = to_power_supply(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	struct ds2780_device_info *dev_info = to_ds2780_device_info(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) 	ret = ds2780_write(dev_info, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 				DS2780_EEPROM_BLOCK0_START + off, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 	ret = ds2780_save_eeprom(dev_info, DS2780_EEPROM_BLOCK0_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) static struct bin_attribute ds2780_user_eeprom_bin_attr = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 	.attr = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 		.name = "user_eeprom",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 		.mode = S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 	.size = DS2780_USER_EEPROM_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 	.read = ds2780_read_user_eeprom_bin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 	.write = ds2780_write_user_eeprom_bin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static DEVICE_ATTR(pmod_enabled, S_IRUGO | S_IWUSR, ds2780_get_pmod_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 	ds2780_set_pmod_enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static DEVICE_ATTR(sense_resistor_value, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) 	ds2780_get_sense_resistor_value, ds2780_set_sense_resistor_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static DEVICE_ATTR(rsgain_setting, S_IRUGO | S_IWUSR, ds2780_get_rsgain_setting,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 	ds2780_set_rsgain_setting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) static DEVICE_ATTR(pio_pin, S_IRUGO | S_IWUSR, ds2780_get_pio_pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 	ds2780_set_pio_pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) static struct attribute *ds2780_sysfs_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 	&dev_attr_pmod_enabled.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 	&dev_attr_sense_resistor_value.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 	&dev_attr_rsgain_setting.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) 	&dev_attr_pio_pin.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) static struct bin_attribute *ds2780_sysfs_bin_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) 	&ds2780_param_eeprom_bin_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 	&ds2780_user_eeprom_bin_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const struct attribute_group ds2780_sysfs_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 	.attrs = ds2780_sysfs_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 	.bin_attrs = ds2780_sysfs_bin_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) static const struct attribute_group *ds2780_sysfs_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 	&ds2780_sysfs_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static int ds2780_battery_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) 	struct power_supply_config psy_cfg = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) 	struct ds2780_device_info *dev_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) 	dev_info = devm_kzalloc(&pdev->dev, sizeof(*dev_info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) 	if (!dev_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) 	platform_set_drvdata(pdev, dev_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) 	dev_info->dev			= &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 	dev_info->w1_dev		= pdev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) 	dev_info->bat_desc.name		= dev_name(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) 	dev_info->bat_desc.type		= POWER_SUPPLY_TYPE_BATTERY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 	dev_info->bat_desc.properties	= ds2780_battery_props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) 	dev_info->bat_desc.num_properties = ARRAY_SIZE(ds2780_battery_props);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 	dev_info->bat_desc.get_property	= ds2780_battery_get_property;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 	psy_cfg.drv_data		= dev_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) 	psy_cfg.attr_grp		= ds2780_sysfs_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) 	dev_info->bat = devm_power_supply_register(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) 						   &dev_info->bat_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) 						   &psy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) 	if (IS_ERR(dev_info->bat)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) 		dev_err(dev_info->dev, "failed to register battery\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) 		return PTR_ERR(dev_info->bat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) static struct platform_driver ds2780_battery_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) 		.name = "ds2780-battery",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) 	.probe	  = ds2780_battery_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) module_platform_driver(ds2780_battery_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) MODULE_AUTHOR("Clifton Barnes <cabarnes@indesign-llc.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) MODULE_DESCRIPTION("Maxim/Dallas DS2780 Stand-Alone Fuel Gauge IC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) MODULE_ALIAS("platform:ds2780-battery");