^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * BQ27xxx battery driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2011 Pali Rohár <pali@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Datasheets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * https://www.ti.com/product/bq27000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * https://www.ti.com/product/bq27200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * https://www.ti.com/product/bq27010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * https://www.ti.com/product/bq27210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * https://www.ti.com/product/bq27500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * https://www.ti.com/product/bq27510-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * https://www.ti.com/product/bq27510-g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * https://www.ti.com/product/bq27510-g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * https://www.ti.com/product/bq27520-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * https://www.ti.com/product/bq27520-g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * https://www.ti.com/product/bq27520-g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * https://www.ti.com/product/bq27520-g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * https://www.ti.com/product/bq27530-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * https://www.ti.com/product/bq27531-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * https://www.ti.com/product/bq27541-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * https://www.ti.com/product/bq27542-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * https://www.ti.com/product/bq27546-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * https://www.ti.com/product/bq27742-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * https://www.ti.com/product/bq27545-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * https://www.ti.com/product/bq27421-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * https://www.ti.com/product/bq27425-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * https://www.ti.com/product/bq27426
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * https://www.ti.com/product/bq27411-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * https://www.ti.com/product/bq27441-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * https://www.ti.com/product/bq27621-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * https://www.ti.com/product/bq27z561
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * https://www.ti.com/product/bq28z610
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * https://www.ti.com/product/bq34z100-g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/power_supply.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <linux/power/bq27xxx_battery.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define BQ27XXX_MANUFACTURER "Texas Instruments"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* BQ27XXX Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define BQ27XXX_FLAG_DSC BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define BQ27XXX_FLAG_CFGUP BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define BQ27XXX_FLAG_FC BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define BQ27XXX_FLAG_OTD BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define BQ27XXX_FLAG_OTC BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define BQ27XXX_FLAG_UT BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define BQ27XXX_FLAG_OT BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* BQ27000 has different layout for Flags register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define BQ27000_FLAG_FC BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* BQ27Z561 has different layout for Flags register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define BQ27Z561_FLAG_FDC BIT(4) /* Battery fully discharged */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define BQ27Z561_FLAG_FC BIT(5) /* Battery fully charged */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define BQ27Z561_FLAG_DIS_CH BIT(6) /* Battery is discharging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* control register params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define BQ27XXX_SEALED 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define BQ27XXX_SET_CFGUPDATE 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define BQ27XXX_SOFT_RESET 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define BQ27XXX_RESET 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define BQ27XXX_RS (20) /* Resistor sense mOhm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define INVALID_REG_ADDR 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * bq27xxx_reg_index - Register names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * These are indexes into a device's register mapping array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) enum bq27xxx_reg_index {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) BQ27XXX_REG_CTRL = 0, /* Control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) BQ27XXX_REG_TEMP, /* Temperature */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) BQ27XXX_REG_INT_TEMP, /* Internal Temperature */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) BQ27XXX_REG_VOLT, /* Voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) BQ27XXX_REG_AI, /* Average Current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) BQ27XXX_REG_FLAGS, /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) BQ27XXX_REG_TTE, /* Time-to-Empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) BQ27XXX_REG_TTF, /* Time-to-Full */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) BQ27XXX_REG_TTES, /* Time-to-Empty Standby */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) BQ27XXX_REG_NAC, /* Nominal Available Capacity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) BQ27XXX_REG_FCC, /* Full Charge Capacity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) BQ27XXX_REG_CYCT, /* Cycle Count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) BQ27XXX_REG_AE, /* Available Energy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) BQ27XXX_REG_SOC, /* State-of-Charge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) BQ27XXX_REG_DCAP, /* Design Capacity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) BQ27XXX_REG_AP, /* Average Power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) BQ27XXX_DM_CTRL, /* Block Data Control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) BQ27XXX_DM_CLASS, /* Data Class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) BQ27XXX_DM_BLOCK, /* Data Block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) BQ27XXX_DM_DATA, /* Block Data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) BQ27XXX_DM_CKSUM, /* Block Data Checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) BQ27XXX_REG_MAX, /* sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define BQ27XXX_DM_REG_ROWS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) [BQ27XXX_DM_CTRL] = 0x61, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) [BQ27XXX_DM_CLASS] = 0x3e, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) [BQ27XXX_DM_BLOCK] = 0x3f, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) [BQ27XXX_DM_DATA] = 0x40, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) [BQ27XXX_DM_CKSUM] = 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Register mappings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static u8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) bq27000_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) [BQ27XXX_REG_TTF] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) [BQ27XXX_REG_TTES] = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) [BQ27XXX_REG_TTECP] = 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) [BQ27XXX_REG_AE] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) [BQ27XXX_REG_SOC] = 0x0b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) [BQ27XXX_REG_DCAP] = 0x76,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) [BQ27XXX_REG_AP] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) bq27010_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) [BQ27XXX_REG_TTF] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) [BQ27XXX_REG_TTES] = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) [BQ27XXX_REG_TTECP] = 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) [BQ27XXX_REG_SOC] = 0x0b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) [BQ27XXX_REG_DCAP] = 0x76,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) bq2750x_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) [BQ27XXX_REG_INT_TEMP] = 0x28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) [BQ27XXX_REG_TTES] = 0x1a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define bq2751x_regs bq27510g3_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define bq2752x_regs bq27510g3_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) bq27500_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) [BQ27XXX_REG_TTF] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) [BQ27XXX_REG_TTES] = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) [BQ27XXX_REG_TTECP] = 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) [BQ27XXX_REG_AE] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) [BQ27XXX_REG_AP] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define bq27510g1_regs bq27500_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define bq27510g2_regs bq27500_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) bq27510g3_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) [BQ27XXX_REG_INT_TEMP] = 0x28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) [BQ27XXX_REG_TTES] = 0x1a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) [BQ27XXX_REG_CYCT] = 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) [BQ27XXX_REG_SOC] = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) [BQ27XXX_REG_DCAP] = 0x2e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) bq27520g1_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) [BQ27XXX_REG_TTF] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) [BQ27XXX_REG_TTES] = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) [BQ27XXX_REG_TTECP] = 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) [BQ27XXX_REG_AE] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) [BQ27XXX_REG_AP] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) bq27520g2_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) [BQ27XXX_REG_INT_TEMP] = 0x36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) [BQ27XXX_REG_TTF] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) [BQ27XXX_REG_TTES] = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) [BQ27XXX_REG_TTECP] = 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) [BQ27XXX_REG_AE] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) [BQ27XXX_REG_AP] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) bq27520g3_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) [BQ27XXX_REG_INT_TEMP] = 0x36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) [BQ27XXX_REG_TTES] = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) [BQ27XXX_REG_TTECP] = 0x26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) [BQ27XXX_REG_AE] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) [BQ27XXX_REG_AP] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) bq27520g4_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) [BQ27XXX_REG_INT_TEMP] = 0x28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) [BQ27XXX_REG_TTES] = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) [BQ27XXX_REG_CYCT] = 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) [BQ27XXX_REG_SOC] = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) bq27521_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) [BQ27XXX_REG_CTRL] = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) [BQ27XXX_REG_TEMP] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) [BQ27XXX_REG_VOLT] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) [BQ27XXX_REG_AI] = 0x0e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) [BQ27XXX_REG_FLAGS] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) bq27530_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) [BQ27XXX_REG_INT_TEMP] = 0x32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) [BQ27XXX_REG_AP] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #define bq27531_regs bq27530_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) bq27541_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) [BQ27XXX_REG_INT_TEMP] = 0x28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) [BQ27XXX_REG_AP] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) #define bq27542_regs bq27541_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #define bq27546_regs bq27541_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define bq27742_regs bq27541_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) bq27545_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) [BQ27XXX_REG_INT_TEMP] = 0x28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) [BQ27XXX_REG_NAC] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) [BQ27XXX_REG_AP] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) bq27421_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) [BQ27XXX_REG_TEMP] = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) [BQ27XXX_REG_INT_TEMP] = 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) [BQ27XXX_REG_VOLT] = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) [BQ27XXX_REG_AI] = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) [BQ27XXX_REG_FLAGS] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) [BQ27XXX_REG_NAC] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) [BQ27XXX_REG_FCC] = 0x0e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) [BQ27XXX_REG_SOC] = 0x1c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) [BQ27XXX_REG_AP] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #define bq27411_regs bq27421_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #define bq27425_regs bq27421_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #define bq27426_regs bq27421_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #define bq27441_regs bq27421_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) #define bq27621_regs bq27421_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) bq27z561_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) [BQ27XXX_REG_TTF] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) [BQ27XXX_REG_AE] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) [BQ27XXX_REG_AP] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) bq28z610_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) [BQ27XXX_REG_TEMP] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) [BQ27XXX_REG_AI] = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) [BQ27XXX_REG_FLAGS] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) [BQ27XXX_REG_TTE] = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) [BQ27XXX_REG_TTF] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) [BQ27XXX_REG_FCC] = 0x12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) [BQ27XXX_REG_CYCT] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) [BQ27XXX_REG_AE] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) [BQ27XXX_REG_SOC] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) [BQ27XXX_REG_AP] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) bq34z100_regs[BQ27XXX_REG_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) [BQ27XXX_REG_CTRL] = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) [BQ27XXX_REG_TEMP] = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) [BQ27XXX_REG_INT_TEMP] = 0x2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) [BQ27XXX_REG_VOLT] = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) [BQ27XXX_REG_AI] = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) [BQ27XXX_REG_FLAGS] = 0x0e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) [BQ27XXX_REG_TTE] = 0x18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) [BQ27XXX_REG_TTF] = 0x1a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) [BQ27XXX_REG_TTES] = 0x1e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) [BQ27XXX_REG_FCC] = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) [BQ27XXX_REG_CYCT] = 0x2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) [BQ27XXX_REG_AE] = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) [BQ27XXX_REG_SOC] = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) [BQ27XXX_REG_DCAP] = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) [BQ27XXX_REG_AP] = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) BQ27XXX_DM_REG_ROWS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static enum power_supply_property bq27000_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) POWER_SUPPLY_PROP_ENERGY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static enum power_supply_property bq27010_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) #define bq2750x_props bq27510g3_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) #define bq2751x_props bq27510g3_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) #define bq2752x_props bq27510g3_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static enum power_supply_property bq27500_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) POWER_SUPPLY_PROP_ENERGY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) #define bq27510g1_props bq27500_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #define bq27510g2_props bq27500_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static enum power_supply_property bq27510g3_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) static enum power_supply_property bq27520g1_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) POWER_SUPPLY_PROP_ENERGY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) #define bq27520g2_props bq27500_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static enum power_supply_property bq27520g3_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) POWER_SUPPLY_PROP_ENERGY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static enum power_supply_property bq27520g4_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static enum power_supply_property bq27521_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static enum power_supply_property bq27530_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) #define bq27531_props bq27530_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) static enum power_supply_property bq27541_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) #define bq27542_props bq27541_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) #define bq27546_props bq27541_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) #define bq27742_props bq27541_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) static enum power_supply_property bq27545_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static enum power_supply_property bq27421_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) POWER_SUPPLY_PROP_CHARGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) #define bq27411_props bq27421_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) #define bq27425_props bq27421_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) #define bq27426_props bq27421_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) #define bq27441_props bq27421_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) #define bq27621_props bq27421_props
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) static enum power_supply_property bq27z561_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static enum power_supply_property bq28z610_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) static enum power_supply_property bq34z100_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) POWER_SUPPLY_PROP_VOLTAGE_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) POWER_SUPPLY_PROP_CURRENT_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) POWER_SUPPLY_PROP_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) POWER_SUPPLY_PROP_TEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) POWER_SUPPLY_PROP_TECHNOLOGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) POWER_SUPPLY_PROP_CHARGE_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) POWER_SUPPLY_PROP_CYCLE_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) POWER_SUPPLY_PROP_ENERGY_NOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) POWER_SUPPLY_PROP_POWER_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) POWER_SUPPLY_PROP_HEALTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) POWER_SUPPLY_PROP_MANUFACTURER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) struct bq27xxx_dm_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) u8 subclass_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) u8 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) u8 bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) u16 min, max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) enum bq27xxx_dm_reg_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) BQ27XXX_DM_DESIGN_CAPACITY = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) BQ27XXX_DM_DESIGN_ENERGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) BQ27XXX_DM_TERMINATE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) #define bq27000_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) #define bq27010_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) #define bq2750x_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) #define bq2751x_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) #define bq2752x_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) #if 0 /* not yet tested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) #define bq27500_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) /* todo create data memory definitions from datasheets and test on chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) #define bq27510g1_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) #define bq27510g2_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) #define bq27510g3_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) #define bq27520g1_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) #define bq27520g2_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) #define bq27520g3_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) #define bq27520g4_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) #define bq27521_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) #define bq27530_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) #define bq27531_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) #define bq27541_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) #define bq27542_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) #define bq27546_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) #define bq27742_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) #if 0 /* not yet tested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) #define bq27545_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) #if 0 /* not yet tested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) #define bq27441_dm_regs bq27421_dm_regs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) #define bq27441_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) #if 0 /* not yet tested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) #define bq27621_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) #define bq27z561_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) #define bq28z610_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) #define bq34z100_dm_regs 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) #define BQ27XXX_O_ZERO BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) #define BQ27XXX_O_OTDC BIT(1) /* has OTC/OTD overtemperature flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) #define BQ27XXX_O_UTOT BIT(2) /* has OT overtemperature flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) #define BQ27XXX_O_CFGUP BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) #define BQ27XXX_O_RAM BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) #define BQ27Z561_O_BITS BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) #define BQ27XXX_O_SOC_SI BIT(6) /* SoC is single register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) #define BQ27XXX_O_HAS_CI BIT(7) /* has Capacity Inaccurate flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) #define BQ27XXX_O_MUL_CHEM BIT(8) /* multiple chemistries supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) #define BQ27XXX_DATA(ref, key, opt) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) .opts = (opt), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) .unseal_key = key, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) .regs = ref##_regs, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) .dm_regs = ref##_dm_regs, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) .props = ref##_props, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) .props_size = ARRAY_SIZE(ref##_props) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) u32 opts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) u32 unseal_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) u8 *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) struct bq27xxx_dm_reg *dm_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) enum power_supply_property *props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) size_t props_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) } bq27xxx_chip_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) [BQ34Z100] = BQ27XXX_DATA(bq34z100, 0 , BQ27XXX_O_OTDC | BQ27XXX_O_SOC_SI | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) BQ27XXX_O_HAS_CI | BQ27XXX_O_MUL_CHEM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static DEFINE_MUTEX(bq27xxx_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) static LIST_HEAD(bq27xxx_battery_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) #define BQ27XXX_DM_SZ 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) * struct bq27xxx_dm_buf - chip data memory buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) * @class: data memory subclass_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) * @block: data memory block number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) * @data: data from/for the block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) * @has_data: true if data has been filled by read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) * @dirty: true if data has changed since last read/write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) * Encapsulates info required to manage chip data memory blocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) struct bq27xxx_dm_buf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) u8 class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) u8 block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) u8 data[BQ27XXX_DM_SZ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) bool has_data, dirty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) #define BQ27XXX_DM_BUF(di, i) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) .class = (di)->dm_regs[i].subclass_id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) struct bq27xxx_dm_reg *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) if (buf->class == reg->subclass_id &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) buf->block == reg->offset / BQ27XXX_DM_SZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static const char * const bq27xxx_dm_reg_name[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) static bool bq27xxx_dt_to_nvm = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) "Users must set this =0 when installing a different type of battery!\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) "Default is =1."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) "\nSetting this affects future kernel updates, not the current configuration."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) struct bq27xxx_device_info *di;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) unsigned int prev_val = *(unsigned int *) kp->arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) ret = param_set_uint(val, kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) mutex_lock(&bq27xxx_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) list_for_each_entry(di, &bq27xxx_battery_devices, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) cancel_delayed_work_sync(&di->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) schedule_delayed_work(&di->work, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) mutex_unlock(&bq27xxx_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) static const struct kernel_param_ops param_ops_poll_interval = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) .get = param_get_uint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) .set = poll_interval_param_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) static unsigned int poll_interval = 360;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) MODULE_PARM_DESC(poll_interval,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) "battery poll interval in seconds - 0 disables polling");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * Common code for BQ27xxx devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) bool single)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) ret = di->bus.read(di, di->regs[reg_index], single);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) di->regs[reg_index], reg_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) u16 value, bool single)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) if (!di->bus.write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) ret = di->bus.write(di, di->regs[reg_index], value, single);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) di->regs[reg_index], reg_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) u8 *data, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) if (!di->bus.read_bulk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) di->regs[reg_index], reg_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) u8 *data, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) if (!di->bus.write_bulk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) di->regs[reg_index], reg_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) dev_err(di->dev, "bus error on seal: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) if (di->unseal_key == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) dev_err(di->dev, "unseal failed due to missing key\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) dev_err(di->dev, "bus error on unseal: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) u16 sum = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) for (i = 0; i < BQ27XXX_DM_SZ; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) sum += buf->data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) sum &= 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) return 0xff - sum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) struct bq27xxx_dm_buf *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) buf->has_data = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) BQ27XXX_MSLEEP(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) buf->has_data = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) buf->dirty = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) struct bq27xxx_dm_buf *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) enum bq27xxx_dm_reg_id reg_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) const char *str = bq27xxx_dm_reg_name[reg_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) if (prev == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) if (reg->bytes != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) if (!buf->has_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) if (be16_to_cpup(prev) == val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) dev_info(di->dev, "%s has %u\n", str, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) if (!(di->opts & BQ27XXX_O_RAM)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) /* devicetree and NVM differ; defer to NVM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) dev_warn(di->dev, "%s has %u; update to %u disallowed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) "by dt_monitored_battery_updates_nvm=0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) "for flash/NVM data memory"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) "\n", str, be16_to_cpup(prev), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) dev_info(di->dev, "update %s to %u\n", str, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) *prev = cpu_to_be16(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) buf->dirty = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) const int limit = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) int ret, try = limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) BQ27XXX_MSLEEP(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) if (!try && di->chip != BQ27425) { // 425 has a bug
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) if (limit - try > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) int ret = bq27xxx_battery_cfgupdate_priv(di, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) if (ret < 0 && ret != -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) int ret = bq27xxx_battery_cfgupdate_priv(di, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) if (ret < 0 && ret != -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) struct bq27xxx_dm_buf *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) bool cfgup = di->opts & BQ27XXX_O_CFGUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) if (!buf->dirty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) if (cfgup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) ret = bq27xxx_battery_set_cfgupdate(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) BQ27XXX_MSLEEP(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) bq27xxx_battery_checksum_dm_block(buf), true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) * corruption on the '425 chip (and perhaps others), which can damage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) * the chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) if (cfgup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) BQ27XXX_MSLEEP(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) ret = bq27xxx_battery_soft_reset(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) buf->dirty = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) if (cfgup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) bq27xxx_battery_soft_reset(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) struct power_supply_battery_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) bool updated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) if (bq27xxx_battery_unseal(di) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) if (info->charge_full_design_uah != -EINVAL &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) info->energy_full_design_uwh != -EINVAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) bq27xxx_battery_read_dm_block(di, &bd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) /* assume design energy & capacity are in same block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) bq27xxx_battery_update_dm_block(di, &bd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) BQ27XXX_DM_DESIGN_CAPACITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) info->charge_full_design_uah / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) bq27xxx_battery_update_dm_block(di, &bd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) BQ27XXX_DM_DESIGN_ENERGY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) info->energy_full_design_uwh / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if (info->voltage_min_design_uv != -EINVAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) bool same = bd.class == bt.class && bd.block == bt.block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) if (!same)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) bq27xxx_battery_read_dm_block(di, &bt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) BQ27XXX_DM_TERMINATE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) info->voltage_min_design_uv / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) updated = bd.dirty || bt.dirty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) bq27xxx_battery_write_dm_block(di, &bd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) bq27xxx_battery_write_dm_block(di, &bt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) bq27xxx_battery_seal(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) BQ27XXX_MSLEEP(300); /* reset time is not documented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) /* assume bq27xxx_battery_update() is called hereafter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) struct power_supply_battery_info info = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) unsigned int min, max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) if (power_supply_get_battery_info(di->bat, &info) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) if (!di->dm_regs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) dev_warn(di->dev, "data memory update not supported for chip\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) if (info.energy_full_design_uwh != info.charge_full_design_uah) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) if (info.energy_full_design_uwh == -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) else if (info.charge_full_design_uah == -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) /* assume min == 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) if (info.energy_full_design_uwh > max * 1000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) info.energy_full_design_uwh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) info.energy_full_design_uwh = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) /* assume min == 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) if (info.charge_full_design_uah > max * 1000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) info.charge_full_design_uah);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) info.charge_full_design_uah = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) if ((info.voltage_min_design_uv < min * 1000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) info.voltage_min_design_uv > max * 1000) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) info.voltage_min_design_uv != -EINVAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) info.voltage_min_design_uv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) info.voltage_min_design_uv = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) if ((info.energy_full_design_uwh != -EINVAL &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) info.charge_full_design_uah != -EINVAL) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) info.voltage_min_design_uv != -EINVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) bq27xxx_battery_set_config(di, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) * Return the battery State-of-Charge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) int soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) if (di->opts & BQ27XXX_O_SOC_SI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) if (soc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) dev_dbg(di->dev, "error reading State-of-Charge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) return soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) * Return a battery charge value in µAh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) int charge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) charge = bq27xxx_read(di, reg, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) if (charge < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) dev_dbg(di->dev, "error reading charge register %02x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) reg, charge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) return charge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) if (di->opts & BQ27XXX_O_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) charge *= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) return charge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) * Return the battery Nominal available capacity in µAh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) if (di->opts & BQ27XXX_O_ZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) if (flags >= 0 && (flags & BQ27000_FLAG_CI))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) * Return the battery Full Charge Capacity in µAh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) * Return the Design Capacity in µAh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) int dcap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) if (di->opts & BQ27XXX_O_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) if (dcap < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) dev_dbg(di->dev, "error reading initial last measured discharge\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) return dcap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) if (di->opts & BQ27XXX_O_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) dcap *= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) return dcap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) * Return the battery Available energy in µWh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) int ae;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) if (ae < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) dev_dbg(di->dev, "error reading available energy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) return ae;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) if (di->opts & BQ27XXX_O_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) ae *= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) return ae;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) * Return the battery temperature in tenths of degree Kelvin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) if (temp < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) dev_err(di->dev, "error reading temperature\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) return temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) if (di->opts & BQ27XXX_O_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) temp = 5 * temp / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) return temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) * Return the battery Cycle count total
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) int cyct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) if (cyct < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) dev_err(di->dev, "error reading cycle count total\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) return cyct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) * Read a time register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) * Return < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) int tval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) tval = bq27xxx_read(di, reg, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) if (tval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) dev_dbg(di->dev, "error reading time register %02x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) reg, tval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) return tval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) if (tval == 65535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) return tval * 60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) * Returns true if a battery over temperature condition is detected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) if (di->opts & BQ27XXX_O_OTDC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) if (di->opts & BQ27XXX_O_UTOT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) return flags & BQ27XXX_FLAG_OT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) * Returns true if a battery under temperature condition is detected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) if (di->opts & BQ27XXX_O_UTOT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) return flags & BQ27XXX_FLAG_UT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) * Returns true if a low state of charge condition is detected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) if (di->opts & BQ27XXX_O_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) else if (di->opts & BQ27Z561_O_BITS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) return flags & BQ27Z561_FLAG_FDC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) /* Unlikely but important to return first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) return POWER_SUPPLY_HEALTH_OVERHEAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) return POWER_SUPPLY_HEALTH_COLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) return POWER_SUPPLY_HEALTH_DEAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) return POWER_SUPPLY_HEALTH_GOOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) void bq27xxx_battery_update(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) struct bq27xxx_reg_cache cache = {0, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) bool has_ci_flag = di->opts & BQ27XXX_O_HAS_CI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) if ((cache.flags & 0xff) == 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) cache.flags = -1; /* read error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) if (cache.flags >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) cache.temperature = bq27xxx_battery_read_temperature(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) cache.capacity = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) cache.energy = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) cache.time_to_empty = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) cache.time_to_empty_avg = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) cache.time_to_full = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) cache.charge_full = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) cache.health = -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) cache.charge_full = bq27xxx_battery_read_fcc(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) cache.capacity = bq27xxx_battery_read_soc(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) cache.energy = bq27xxx_battery_read_energy(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) di->cache.flags = cache.flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) cache.health = bq27xxx_battery_read_health(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) cache.cycle_count = bq27xxx_battery_read_cyct(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) /* We only have to read charge design full once */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) if (di->charge_design_full <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) di->charge_design_full = bq27xxx_battery_read_dcap(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) if ((di->cache.capacity != cache.capacity) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) (di->cache.flags != cache.flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) power_supply_changed(di->bat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) di->cache = cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) di->last_update = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) static void bq27xxx_battery_poll(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) struct bq27xxx_device_info *di =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) container_of(work, struct bq27xxx_device_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) bq27xxx_battery_update(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) if (poll_interval > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) schedule_delayed_work(&di->work, poll_interval * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) * Return the battery average current in µA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) * Note that current can be negative signed as well
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) * Or 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) int curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) if (curr < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) dev_err(di->dev, "error reading current\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) return curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) if (di->opts & BQ27XXX_O_ZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) if (flags & BQ27000_FLAG_CHGS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) dev_dbg(di->dev, "negative current!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) curr = -curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) /* Other gauges return signed value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) val->intval = (int)((s16)curr) * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) * Get the average power in µW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) * Return < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) static int bq27xxx_battery_pwr_avg(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) int power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) power = bq27xxx_read(di, BQ27XXX_REG_AP, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) if (power < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) dev_err(di->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) "error reading average power register %02x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) BQ27XXX_REG_AP, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) return power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) if (di->opts & BQ27XXX_O_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) val->intval = (power * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) /* Other gauges return a signed value in units of 10mW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) val->intval = (int)((s16)power) * 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) if (di->opts & BQ27XXX_O_ZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) if (di->cache.flags & BQ27000_FLAG_FC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) status = POWER_SUPPLY_STATUS_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) else if (di->cache.flags & BQ27000_FLAG_CHGS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) status = POWER_SUPPLY_STATUS_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) status = POWER_SUPPLY_STATUS_DISCHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) } else if (di->opts & BQ27Z561_O_BITS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) if (di->cache.flags & BQ27Z561_FLAG_FC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) status = POWER_SUPPLY_STATUS_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) else if (di->cache.flags & BQ27Z561_FLAG_DIS_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) status = POWER_SUPPLY_STATUS_DISCHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) status = POWER_SUPPLY_STATUS_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) if (di->cache.flags & BQ27XXX_FLAG_FC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) status = POWER_SUPPLY_STATUS_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) else if (di->cache.flags & BQ27XXX_FLAG_DSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) status = POWER_SUPPLY_STATUS_DISCHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) status = POWER_SUPPLY_STATUS_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) if ((status == POWER_SUPPLY_STATUS_DISCHARGING) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) (power_supply_am_i_supplied(di->bat) > 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) status = POWER_SUPPLY_STATUS_NOT_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) val->intval = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) int level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) if (di->opts & BQ27XXX_O_ZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) if (di->cache.flags & BQ27000_FLAG_FC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) else if (di->cache.flags & BQ27000_FLAG_EDV1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) else if (di->cache.flags & BQ27000_FLAG_EDVF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) } else if (di->opts & BQ27Z561_O_BITS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) if (di->cache.flags & BQ27Z561_FLAG_FC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) else if (di->cache.flags & BQ27Z561_FLAG_FDC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) if (di->cache.flags & BQ27XXX_FLAG_FC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) val->intval = level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) * Return the battery Voltage in millivolts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) * Or < 0 if something fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) int volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) if (volt < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) dev_err(di->dev, "error reading voltage\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) return volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) val->intval = volt * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) static int bq27xxx_simple_value(int value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) if (value < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) val->intval = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) static int bq27xxx_battery_get_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) mutex_lock(&di->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) cancel_delayed_work_sync(&di->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) bq27xxx_battery_poll(&di->work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) mutex_unlock(&di->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) case POWER_SUPPLY_PROP_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) ret = bq27xxx_battery_status(di, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) case POWER_SUPPLY_PROP_VOLTAGE_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) ret = bq27xxx_battery_voltage(di, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) case POWER_SUPPLY_PROP_PRESENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) val->intval = di->cache.flags < 0 ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) case POWER_SUPPLY_PROP_CURRENT_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) ret = bq27xxx_battery_current(di, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) case POWER_SUPPLY_PROP_CAPACITY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) ret = bq27xxx_simple_value(di->cache.capacity, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) ret = bq27xxx_battery_capacity_level(di, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) case POWER_SUPPLY_PROP_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) ret = bq27xxx_simple_value(di->cache.temperature, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) val->intval -= 2731; /* convert decidegree k to c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) ret = bq27xxx_simple_value(di->cache.time_to_full, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) case POWER_SUPPLY_PROP_TECHNOLOGY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) if (di->opts & BQ27XXX_O_MUL_CHEM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) case POWER_SUPPLY_PROP_CHARGE_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) case POWER_SUPPLY_PROP_CHARGE_FULL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) ret = bq27xxx_simple_value(di->cache.charge_full, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) ret = bq27xxx_simple_value(di->charge_design_full, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) * TODO: Implement these to make registers set from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) * power_supply_battery_info visible in sysfs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) case POWER_SUPPLY_PROP_CYCLE_COUNT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) ret = bq27xxx_simple_value(di->cache.cycle_count, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) case POWER_SUPPLY_PROP_ENERGY_NOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) ret = bq27xxx_simple_value(di->cache.energy, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) case POWER_SUPPLY_PROP_POWER_AVG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) ret = bq27xxx_battery_pwr_avg(di, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) case POWER_SUPPLY_PROP_HEALTH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) ret = bq27xxx_simple_value(di->cache.health, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) case POWER_SUPPLY_PROP_MANUFACTURER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) val->strval = BQ27XXX_MANUFACTURER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) static void bq27xxx_external_power_changed(struct power_supply *psy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) cancel_delayed_work_sync(&di->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) schedule_delayed_work(&di->work, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) struct power_supply_desc *psy_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) struct power_supply_config psy_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) .of_node = di->dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) .drv_data = di,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) mutex_init(&di->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) di->regs = bq27xxx_chip_data[di->chip].regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) di->opts = bq27xxx_chip_data[di->chip].opts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) if (!psy_desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) psy_desc->name = di->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) psy_desc->properties = bq27xxx_chip_data[di->chip].props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) psy_desc->get_property = bq27xxx_battery_get_property;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) psy_desc->external_power_changed = bq27xxx_external_power_changed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) if (IS_ERR(di->bat))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) return dev_err_probe(di->dev, PTR_ERR(di->bat),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) "failed to register battery\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) bq27xxx_battery_settings(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) bq27xxx_battery_update(di);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) mutex_lock(&bq27xxx_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) list_add(&di->list, &bq27xxx_battery_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) mutex_unlock(&bq27xxx_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) * power_supply_unregister call bq27xxx_battery_get_property which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) * call bq27xxx_battery_poll.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) * Make sure that bq27xxx_battery_poll will not call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) * schedule_delayed_work again after unregister (which cause OOPS).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) poll_interval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) cancel_delayed_work_sync(&di->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) power_supply_unregister(di->bat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) mutex_lock(&bq27xxx_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) list_del(&di->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) mutex_unlock(&bq27xxx_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) mutex_destroy(&di->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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