Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ADP5061 I2C Programmable Linear Battery Charger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2018 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/power_supply.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) /* ADP5061 registers definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define ADP5061_ID			0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define ADP5061_REV			0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define ADP5061_VINX_SET		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define ADP5061_TERM_SET		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define ADP5061_CHG_CURR		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define ADP5061_VOLTAGE_TH		0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ADP5061_TIMER_SET		0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define ADP5061_FUNC_SET_1		0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define ADP5061_FUNC_SET_2		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define ADP5061_INT_EN			0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define ADP5061_INT_ACT			0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ADP5061_CHG_STATUS_1		0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ADP5061_CHG_STATUS_2		0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define ADP5061_FAULT			0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ADP5061_BATTERY_SHORT		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define ADP5061_IEND			0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* ADP5061_VINX_SET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define ADP5061_VINX_SET_ILIM_MSK		GENMASK(3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define ADP5061_VINX_SET_ILIM_MODE(x)		(((x) & 0x0F) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /* ADP5061_TERM_SET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define ADP5061_TERM_SET_VTRM_MSK		GENMASK(7, 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define ADP5061_TERM_SET_VTRM_MODE(x)		(((x) & 0x3F) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define ADP5061_TERM_SET_CHG_VLIM_MSK		GENMASK(1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define ADP5061_TERM_SET_CHG_VLIM_MODE(x)	(((x) & 0x03) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) /* ADP5061_CHG_CURR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define ADP5061_CHG_CURR_ICHG_MSK		GENMASK(6, 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define ADP5061_CHG_CURR_ICHG_MODE(x)		(((x) & 0x1F) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define ADP5061_CHG_CURR_ITRK_DEAD_MSK		GENMASK(1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define ADP5061_CHG_CURR_ITRK_DEAD_MODE(x)	(((x) & 0x03) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) /* ADP5061_VOLTAGE_TH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define ADP5061_VOLTAGE_TH_DIS_RCH_MSK		BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define ADP5061_VOLTAGE_TH_DIS_RCH_MODE(x)	(((x) & 0x01) << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define ADP5061_VOLTAGE_TH_VRCH_MSK		GENMASK(6, 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define ADP5061_VOLTAGE_TH_VRCH_MODE(x)		(((x) & 0x03) << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define ADP5061_VOLTAGE_TH_VTRK_DEAD_MSK	GENMASK(4, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define ADP5061_VOLTAGE_TH_VTRK_DEAD_MODE(x)	(((x) & 0x03) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define ADP5061_VOLTAGE_TH_VWEAK_MSK		GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define ADP5061_VOLTAGE_TH_VWEAK_MODE(x)	(((x) & 0x07) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /* ADP5061_CHG_STATUS_1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define ADP5061_CHG_STATUS_1_VIN_OV(x)		(((x) >> 7) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define ADP5061_CHG_STATUS_1_VIN_OK(x)		(((x) >> 6) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define ADP5061_CHG_STATUS_1_VIN_ILIM(x)	(((x) >> 5) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define ADP5061_CHG_STATUS_1_THERM_LIM(x)	(((x) >> 4) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define ADP5061_CHG_STATUS_1_CHDONE(x)		(((x) >> 3) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define ADP5061_CHG_STATUS_1_CHG_STATUS(x)	(((x) >> 0) & 0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) /* ADP5061_CHG_STATUS_2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define ADP5061_CHG_STATUS_2_THR_STATUS(x)	(((x) >> 5) & 0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define ADP5061_CHG_STATUS_2_RCH_LIM_INFO(x)	(((x) >> 3) & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define ADP5061_CHG_STATUS_2_BAT_STATUS(x)	(((x) >> 0) & 0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) /* ADP5061_IEND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define ADP5061_IEND_IEND_MSK			GENMASK(7, 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define ADP5061_IEND_IEND_MODE(x)		(((x) & 0x07) << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define ADP5061_NO_BATTERY	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define ADP5061_ICHG_MAX	1300 // mA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) enum adp5061_chg_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	ADP5061_CHG_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	ADP5061_CHG_TRICKLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	ADP5061_CHG_FAST_CC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	ADP5061_CHG_FAST_CV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	ADP5061_CHG_COMPLETE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	ADP5061_CHG_LDO_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	ADP5061_CHG_TIMER_EXP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	ADP5061_CHG_BAT_DET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static const int adp5061_chg_type[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	[ADP5061_CHG_OFF] = POWER_SUPPLY_CHARGE_TYPE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	[ADP5061_CHG_TRICKLE] = POWER_SUPPLY_CHARGE_TYPE_TRICKLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	[ADP5061_CHG_FAST_CC] = POWER_SUPPLY_CHARGE_TYPE_FAST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	[ADP5061_CHG_FAST_CV] = POWER_SUPPLY_CHARGE_TYPE_FAST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const int adp5061_vweak_th[8] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	2700, 2800, 2900, 3000, 3100, 3200, 3300, 3400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const int adp5061_prechg_current[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	5, 10, 20, 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const int adp5061_vmin[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	2000, 2500, 2600, 2900,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static const int adp5061_const_chg_vmax[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	3200, 3400, 3700, 3800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const int adp5061_const_ichg[24] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	50, 100, 150, 200, 250, 300, 350, 400, 450, 500, 550, 600, 650,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	700, 750, 800, 850, 900, 950, 1000, 1050, 1100, 1200, 1300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static const int adp5061_vmax[36] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	3800, 3820, 3840, 3860, 3880, 3900, 3920, 3940, 3960, 3980,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	4000, 4020, 4040, 4060, 4080, 4100, 4120, 4140, 4160, 4180,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	4200, 4220, 4240, 4260, 4280, 4300, 4320, 4340, 4360, 4380,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	4400, 4420, 4440, 4460, 4480, 4500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const int adp5061_in_current_lim[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	100, 150, 200, 250, 300, 400, 500, 600, 700,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	800, 900, 1000, 1200, 1500, 1800, 2100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static const int adp5061_iend[8] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	12500, 32500, 52500, 72500, 92500, 117500, 142500, 170000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct adp5061_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	struct i2c_client		*client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct regmap			*regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct power_supply		*psy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int adp5061_get_array_index(const int *array, u8 size, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	for (i = 1; i < size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		if (val < array[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	return i-1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int adp5061_get_status(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			      u8 *status1, u8 *status2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	/* CHG_STATUS1 and CHG_STATUS2 are adjacent regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	ret = regmap_bulk_read(st->regmap, ADP5061_CHG_STATUS_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			       &buf[0], 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	*status1 = buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	*status2 = buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int adp5061_get_input_current_limit(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int mode, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	ret = regmap_read(st->regmap, ADP5061_VINX_SET, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	mode = ADP5061_VINX_SET_ILIM_MODE(regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	val->intval = adp5061_in_current_lim[mode] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int adp5061_set_input_current_limit(struct adp5061_state *st, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	/* Convert from uA to mA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	val /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	index = adp5061_get_array_index(adp5061_in_current_lim,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 					ARRAY_SIZE(adp5061_in_current_lim),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 					val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	return regmap_update_bits(st->regmap, ADP5061_VINX_SET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				  ADP5061_VINX_SET_ILIM_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 				  ADP5061_VINX_SET_ILIM_MODE(index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static int adp5061_set_min_voltage(struct adp5061_state *st, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	/* Convert from uV to mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	val /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	index = adp5061_get_array_index(adp5061_vmin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 					ARRAY_SIZE(adp5061_vmin),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 					val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return regmap_update_bits(st->regmap, ADP5061_VOLTAGE_TH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 				  ADP5061_VOLTAGE_TH_VTRK_DEAD_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 				  ADP5061_VOLTAGE_TH_VTRK_DEAD_MODE(index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int adp5061_get_min_voltage(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 				   union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	ret = regmap_read(st->regmap, ADP5061_VOLTAGE_TH, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	regval = ((regval & ADP5061_VOLTAGE_TH_VTRK_DEAD_MSK) >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	val->intval = adp5061_vmin[regval] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int adp5061_get_chg_volt_lim(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 				    union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	int mode, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	ret = regmap_read(st->regmap, ADP5061_TERM_SET, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	mode = ADP5061_TERM_SET_CHG_VLIM_MODE(regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	val->intval = adp5061_const_chg_vmax[mode] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static int adp5061_get_max_voltage(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 				   union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	ret = regmap_read(st->regmap, ADP5061_TERM_SET, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	regval = ((regval & ADP5061_TERM_SET_VTRM_MSK) >> 2) - 0x0F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	if (regval >= ARRAY_SIZE(adp5061_vmax))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		regval = ARRAY_SIZE(adp5061_vmax) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	val->intval = adp5061_vmax[regval] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static int adp5061_set_max_voltage(struct adp5061_state *st, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	int vmax_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	/* Convert from uV to mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	val /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	if (val > 4500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		val = 4500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	vmax_index = adp5061_get_array_index(adp5061_vmax,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 					     ARRAY_SIZE(adp5061_vmax), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	if (vmax_index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		return vmax_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	vmax_index += 0x0F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	return regmap_update_bits(st->regmap, ADP5061_TERM_SET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 				  ADP5061_TERM_SET_VTRM_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 				  ADP5061_TERM_SET_VTRM_MODE(vmax_index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static int adp5061_set_const_chg_vmax(struct adp5061_state *st, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	/* Convert from uV to mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	val /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	index = adp5061_get_array_index(adp5061_const_chg_vmax,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 					ARRAY_SIZE(adp5061_const_chg_vmax),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 					val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	return regmap_update_bits(st->regmap, ADP5061_TERM_SET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 				  ADP5061_TERM_SET_CHG_VLIM_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 				  ADP5061_TERM_SET_CHG_VLIM_MODE(index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static int adp5061_set_const_chg_current(struct adp5061_state *st, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	/* Convert from uA to mA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	val /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	if (val > ADP5061_ICHG_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		val = ADP5061_ICHG_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	index = adp5061_get_array_index(adp5061_const_ichg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 					ARRAY_SIZE(adp5061_const_ichg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 					val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	return regmap_update_bits(st->regmap, ADP5061_CHG_CURR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 				  ADP5061_CHG_CURR_ICHG_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 				  ADP5061_CHG_CURR_ICHG_MODE(index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static int adp5061_get_const_chg_current(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	ret = regmap_read(st->regmap, ADP5061_CHG_CURR, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	regval = ((regval & ADP5061_CHG_CURR_ICHG_MSK) >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	if (regval >= ARRAY_SIZE(adp5061_const_ichg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		regval = ARRAY_SIZE(adp5061_const_ichg) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	val->intval = adp5061_const_ichg[regval] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int adp5061_get_prechg_current(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 				      union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	ret = regmap_read(st->regmap, ADP5061_CHG_CURR, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	regval &= ADP5061_CHG_CURR_ITRK_DEAD_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	val->intval = adp5061_prechg_current[regval] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static int adp5061_set_prechg_current(struct adp5061_state *st, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	/* Convert from uA to mA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	val /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	index = adp5061_get_array_index(adp5061_prechg_current,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 					ARRAY_SIZE(adp5061_prechg_current),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 					val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	return regmap_update_bits(st->regmap, ADP5061_CHG_CURR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 				  ADP5061_CHG_CURR_ITRK_DEAD_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 				  ADP5061_CHG_CURR_ITRK_DEAD_MODE(index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static int adp5061_get_vweak_th(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 				union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	ret = regmap_read(st->regmap, ADP5061_VOLTAGE_TH, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	regval &= ADP5061_VOLTAGE_TH_VWEAK_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	val->intval = adp5061_vweak_th[regval] * 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static int adp5061_set_vweak_th(struct adp5061_state *st, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	/* Convert from uV to mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	val /= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	index = adp5061_get_array_index(adp5061_vweak_th,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 					ARRAY_SIZE(adp5061_vweak_th),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 					val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 		return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	return regmap_update_bits(st->regmap, ADP5061_VOLTAGE_TH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 				  ADP5061_VOLTAGE_TH_VWEAK_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 				  ADP5061_VOLTAGE_TH_VWEAK_MODE(index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) static int adp5061_get_chg_type(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 				union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	u8 status1, status2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	int chg_type, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	ret = adp5061_get_status(st, &status1, &status2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	chg_type = adp5061_chg_type[ADP5061_CHG_STATUS_1_CHG_STATUS(status1)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	if (chg_type > ADP5061_CHG_FAST_CV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 		val->intval = chg_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static int adp5061_get_charger_status(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 				      union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	u8 status1, status2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	ret = adp5061_get_status(st, &status1, &status2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	switch (ADP5061_CHG_STATUS_1_CHG_STATUS(status1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	case ADP5061_CHG_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	case ADP5061_CHG_TRICKLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	case ADP5061_CHG_FAST_CC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	case ADP5061_CHG_FAST_CV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 		val->intval = POWER_SUPPLY_STATUS_CHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	case ADP5061_CHG_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 		val->intval = POWER_SUPPLY_STATUS_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	case ADP5061_CHG_TIMER_EXP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 		/* The battery must be discharging if there is a charge fault */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 		val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 		val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static int adp5061_get_battery_status(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 				      union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	u8 status1, status2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	ret = adp5061_get_status(st, &status1, &status2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	switch (ADP5061_CHG_STATUS_2_BAT_STATUS(status2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	case 0x0: /* Battery monitor off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	case 0x1: /* No battery */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 		val->intval = POWER_SUPPLY_CAPACITY_LEVEL_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	case 0x2: /* VBAT < VTRK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		val->intval = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	case 0x3: /* VTRK < VBAT_SNS < VWEAK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 		val->intval = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	case 0x4: /* VBAT_SNS > VWEAK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 		val->intval = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static int adp5061_get_termination_current(struct adp5061_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 					   union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	unsigned int regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	ret = regmap_read(st->regmap, ADP5061_IEND, &regval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	regval = (regval & ADP5061_IEND_IEND_MSK) >> 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	val->intval = adp5061_iend[regval];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static int adp5061_set_termination_current(struct adp5061_state *st, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	index = adp5061_get_array_index(adp5061_iend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 					ARRAY_SIZE(adp5061_iend),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 					val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	if (index < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 		return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	return regmap_update_bits(st->regmap, ADP5061_IEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 				  ADP5061_IEND_IEND_MSK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 				  ADP5061_IEND_IEND_MODE(index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static int adp5061_get_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 				enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 				union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	struct adp5061_state *st = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	u8 status1, status2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	int mode, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	case POWER_SUPPLY_PROP_PRESENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 		ret = adp5061_get_status(st, &status1, &status2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 		mode = ADP5061_CHG_STATUS_2_BAT_STATUS(status2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 		if (mode == ADP5061_NO_BATTERY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 			val->intval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 			val->intval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	case POWER_SUPPLY_PROP_CHARGE_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 		return adp5061_get_chg_type(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 		/* This property is used to indicate the input current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 		 * limit into VINx (ILIM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 		return adp5061_get_input_current_limit(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	case POWER_SUPPLY_PROP_VOLTAGE_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 		/* This property is used to indicate the termination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 		 * voltage (VTRM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 		return adp5061_get_max_voltage(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	case POWER_SUPPLY_PROP_VOLTAGE_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 		 * This property is used to indicate the trickle to fast
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 		 * charge threshold (VTRK_DEAD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 		return adp5061_get_min_voltage(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 		/* This property is used to indicate the charging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 		 * voltage limit (CHG_VLIM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 		return adp5061_get_chg_volt_lim(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 		 * This property is used to indicate the value of the constant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 		 * current charge (ICHG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 		return adp5061_get_const_chg_current(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 		 * This property is used to indicate the value of the trickle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 		 * and weak charge currents (ITRK_DEAD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 		return adp5061_get_prechg_current(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	case POWER_SUPPLY_PROP_VOLTAGE_AVG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 		 * This property is used to set the VWEAK threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 		 * bellow this value, weak charge mode is entered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 		 * above this value, fast chargerge mode is entered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 		return adp5061_get_vweak_th(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 	case POWER_SUPPLY_PROP_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 		 * Indicate the charger status in relation to power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 		 * supply status property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 		return adp5061_get_charger_status(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 		 * Indicate the battery status in relation to power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 		 * supply capacity level property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 		return adp5061_get_battery_status(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 	case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 		/* Indicate the values of the termination current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 		return adp5061_get_termination_current(st, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) static int adp5061_set_property(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 				enum power_supply_property psp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 				const union power_supply_propval *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 	struct adp5061_state *st = power_supply_get_drvdata(psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 	switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 		return adp5061_set_input_current_limit(st, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 	case POWER_SUPPLY_PROP_VOLTAGE_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 		return adp5061_set_max_voltage(st, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 	case POWER_SUPPLY_PROP_VOLTAGE_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 		return adp5061_set_min_voltage(st, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 		return adp5061_set_const_chg_vmax(st, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) 		return adp5061_set_const_chg_current(st, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 	case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) 		return adp5061_set_prechg_current(st, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 	case POWER_SUPPLY_PROP_VOLTAGE_AVG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 		return adp5061_set_vweak_th(st, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) 	case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) 		return adp5061_set_termination_current(st, val->intval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static int adp5061_prop_writeable(struct power_supply *psy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) 				  enum power_supply_property psp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 	switch (psp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 	case POWER_SUPPLY_PROP_VOLTAGE_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) 	case POWER_SUPPLY_PROP_VOLTAGE_MIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) 	case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 	case POWER_SUPPLY_PROP_VOLTAGE_AVG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 	case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static enum power_supply_property adp5061_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 	POWER_SUPPLY_PROP_PRESENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 	POWER_SUPPLY_PROP_CHARGE_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 	POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 	POWER_SUPPLY_PROP_VOLTAGE_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 	POWER_SUPPLY_PROP_VOLTAGE_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 	POWER_SUPPLY_PROP_PRECHARGE_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 	POWER_SUPPLY_PROP_VOLTAGE_AVG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 	POWER_SUPPLY_PROP_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 	POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static const struct regmap_config adp5061_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) static const struct power_supply_desc adp5061_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 	.name			= "adp5061",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 	.type			= POWER_SUPPLY_TYPE_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	.get_property		= adp5061_get_property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 	.set_property		= adp5061_set_property,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 	.property_is_writeable	= adp5061_prop_writeable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) 	.properties		= adp5061_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 	.num_properties		= ARRAY_SIZE(adp5061_props),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static int adp5061_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 			 const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 	struct power_supply_config psy_cfg = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) 	struct adp5061_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) 	st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) 	if (!st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) 	st->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 	st->regmap = devm_regmap_init_i2c(client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) 					  &adp5061_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 	if (IS_ERR(st->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 		dev_err(&client->dev, "Failed to initialize register map\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) 	i2c_set_clientdata(client, st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) 	psy_cfg.drv_data = st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) 	st->psy = devm_power_supply_register(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) 					     &adp5061_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) 					     &psy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 	if (IS_ERR(st->psy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 		dev_err(&client->dev, "Failed to register power supply\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) 		return PTR_ERR(st->psy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const struct i2c_device_id adp5061_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 	{ "adp5061", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) MODULE_DEVICE_TABLE(i2c, adp5061_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) static struct i2c_driver adp5061_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) 		.name = KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 	.probe = adp5061_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) 	.id_table = adp5061_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) module_i2c_driver(adp5061_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) MODULE_DESCRIPTION("Analog Devices adp5061 battery charger driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) MODULE_AUTHOR("Stefan Popa <stefan.popa@analog.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) MODULE_LICENSE("GPL v2");