Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * Copyright (C) 2016 Broadcom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define RSTMGR_REG_WR_ACCESS_OFFSET	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define RSTMGR_REG_CHIP_SOFT_RST_OFFSET	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RSTMGR_WR_PASSWORD		0xa5a5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define RSTMGR_WR_PASSWORD_SHIFT	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RSTMGR_WR_ACCESS_ENABLE		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static void __iomem *kona_reset_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static int kona_reset_handler(struct notifier_block *this,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 				unsigned long mode, void *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	 * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	 * register. To write to that register we must first write the password
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	 * and the enable bit in the write access enable register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		RSTMGR_WR_ACCESS_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		kona_reset_base + RSTMGR_REG_WR_ACCESS_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	writel(0, kona_reset_base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static struct notifier_block kona_reset_nb = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	.notifier_call = kona_reset_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	.priority = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int kona_reset_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	kona_reset_base = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	if (IS_ERR(kona_reset_base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		return PTR_ERR(kona_reset_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	return register_restart_handler(&kona_reset_nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static const struct of_device_id of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	{ .compatible = "brcm,bcm21664-resetmgr" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static struct platform_driver bcm_kona_reset_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	.probe = kona_reset_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 		.name = "brcm-kona-reset",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		.of_match_table = of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) builtin_platform_driver(bcm_kona_reset_driver);