Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Pinctrl driver for the Wondermedia SoC's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* VT8500 has no enable register in the extgpio bank. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define NO_REG	0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define WMT_PINCTRL_BANK(__en, __dir, __dout, __din, __pen, __pcfg)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	.reg_en		= __en,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	.reg_dir	= __dir,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	.reg_data_out	= __dout,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	.reg_data_in	= __din,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	.reg_pull_en	= __pen,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	.reg_pull_cfg	= __pcfg,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Encode/decode the bank/bit pairs into a pin value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define WMT_PIN(__bank, __offset)	((__bank << 5) | __offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define WMT_BANK_FROM_PIN(__pin)	(__pin >> 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define WMT_BIT_FROM_PIN(__pin)		(__pin & 0x1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define WMT_GROUP(__name, __data)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	.name = __name,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	.pins = __data,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	.npins = ARRAY_SIZE(__data),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct wmt_pinctrl_bank_registers {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	u32	reg_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	u32	reg_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	u32	reg_data_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	u32	reg_data_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	u32	reg_pull_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	u32	reg_pull_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct wmt_pinctrl_group {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	const unsigned int *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	const unsigned npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct wmt_pinctrl_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	struct pinctrl_dev *pctl_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	/* must be initialized before calling wmt_pinctrl_probe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	const struct wmt_pinctrl_bank_registers *banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	const struct pinctrl_pin_desc *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	const char * const *groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	u32 nbanks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	u32 npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	u32 ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	struct pinctrl_gpio_range gpio_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int wmt_pinctrl_probe(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 		      struct wmt_pinctrl_data *data);