Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Allwinner H3 SoCs pinctrl driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2016 Krzysztof Adamski <k@japko.eu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * License version 2.  This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "pinctrl-sunxi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) static const struct sunxi_desc_pin sun8i_h3_r_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 		  SUNXI_FUNCTION(0x2, "s_i2c"),         /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* PL_EINT0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		  SUNXI_FUNCTION(0x2, "s_i2c"),         /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/* PL_EINT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		  SUNXI_FUNCTION(0x2, "s_uart"),        /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/* PL_EINT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		  SUNXI_FUNCTION(0x2, "s_uart"),        /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/* PL_EINT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		  SUNXI_FUNCTION(0x2, "s_jtag"),        /* MS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/* PL_EINT4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		  SUNXI_FUNCTION(0x2, "s_jtag"),        /* CK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),	/* PL_EINT5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		  SUNXI_FUNCTION(0x2, "s_jtag"),        /* DO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),	/* PL_EINT6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		  SUNXI_FUNCTION(0x2, "s_jtag"),        /* DI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),	/* PL_EINT7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),	/* PL_EINT8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),	/* PL_EINT9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		  SUNXI_FUNCTION(0x2, "s_pwm"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),	/* PL_EINT10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		  SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		  SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		  SUNXI_FUNCTION(0x2, "s_cir_rx"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),	/* PL_EINT11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) static const struct sunxi_pinctrl_desc sun8i_h3_r_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	.pins = sun8i_h3_r_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	.npins = ARRAY_SIZE(sun8i_h3_r_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	.irq_banks = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	.pin_base = PL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	.irq_read_needs_mux = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	.disable_strict_mode = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static int sun8i_h3_r_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	return sunxi_pinctrl_init(pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 				  &sun8i_h3_r_pinctrl_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static const struct of_device_id sun8i_h3_r_pinctrl_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	{ .compatible = "allwinner,sun8i-h3-r-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static struct platform_driver sun8i_h3_r_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	.probe	= sun8i_h3_r_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	.driver	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		.name		= "sun8i-h3-r-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		.of_match_table	= sun8i_h3_r_pinctrl_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) builtin_platform_driver(sun8i_h3_r_pinctrl_driver);