^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Allwinner sun5i SoCs pinctrl driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2014-2016 Maxime Ripard <maxime.ripard@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 Mylene Josserand <mylene.josserand@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "pinctrl-sunxi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static const struct sunxi_desc_pin sun5i_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) SUNXI_FUNCTION(0x3, "ts0"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) SUNXI_FUNCTION(0x5, "keypad")), /* IN0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) SUNXI_FUNCTION(0x3, "ts0"), /* ERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) SUNXI_FUNCTION(0x5, "keypad")), /* IN1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) SUNXI_FUNCTION(0x3, "ts0"), /* SYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) SUNXI_FUNCTION(0x5, "keypad")), /* IN2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) SUNXI_FUNCTION(0x3, "ts0"), /* DLVD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) SUNXI_FUNCTION(0x5, "keypad")), /* IN3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) SUNXI_FUNCTION(0x3, "ts0"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) SUNXI_FUNCTION(0x5, "keypad")), /* IN4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) SUNXI_FUNCTION(0x3, "ts0"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) SUNXI_FUNCTION(0x5, "keypad")), /* IN5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) SUNXI_FUNCTION(0x3, "ts0"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) SUNXI_FUNCTION(0x5, "keypad")), /* IN6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) SUNXI_FUNCTION(0x3, "ts0"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) SUNXI_FUNCTION(0x5, "keypad")), /* IN7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) SUNXI_FUNCTION(0x3, "ts0"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) SUNXI_FUNCTION(0x5, "keypad")), /* OUT0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) SUNXI_FUNCTION(0x3, "ts0"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) SUNXI_FUNCTION(0x4, "uart1"), /* DSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) SUNXI_FUNCTION(0x5, "keypad")), /* OUT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) SUNXI_FUNCTION(0x3, "ts0"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) SUNXI_FUNCTION(0x4, "uart1"), /* DCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) SUNXI_FUNCTION(0x5, "keypad")), /* OUT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) SUNXI_FUNCTION(0x3, "ts0"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) SUNXI_FUNCTION(0x4, "uart1"), /* RING */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) SUNXI_FUNCTION(0x5, "keypad")), /* OUT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) SUNXI_FUNCTION(0x3, "uart1"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) SUNXI_FUNCTION(0x5, "keypad")), /* OUT4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) SUNXI_FUNCTION(0x3, "uart1"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) SUNXI_FUNCTION(0x5, "keypad")), /* OUT5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) SUNXI_FUNCTION(0x3, "uart1"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) SUNXI_FUNCTION(0x4, "uart3"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) SUNXI_FUNCTION(0x5, "keypad")), /* OUT6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) SUNXI_FUNCTION(0x3, "uart1"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) SUNXI_FUNCTION(0x4, "uart3"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) SUNXI_FUNCTION(0x5, "keypad")), /* OUT7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) SUNXI_FUNCTION(0x3, "uart2")), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) SUNXI_FUNCTION(0x3, "uart2"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) SUNXI_FUNCTION_VARIANT(0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) "spdif", /* DO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) PINCTRL_SUN5I_GR8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) SUNXI_FUNCTION_IRQ(0x6, 16)), /* EINT16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) SUNXI_FUNCTION(0x2, "ir0"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) SUNXI_FUNCTION_IRQ(0x6, 17)), /* EINT17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) SUNXI_FUNCTION(0x2, "ir0"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) SUNXI_FUNCTION_IRQ(0x6, 18)), /* EINT18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) SUNXI_FUNCTION(0x2, "i2s"), /* MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) SUNXI_FUNCTION_IRQ(0x6, 19)), /* EINT19 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) SUNXI_FUNCTION_IRQ(0x6, 20)), /* EINT20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) SUNXI_FUNCTION(0x2, "i2s"), /* LRCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) SUNXI_FUNCTION_IRQ(0x6, 21)), /* EINT21 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) SUNXI_FUNCTION(0x2, "i2s"), /* DO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) SUNXI_FUNCTION(0x2, "i2s"), /* DI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) SUNXI_FUNCTION_VARIANT(0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) "spdif", /* DI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PINCTRL_SUN5I_GR8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) SUNXI_FUNCTION_VARIANT(0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) "spdif", /* DO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PINCTRL_SUN5I_GR8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) SUNXI_FUNCTION(0x2, "uart0"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) SUNXI_FUNCTION(0x2, "uart0"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) SUNXI_FUNCTION(0x2, "nand0")), /* NRE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) SUNXI_FUNCTION(0x2, "nand0"), /* NWP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) SUNXI_FUNCTION(0x4, "uart3")), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) SUNXI_FUNCTION(0x2, "nand0"), /* NCE2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) SUNXI_FUNCTION(0x4, "uart3")), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) SUNXI_FUNCTION(0x2, "nand0"), /* NCE3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) SUNXI_FUNCTION(0x3, "uart2"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) SUNXI_FUNCTION(0x4, "uart3")), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) SUNXI_FUNCTION(0x3, "uart2"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) SUNXI_FUNCTION(0x4, "uart3")), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) SUNXI_FUNCTION(0x2, "lcd0")), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) SUNXI_FUNCTION(0x2, "lcd0")), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) SUNXI_FUNCTION(0x3, "uart2")), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) SUNXI_FUNCTION(0x3, "uart2")), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) SUNXI_FUNCTION(0x3, "uart2")), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) SUNXI_FUNCTION(0x3, "uart2")), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) SUNXI_FUNCTION(0x3, "emac")), /* ECRS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) SUNXI_FUNCTION(0x3, "emac")), /* ECOL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) SUNXI_FUNCTION(0x2, "lcd0")), /* D8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) SUNXI_FUNCTION(0x2, "lcd0")), /* D9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) SUNXI_FUNCTION(0x3, "emac")), /* ERXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) SUNXI_FUNCTION(0x3, "emac")), /* ERXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) SUNXI_FUNCTION(0x3, "emac")), /* ERXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) SUNXI_FUNCTION(0x3, "emac")), /* ERXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) SUNXI_FUNCTION(0x3, "emac")), /* ERXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) SUNXI_FUNCTION(0x3, "emac")), /* ERXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) SUNXI_FUNCTION(0x2, "lcd0")), /* D16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) PINCTRL_SUN5I_A10S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) SUNXI_FUNCTION(0x2, "lcd0")), /* D17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) SUNXI_FUNCTION(0x3, "emac")), /* ERXDV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) SUNXI_FUNCTION(0x3, "emac")), /* ETXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) SUNXI_FUNCTION(0x3, "emac")), /* ETXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) SUNXI_FUNCTION(0x3, "emac")), /* ETXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) SUNXI_FUNCTION(0x3, "emac")), /* ETXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) SUNXI_FUNCTION(0x3, "emac")), /* ETXEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) SUNXI_FUNCTION(0x3, "emac")), /* ETXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) SUNXI_FUNCTION(0x3, "emac")), /* ETXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) SUNXI_FUNCTION(0x3, "emac")), /* EMDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) SUNXI_FUNCTION(0x3, "emac")), /* EMDIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) SUNXI_FUNCTION(0x3, "csi0"), /* PCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) SUNXI_FUNCTION(0x4, "spi2"), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) SUNXI_FUNCTION_IRQ(0x6, 14)), /* EINT14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) SUNXI_FUNCTION(0x3, "csi0"), /* CK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) SUNXI_FUNCTION(0x4, "spi2"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) SUNXI_FUNCTION_IRQ(0x6, 15)), /* EINT15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) SUNXI_FUNCTION(0x3, "csi0"), /* HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) SUNXI_FUNCTION(0x4, "spi2")), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) SUNXI_FUNCTION(0x3, "csi0"), /* VSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) SUNXI_FUNCTION(0x4, "spi2")), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) SUNXI_FUNCTION(0x3, "csi0"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) SUNXI_FUNCTION(0x4, "mmc2")), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) SUNXI_FUNCTION(0x4, "mmc2")), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) SUNXI_FUNCTION(0x3, "csi0"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) SUNXI_FUNCTION(0x4, "mmc2")), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) SUNXI_FUNCTION(0x3, "csi0"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) SUNXI_FUNCTION(0x4, "mmc2")), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) SUNXI_FUNCTION(0x3, "csi0"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) SUNXI_FUNCTION(0x4, "mmc2")), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) SUNXI_FUNCTION(0x3, "csi0"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) SUNXI_FUNCTION(0x4, "mmc2")), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) SUNXI_FUNCTION(0x3, "csi0"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) SUNXI_FUNCTION(0x4, "uart1")), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) SUNXI_FUNCTION(0x3, "csi0"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) SUNXI_FUNCTION(0x4, "uart1")), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) SUNXI_FUNCTION(0x4, "uart0")), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) SUNXI_FUNCTION(0x4, "uart0")), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) SUNXI_FUNCTION(0x2, "gps"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) SUNXI_FUNCTION_IRQ(0x6, 0)), /* EINT0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) SUNXI_FUNCTION(0x2, "gps"), /* SIGN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) SUNXI_FUNCTION_IRQ(0x6, 1)), /* EINT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) SUNXI_FUNCTION(0x2, "gps"), /* MAG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) SUNXI_FUNCTION_IRQ(0x6, 2)), /* EINT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) SUNXI_FUNCTION(0x4, "uart1"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) SUNXI_FUNCTION_IRQ(0x6, 3)), /* EINT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) SUNXI_FUNCTION(0x4, "uart1"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) SUNXI_FUNCTION_IRQ(0x6, 4)), /* EINT4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) SUNXI_FUNCTION(0x2, "mmc1"), /* DO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) SUNXI_FUNCTION_IRQ(0x6, 5)), /* EINT5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) SUNXI_FUNCTION(0x5, "uart2"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) SUNXI_FUNCTION_IRQ(0x6, 6)), /* EINT6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) SUNXI_FUNCTION(0x5, "uart2"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) SUNXI_FUNCTION_IRQ(0x6, 7)), /* EINT7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) SUNXI_FUNCTION(0x5, "uart2"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) SUNXI_FUNCTION_IRQ(0x6, 8)), /* EINT8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) SUNXI_FUNCTION(0x3, "uart3"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) SUNXI_FUNCTION_IRQ(0x6, 9)), /* EINT9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) SUNXI_FUNCTION(0x3, "uart3"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) SUNXI_FUNCTION_IRQ(0x6, 10)), /* EINT10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) SUNXI_FUNCTION_IRQ(0x6, 11)), /* EINT11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) SUNXI_FUNCTION_IRQ(0x6, 12)), /* EINT12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) SUNXI_FUNCTION(0x3, "pwm"), /* PWM1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) SUNXI_FUNCTION(0x5, "uart2"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) SUNXI_FUNCTION_IRQ(0x6, 13)), /* EINT13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static const struct sunxi_pinctrl_desc sun5i_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .pins = sun5i_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .npins = ARRAY_SIZE(sun5i_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) .irq_banks = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) .disable_strict_mode = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) static int sun5i_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) return sunxi_pinctrl_init_with_variant(pdev, &sun5i_pinctrl_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const struct of_device_id sun5i_pinctrl_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .compatible = "allwinner,sun5i-a10s-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .data = (void *)PINCTRL_SUN5I_A10S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) .compatible = "allwinner,sun5i-a13-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .data = (void *)PINCTRL_SUN5I_A13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .compatible = "nextthing,gr8-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .data = (void *)PINCTRL_SUN5I_GR8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static struct platform_driver sun5i_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .probe = sun5i_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .name = "sun5i-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) .of_match_table = sun5i_pinctrl_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) builtin_platform_driver(sun5i_pinctrl_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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