^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Based on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * huangshuosheng <huangshuosheng@allwinnertech.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "pinctrl-sunxi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static const struct sunxi_desc_pin a100_r_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SUNXI_FUNCTION(0x2, "s_i2c0"), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) SUNXI_FUNCTION(0x2, "s_i2c0"), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) SUNXI_FUNCTION(0x2, "s_uart0"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) SUNXI_FUNCTION(0x2, "s_uart0"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) SUNXI_FUNCTION(0x2, "s_i2c1"), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) SUNXI_FUNCTION(0x2, "s_i2c1"), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) SUNXI_FUNCTION(0x2, "s_pwm"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) SUNXI_FUNCTION(0x3, "s_cir"), /* IN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static const struct sunxi_pinctrl_desc a100_r_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .pins = a100_r_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .npins = ARRAY_SIZE(a100_r_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .pin_base = PL_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .irq_banks = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static int a100_r_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return sunxi_pinctrl_init(pdev, &a100_r_pinctrl_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static const struct of_device_id a100_r_pinctrl_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) { .compatible = "allwinner,sun50i-a100-r-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MODULE_DEVICE_TABLE(of, a100_r_pinctrl_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static struct platform_driver a100_r_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .probe = a100_r_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .name = "sun50iw10p1-r-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .of_match_table = a100_r_pinctrl_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) module_platform_driver(a100_r_pinctrl_driver);