^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Allwinner A10 SoCs pinctrl driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2014 Maxime Ripard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Maxime Ripard <maxime.ripard@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "pinctrl-sunxi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static const struct sunxi_desc_pin sun4i_a10_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) SUNXI_FUNCTION(0x4, "uart2"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) SUNXI_FUNCTION(0x4, "uart2"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) SUNXI_FUNCTION(0x4, "uart2"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) SUNXI_FUNCTION(0x4, "uart2"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) SUNXI_FUNCTION(0x3, "spi1"), /* CS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) SUNXI_FUNCTION(0x3, "spi3"), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) SUNXI_FUNCTION(0x3, "spi3"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) SUNXI_FUNCTION(0x3, "spi3"), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) SUNXI_FUNCTION(0x3, "spi3"), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) SUNXI_FUNCTION(0x3, "spi3"), /* CS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ERXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) SUNXI_FUNCTION(0x4, "uart1"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXDV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) SUNXI_FUNCTION(0x4, "uart1"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* EMDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) SUNXI_FUNCTION(0x3, "uart6"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* EMDIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) SUNXI_FUNCTION(0x3, "uart6"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXCTL / ETXEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) SUNXI_FUNCTION(0x3, "uart7"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ETXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* BCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) SUNXI_FUNCTION(0x3, "uart7"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) SUNXI_FUNCTION(0x4, "uart1"), /* DSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXCK / ECRS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* LRCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) SUNXI_FUNCTION(0x3, "can"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) SUNXI_FUNCTION(0x4, "uart1"), /* DCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GCLKIN / ECOL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* DO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) SUNXI_FUNCTION(0x3, "can"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) SUNXI_FUNCTION(0x4, "uart1"), /* RING */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ETXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* DI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) SUNXI_FUNCTION_VARIANT(0x3, "pll_lock_dbg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) SUNXI_FUNCTION_VARIANT(0x2, "pwm", /* PWM0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) SUNXI_FUNCTION_VARIANT(0x3, "pwm", /* PWM0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) SUNXI_FUNCTION_VARIANT(0x2, "ir0", /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) SUNXI_FUNCTION_VARIANT(0x3, "pwm", /* PWM1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * The SPDIF block is not referenced at all in the A10 user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * manual. However it is described in the code leaked and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * pin descriptions are declared in the A20 user manual which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * is pin compatible with this device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) SUNXI_FUNCTION(0x2, "ir0")), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * On A10 there's only one I2S controller and the pin group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * is simply named "i2s". On A20 there's two and thus it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * renamed to "i2s0". Deal with these name here, in order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * to satisfy existing device trees.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* BCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* BCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* LRCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* LRCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) SUNXI_FUNCTION(0x3, "ac97")), /* DO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) SUNXI_FUNCTION_VARIANT(0x4, "pwm", /* PWM6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) SUNXI_FUNCTION_VARIANT(0x4, "pwm", /* PWM7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) SUNXI_FUNCTION(0x3, "ac97"), /* DI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* Undocumented mux function on A10 - See SPDIF MCLK above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) SUNXI_FUNCTION_VARIANT(0x4, "spdif", /* SPDIF IN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) PINCTRL_SUN7I_A20)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* Undocumented mux function on A10 - See SPDIF MCLK above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF OUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) SUNXI_FUNCTION_VARIANT(0x4, "pwm", /* PWM4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) SUNXI_FUNCTION_VARIANT(0x4, "pwm", /* PWM5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) SUNXI_FUNCTION(0x2, "uart0"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) SUNXI_FUNCTION_VARIANT(0x3, "ir1", /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) PINCTRL_SUN7I_A20)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) SUNXI_FUNCTION(0x2, "uart0"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) SUNXI_FUNCTION(0x3, "ir1")), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) SUNXI_FUNCTION(0x3, "spi0")), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) SUNXI_FUNCTION(0x2, "nand0"), /* NRE# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* DS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) SUNXI_FUNCTION(0x2, "nand0")), /* NWP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) SUNXI_FUNCTION(0x3, "spi2")), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) SUNXI_FUNCTION(0x3, "spi2")), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) SUNXI_FUNCTION(0x3, "spi2")), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) SUNXI_FUNCTION(0x3, "spi2")), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) SUNXI_FUNCTION_VARIANT(0x3, "mmc2", /* RST */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) SUNXI_FUNCTION(0x3, "sim")), /* DET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) SUNXI_FUNCTION(0x3, "sim")), /* RST */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) SUNXI_FUNCTION(0x3, "sim")), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) SUNXI_FUNCTION(0x3, "sim")), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) SUNXI_FUNCTION(0x3, "csi0")), /* PCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) SUNXI_FUNCTION(0x3, "csi0")), /* CK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) SUNXI_FUNCTION(0x3, "csi0")), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) SUNXI_FUNCTION(0x3, "csi0")), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) SUNXI_FUNCTION(0x3, "csi0")), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) SUNXI_FUNCTION(0x3, "csi0")), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) SUNXI_FUNCTION(0x3, "csi0")), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) SUNXI_FUNCTION(0x3, "csi0")), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) SUNXI_FUNCTION(0x3, "csi0")), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) SUNXI_FUNCTION(0x4, "jtag")), /* MSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) SUNXI_FUNCTION(0x4, "uart0")), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) SUNXI_FUNCTION(0x4, "uart0")), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) SUNXI_FUNCTION(0x2, "ts1"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) SUNXI_FUNCTION(0x3, "csi1"), /* PCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) SUNXI_FUNCTION(0x2, "ts1"), /* ERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) SUNXI_FUNCTION(0x3, "csi1"), /* CK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) SUNXI_FUNCTION(0x2, "ts1"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) SUNXI_FUNCTION(0x3, "csi1"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) SUNXI_FUNCTION(0x5, "csi0")), /* D8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) SUNXI_FUNCTION(0x2, "ts1"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) SUNXI_FUNCTION(0x3, "csi1"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) SUNXI_FUNCTION(0x5, "csi0")), /* D9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) SUNXI_FUNCTION(0x2, "ts1"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) SUNXI_FUNCTION(0x3, "csi1"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) SUNXI_FUNCTION(0x4, "uart3"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) SUNXI_FUNCTION(0x5, "csi0")), /* D10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) SUNXI_FUNCTION(0x2, "ts1"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) SUNXI_FUNCTION(0x3, "csi1"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) SUNXI_FUNCTION(0x4, "uart3"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) SUNXI_FUNCTION(0x5, "csi0")), /* D11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) SUNXI_FUNCTION(0x2, "ts1"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) SUNXI_FUNCTION(0x3, "csi1"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) SUNXI_FUNCTION(0x5, "csi0")), /* D12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) SUNXI_FUNCTION(0x2, "ts1"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) SUNXI_FUNCTION(0x3, "csi1"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) SUNXI_FUNCTION(0x5, "csi0"), /* D13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) SUNXI_FUNCTION_VARIANT(0x6, "bist", /* RESULT0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) SUNXI_FUNCTION(0x2, "ts1"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) SUNXI_FUNCTION(0x3, "csi1"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) SUNXI_FUNCTION(0x4, "uart4"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) SUNXI_FUNCTION(0x5, "csi0"), /* D14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) SUNXI_FUNCTION_VARIANT(0x6, "bist", /* RESULT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) SUNXI_FUNCTION(0x2, "ts1"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) SUNXI_FUNCTION(0x3, "csi1"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) SUNXI_FUNCTION(0x4, "uart4"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) SUNXI_FUNCTION(0x5, "csi0")), /* D15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) SUNXI_FUNCTION(0x4, "uart3"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) SUNXI_FUNCTION(0x7, "csi1")), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) SUNXI_FUNCTION(0x4, "uart3"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) SUNXI_FUNCTION(0x7, "csi1")), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) SUNXI_FUNCTION(0x7, "csi1")), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) SUNXI_FUNCTION(0x7, "csi1")), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) SUNXI_FUNCTION(0x4, "uart4"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) SUNXI_FUNCTION(0x7, "csi1")), /* D4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) SUNXI_FUNCTION(0x4, "uart4"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) SUNXI_FUNCTION(0x7, "csi1")), /* D5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) SUNXI_FUNCTION(0x4, "uart5"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) SUNXI_FUNCTION_VARIANT(0x5, "ms", /* BS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) SUNXI_FUNCTION(0x7, "csi1")), /* D6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) SUNXI_FUNCTION(0x4, "uart5"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) SUNXI_FUNCTION_VARIANT(0x5, "ms", /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) SUNXI_FUNCTION(0x7, "csi1")), /* D7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) SUNXI_FUNCTION(0x7, "csi1")), /* D8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) SUNXI_FUNCTION(0x7, "csi1")), /* D9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) SUNXI_FUNCTION(0x7, "csi1")), /* D10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) SUNXI_FUNCTION(0x7, "csi1")), /* D11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) SUNXI_FUNCTION(0x7, "csi1")), /* D12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) SUNXI_FUNCTION(0x5, "sim"), /* RST */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) SUNXI_FUNCTION(0x7, "csi1")), /* D13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) SUNXI_FUNCTION(0x7, "csi1")), /* D14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) SUNXI_FUNCTION(0x7, "csi1")), /* D15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) SUNXI_FUNCTION(0x5, "sim"), /* DET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) SUNXI_FUNCTION(0x7, "csi1")), /* D16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) SUNXI_FUNCTION(0x7, "csi1")), /* D17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) SUNXI_FUNCTION(0x5, "sim"), /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) SUNXI_FUNCTION(0x7, "csi1")), /* D18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) SUNXI_FUNCTION(0x5, "sim"), /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) SUNXI_FUNCTION(0x7, "csi1")), /* D19 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAOE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXDV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) SUNXI_FUNCTION(0x4, "can"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) SUNXI_FUNCTION(0x7, "csi1")), /* D20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATADREQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* EMDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) SUNXI_FUNCTION(0x4, "can"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) SUNXI_FUNCTION(0x7, "csi1")), /* D21 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATADACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* EMDIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) SUNXI_FUNCTION(0x7, "csi1")), /* D22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATACS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) SUNXI_FUNCTION(0x7, "csi1")), /* D23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATACS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) SUNXI_FUNCTION(0x2, "lcd1"), /* DE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIORDY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ECRS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIOR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ECOL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIOW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) PINCTRL_SUN4I_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) /* Hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) SUNXI_FUNCTION_VARIANT(0x3, "i2c3", /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) SUNXI_FUNCTION_VARIANT(0x3, "i2c3", /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) SUNXI_FUNCTION_VARIANT(0x3, "i2c4", /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) SUNXI_FUNCTION(0x2, "pwm"), /* PWM1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) SUNXI_FUNCTION_VARIANT(0x3, "i2c4", /* SDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) SUNXI_FUNCTION(0x3, "uart5"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) SUNXI_FUNCTION(0x3, "uart5"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) SUNXI_FUNCTION(0x3, "uart6"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) SUNXI_FUNCTION_VARIANT(0x4, "clk_out_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) SUNXI_FUNCTION(0x3, "uart6"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) SUNXI_FUNCTION_VARIANT(0x4, "clk_out_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) PINCTRL_SUN7I_A20 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) PINCTRL_SUN8I_R40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) SUNXI_FUNCTION(0x3, "uart2"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) SUNXI_FUNCTION(0x3, "uart2"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) SUNXI_FUNCTION(0x3, "uart7"), /* TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) SUNXI_FUNCTION_VARIANT(0x4, "hdmi", /* HSCL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) SUNXI_FUNCTION_VARIANT(0x6, "pwm", /* PWM2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) SUNXI_FUNCTION(0x0, "gpio_in"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) SUNXI_FUNCTION(0x1, "gpio_out"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) SUNXI_FUNCTION(0x3, "uart7"), /* RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) SUNXI_FUNCTION_VARIANT(0x4, "hdmi", /* HSDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) PINCTRL_SUN4I_A10 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) PINCTRL_SUN7I_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) SUNXI_FUNCTION_VARIANT(0x6, "pwm", /* PWM3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) PINCTRL_SUN8I_R40)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) .pins = sun4i_a10_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) .npins = ARRAY_SIZE(sun4i_a10_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) .irq_banks = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) .irq_read_needs_mux = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) .disable_strict_mode = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) static int sun4i_a10_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) return sunxi_pinctrl_init_with_variant(pdev, &sun4i_a10_pinctrl_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) static const struct of_device_id sun4i_a10_pinctrl_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) .compatible = "allwinner,sun4i-a10-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) .data = (void *)PINCTRL_SUN4I_A10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) .compatible = "allwinner,sun7i-a20-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) .data = (void *)PINCTRL_SUN7I_A20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) .compatible = "allwinner,sun8i-r40-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) .data = (void *)PINCTRL_SUN8I_R40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) static struct platform_driver sun4i_a10_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) .probe = sun4i_a10_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) .name = "sun4i-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) .of_match_table = sun4i_a10_pinctrl_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) builtin_platform_driver(sun4i_a10_pinctrl_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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