Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) Maxime Coquelin 2015
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (C) STMicroelectronics 2017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Author:  Maxime Coquelin <mcoquelin.stm32@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifndef __PINCTRL_STM32_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define __PINCTRL_STM32_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/pinctrl/pinconf-generic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define STM32_PIN_NO(x) ((x) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define STM32_GET_PIN_NO(x) ((x) >> 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define STM32_GET_PIN_FUNC(x) ((x) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define STM32_PIN_GPIO		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define STM32_PIN_AF(x)		((x) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define STM32_PIN_ANALOG	(STM32_PIN_AF(15) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*  package information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define STM32MP_PKG_AA		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define STM32MP_PKG_AB		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define STM32MP_PKG_AC		BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define STM32MP_PKG_AD		BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct stm32_desc_function {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	const unsigned char num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct stm32_desc_pin {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	struct pinctrl_pin_desc pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	const struct stm32_desc_function *functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	const unsigned int pkg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define STM32_PIN(_pin, ...)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	{							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		.pin = _pin,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		.functions = (struct stm32_desc_function[]){	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			__VA_ARGS__, { } },			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define STM32_PIN_PKG(_pin, _pkg, ...)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	{							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		.pin = _pin,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		.pkg  = _pkg,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		.functions = (struct stm32_desc_function[]){	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			__VA_ARGS__, { } },			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define STM32_FUNCTION(_num, _name)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	{							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		.num = _num,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		.name = _name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct stm32_pinctrl_match_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	const struct stm32_desc_pin *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	const unsigned int npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct stm32_gpio_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int stm32_pctl_probe(struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) void stm32_pmx_get_mode(struct stm32_gpio_bank *bank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 			int pin, u32 *mode, u32 *alt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int stm32_pinctrl_resume(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #endif /* __PINCTRL_STM32_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)