^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (c) 2012 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // http://www.samsung.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Copyright (c) 2012 Linaro Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // http://www.linaro.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) // Author: Thomas Abraham <thomas.ab@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) // This driver implements the Samsung pinctrl driver. It supports setting up of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) // pinmux and pinconf configurations. The gpiolib interface is also included.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) // External interrupt (gpio and wakeup) support are not included in this driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) // but provides extensions to which platform specific implementation of the gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) // and wakeup interrupts can be hooked to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <dt-bindings/pinctrl/samsung.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include "../core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "pinctrl-samsung.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* maximum number of the memory resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define SAMSUNG_PINCTRL_NUM_RESOURCES 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* list of all possible config options supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static struct pin_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) const char *property;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) enum pincfg_type param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) } cfg_params[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) { "samsung,pin-pud", PINCFG_TYPE_PUD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { "samsung,pin-drv", PINCFG_TYPE_DRV },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { "samsung,pin-val", PINCFG_TYPE_DAT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static unsigned int pin_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int samsung_get_group_count(struct pinctrl_dev *pctldev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return pmx->nr_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) unsigned group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return pmx->pin_groups[group].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) unsigned group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) const unsigned **pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned *num_pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *pins = pmx->pin_groups[group].pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) *num_pins = pmx->pin_groups[group].num_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static int reserve_map(struct device *dev, struct pinctrl_map **map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned *reserved_maps, unsigned *num_maps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned reserve)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned old_num = *reserved_maps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned new_num = *num_maps + reserve;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct pinctrl_map *new_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (old_num >= new_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (!new_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *map = new_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) *reserved_maps = new_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned *num_maps, const char *group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) const char *function)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (WARN_ON(*num_maps == *reserved_maps))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) (*map)[*num_maps].data.mux.group = group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) (*map)[*num_maps].data.mux.function = function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) (*num_maps)++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static int add_map_configs(struct device *dev, struct pinctrl_map **map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned *reserved_maps, unsigned *num_maps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) const char *group, unsigned long *configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned num_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned long *dup_configs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (WARN_ON(*num_maps == *reserved_maps))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (!dup_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) (*map)[*num_maps].data.configs.group_or_pin = group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) (*map)[*num_maps].data.configs.configs = dup_configs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) (*map)[*num_maps].data.configs.num_configs = num_configs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) (*num_maps)++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int add_config(struct device *dev, unsigned long **configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) unsigned *num_configs, unsigned long config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned old_num = *num_configs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) unsigned new_num = old_num + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned long *new_configs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (!new_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) new_configs[old_num] = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) *configs = new_configs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) *num_configs = new_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct pinctrl_map *map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned num_maps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) for (i = 0; i < num_maps; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) kfree(map[i].data.configs.configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) kfree(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct pinctrl_map **map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) unsigned *reserved_maps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) unsigned *num_maps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) unsigned long config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) unsigned long *configs = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) unsigned num_configs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) unsigned reserve;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct property *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) const char *group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) bool has_func = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) ret = of_property_read_u32(np, "samsung,pin-function", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) has_func = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ret = of_property_read_u32(np, cfg_params[i].property, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) config = PINCFG_PACK(cfg_params[i].param, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ret = add_config(dev, &configs, &num_configs, config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* EINVAL=missing, which is fine since it's optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) } else if (ret != -EINVAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) dev_err(dev, "could not parse property %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) cfg_params[i].property);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) reserve = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (has_func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) reserve++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (num_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) reserve++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ret = of_property_count_strings(np, "samsung,pins");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev_err(dev, "could not parse property samsung,pins\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) reserve *= ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) of_property_for_each_string(np, "samsung,pins", prop, group) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (has_func) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ret = add_map_mux(map, reserved_maps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) num_maps, group, np->full_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (num_configs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ret = add_map_configs(dev, map, reserved_maps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) num_maps, group, configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) num_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) kfree(configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct device_node *np_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct pinctrl_map **map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) unsigned *num_maps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) unsigned reserved_maps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) drvdata = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) reserved_maps = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) *map = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) *num_maps = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) if (!of_get_child_count(np_config))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) np_config, map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) &reserved_maps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) num_maps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) for_each_child_of_node(np_config, np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) &reserved_maps, num_maps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) samsung_dt_free_map(pctldev, *map, *num_maps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /* Forward declaration which can be used by samsung_pin_dbg_show */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) unsigned long *config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const char * const reg_names[] = {"CON", "DAT", "PUD", "DRV", "CON_PDN",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) "PUD_PDN"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static void samsung_pin_dbg_show(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct seq_file *s, unsigned int pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) enum pincfg_type cfg_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) unsigned long config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) for (cfg_type = 0; cfg_type < PINCFG_TYPE_NUM; cfg_type++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) config = PINCFG_PACK(cfg_type, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ret = samsung_pinconf_get(pctldev, pin, &config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) seq_printf(s, " %s(0x%lx)", reg_names[cfg_type],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) PINCFG_UNPACK_VALUE(config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /* list of pinctrl callbacks for the pinctrl core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static const struct pinctrl_ops samsung_pctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .get_groups_count = samsung_get_group_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .get_group_name = samsung_get_group_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .get_group_pins = samsung_get_group_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .dt_node_to_map = samsung_dt_node_to_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .dt_free_map = samsung_dt_free_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .pin_dbg_show = samsung_pin_dbg_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* check if the selector is a valid pin function selector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) drvdata = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) return drvdata->nr_functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* return the name of the pin function specified */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) unsigned selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) drvdata = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return drvdata->pmx_functions[selector].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* return the groups associated for the specified function selector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) unsigned selector, const char * const **groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) unsigned * const num_groups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) drvdata = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) *groups = drvdata->pmx_functions[selector].groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) *num_groups = drvdata->pmx_functions[selector].num_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * given a pin number that is local to a pin controller, find out the pin bank
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * and the register base of the pin bank.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) unsigned pin, void __iomem **reg, u32 *offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) struct samsung_pin_bank **bank)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct samsung_pin_bank *b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) b = drvdata->pin_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) while ((pin >= b->pin_base) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ((b->pin_base + b->nr_pins - 1) < pin))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) b++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) *reg = b->pctl_base + b->pctl_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) *offset = pin - b->pin_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (bank)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) *bank = b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /* enable or disable a pinmux function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) unsigned group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) const struct samsung_pin_bank_type *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) struct samsung_pin_bank *bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) u32 mask, shift, data, pin_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) const struct samsung_pmx_func *func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) const struct samsung_pin_group *grp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) drvdata = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) func = &drvdata->pmx_functions[selector];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) grp = &drvdata->pin_groups[group];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) ®, &pin_offset, &bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) type = bank->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (shift >= 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /* Some banks have two config registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) shift -= 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) reg += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) spin_lock_irqsave(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) data &= ~(mask << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) data |= func->val << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) spin_unlock_irqrestore(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* enable a specified pinmux by writing to registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) unsigned selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) unsigned group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) samsung_pinmux_setup(pctldev, selector, group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /* list of pinmux callbacks for the pinmux vertical in pinctrl core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static const struct pinmux_ops samsung_pinmux_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .get_functions_count = samsung_get_functions_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .get_function_name = samsung_pinmux_get_fname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .get_function_groups = samsung_pinmux_get_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .set_mux = samsung_pinmux_set_mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /* set or get the pin config settings for a specified pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) unsigned long *config, bool set)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) const struct samsung_pin_bank_type *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) struct samsung_pin_bank *bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) void __iomem *reg_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) u32 data, width, pin_offset, mask, shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) u32 cfg_value, cfg_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) drvdata = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) pin_to_reg_bank(drvdata, pin - drvdata->pin_base, ®_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) &pin_offset, &bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) type = bank->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) width = type->fld_width[cfg_type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) cfg_reg = type->reg_offset[cfg_type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) spin_lock_irqsave(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) mask = (1 << width) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) shift = pin_offset * width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) data = readl(reg_base + cfg_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (set) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) cfg_value = PINCFG_UNPACK_VALUE(*config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) data &= ~(mask << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) data |= (cfg_value << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) writel(data, reg_base + cfg_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) data >>= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) data &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) *config = PINCFG_PACK(cfg_type, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) spin_unlock_irqrestore(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /* set the pin config settings for a specified pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) unsigned long *configs, unsigned num_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) for (i = 0; i < num_configs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) } /* for each config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* get the pin config settings for a specified pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) unsigned long *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return samsung_pinconf_rw(pctldev, pin, config, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* set the pin config settings for a specified pin group */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) unsigned group, unsigned long *configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) unsigned num_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) const unsigned int *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) unsigned int cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) drvdata = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) pins = drvdata->pin_groups[group].pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) /* get the pin config settings for a specified pin group */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) unsigned int group, unsigned long *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) const unsigned int *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) drvdata = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) pins = drvdata->pin_groups[group].pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) samsung_pinconf_get(pctldev, pins[0], config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static const struct pinconf_ops samsung_pinconf_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) .pin_config_get = samsung_pinconf_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .pin_config_set = samsung_pinconf_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .pin_config_group_get = samsung_pinconf_group_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .pin_config_group_set = samsung_pinconf_group_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * The samsung_gpio_set_vlaue() should be called with "bank->slock" held
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * to avoid race condition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static void samsung_gpio_set_value(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) struct samsung_pin_bank *bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) const struct samsung_pin_bank_type *type = bank->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) reg = bank->pctl_base + bank->pctl_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) data &= ~(1 << offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) data |= 1 << offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* gpiolib gpio_set callback function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) struct samsung_pin_bank *bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) spin_lock_irqsave(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) samsung_gpio_set_value(gc, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) spin_unlock_irqrestore(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) /* gpiolib gpio_get callback function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) struct samsung_pin_bank *bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) const struct samsung_pin_bank_type *type = bank->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) reg = bank->pctl_base + bank->pctl_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) data >>= offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) data &= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * The samsung_gpio_set_direction() should be called with "bank->slock" held
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * to avoid race condition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) * The calls to gpio_direction_output() and gpio_direction_input()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * leads to this function call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static int samsung_gpio_set_direction(struct gpio_chip *gc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) unsigned offset, bool input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) const struct samsung_pin_bank_type *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct samsung_pin_bank *bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) u32 data, mask, shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) type = bank->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) reg = bank->pctl_base + bank->pctl_offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) + type->reg_offset[PINCFG_TYPE_FUNC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (shift >= 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) /* Some banks have two config registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) shift -= 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) reg += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) data = readl(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) data &= ~(mask << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (!input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) data |= EXYNOS_PIN_FUNC_OUTPUT << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) writel(data, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) /* gpiolib gpio_direction_input callback function. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) struct samsung_pin_bank *bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) spin_lock_irqsave(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) ret = samsung_gpio_set_direction(gc, offset, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) spin_unlock_irqrestore(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) /* gpiolib gpio_direction_output callback function. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct samsung_pin_bank *bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) spin_lock_irqsave(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) samsung_gpio_set_value(gc, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) ret = samsung_gpio_set_direction(gc, offset, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) spin_unlock_irqrestore(&bank->slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * and a virtual IRQ, if not already present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) struct samsung_pin_bank *bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) unsigned int virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (!bank->irq_domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) virq = irq_create_mapping(bank->irq_domain, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) return (virq) ? : -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) static struct samsung_pin_group *samsung_pinctrl_create_groups(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) struct samsung_pinctrl_drv_data *drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) unsigned int *cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) struct pinctrl_desc *ctrldesc = &drvdata->pctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) struct samsung_pin_group *groups, *grp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) const struct pinctrl_pin_desc *pdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) groups = devm_kcalloc(dev, ctrldesc->npins, sizeof(*groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (!groups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) grp = groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) pdesc = ctrldesc->pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) grp->name = pdesc->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) grp->pins = &pdesc->number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) grp->num_pins = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) *cnt = ctrldesc->npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) return groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) static int samsung_pinctrl_create_function(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct samsung_pinctrl_drv_data *drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) struct device_node *func_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) struct samsung_pmx_func *func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) int npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) npins = of_property_count_strings(func_np, "samsung,pins");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) if (npins < 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) dev_err(dev, "invalid pin list in %pOFn node", func_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) func->name = func_np->full_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) func->groups = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (!func->groups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) for (i = 0; i < npins; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) const char *gname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) ret = of_property_read_string_index(func_np, "samsung,pins",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) i, &gname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) "failed to read pin name %d from %pOFn node\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) i, func_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) func->groups[i] = gname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) func->num_groups = npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) static struct samsung_pmx_func *samsung_pinctrl_create_functions(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) struct samsung_pinctrl_drv_data *drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) unsigned int *cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) struct samsung_pmx_func *functions, *func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) struct device_node *dev_np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) struct device_node *cfg_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) unsigned int func_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * Iterate over all the child nodes of the pin controller node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * and create pin groups and pin function lists.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) for_each_child_of_node(dev_np, cfg_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) struct device_node *func_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) if (!of_get_child_count(cfg_np)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) if (!of_find_property(cfg_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) "samsung,pin-function", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) ++func_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) for_each_child_of_node(cfg_np, func_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (!of_find_property(func_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) "samsung,pin-function", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) ++func_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) functions = devm_kcalloc(dev, func_cnt, sizeof(*functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) if (!functions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) func = functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * Iterate over all the child nodes of the pin controller node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) * and create pin groups and pin function lists.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) func_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) for_each_child_of_node(dev_np, cfg_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) struct device_node *func_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) if (!of_get_child_count(cfg_np)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) ret = samsung_pinctrl_create_function(dev, drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) cfg_np, func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) of_node_put(cfg_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (ret > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) ++func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) ++func_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) for_each_child_of_node(cfg_np, func_np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) ret = samsung_pinctrl_create_function(dev, drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) func_np, func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) of_node_put(func_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) of_node_put(cfg_np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) if (ret > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) ++func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) ++func_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) *cnt = func_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) return functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) * Parse the information about all the available pin groups and pin functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) * from device node of the pin-controller. A pin group is formed with all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) * the pins listed in the "samsung,pins" property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) struct samsung_pinctrl_drv_data *drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) struct samsung_pin_group *groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) struct samsung_pmx_func *functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) unsigned int grp_cnt = 0, func_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) if (IS_ERR(groups)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) dev_err(dev, "failed to parse pin groups\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) return PTR_ERR(groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) if (IS_ERR(functions)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) dev_err(dev, "failed to parse pin functions\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) return PTR_ERR(functions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) drvdata->pin_groups = groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) drvdata->nr_groups = grp_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) drvdata->pmx_functions = functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) drvdata->nr_functions = func_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) /* register the pinctrl interface with the pinctrl subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) static int samsung_pinctrl_register(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) struct samsung_pinctrl_drv_data *drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) struct pinctrl_desc *ctrldesc = &drvdata->pctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) struct pinctrl_pin_desc *pindesc, *pdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) struct samsung_pin_bank *pin_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) char *pin_names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) int pin, bank, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) ctrldesc->name = "samsung-pinctrl";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) ctrldesc->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) ctrldesc->pctlops = &samsung_pctrl_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) ctrldesc->pmxops = &samsung_pinmux_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) ctrldesc->confops = &samsung_pinconf_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) pindesc = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) drvdata->nr_pins, sizeof(*pindesc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) if (!pindesc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) ctrldesc->pins = pindesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) ctrldesc->npins = drvdata->nr_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) /* dynamically populate the pin number and pin name for pindesc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) pdesc->number = pin + drvdata->pin_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) * allocate space for storing the dynamically generated names for all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) * the pins which belong to this pin-controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) pin_names = devm_kzalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) array3_size(sizeof(char), PIN_NAME_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) drvdata->nr_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) if (!pin_names)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) /* for each pin, the name of the pin is pin-bank name + pin number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) for (bank = 0; bank < drvdata->nr_banks; bank++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) pin_bank = &drvdata->pin_banks[bank];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) for (pin = 0; pin < pin_bank->nr_pins; pin++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) sprintf(pin_names, "%s-%d", pin_bank->name, pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) pdesc = pindesc + pin_bank->pin_base + pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) pdesc->name = pin_names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) pin_names += PIN_NAME_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) ret = samsung_pinctrl_parse_dt(pdev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) if (IS_ERR(drvdata->pctl_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) dev_err(&pdev->dev, "could not register pinctrl driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) return PTR_ERR(drvdata->pctl_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) for (bank = 0; bank < drvdata->nr_banks; ++bank) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) pin_bank = &drvdata->pin_banks[bank];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) pin_bank->grange.name = pin_bank->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) pin_bank->grange.id = bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) pin_bank->grange.pin_base = drvdata->pin_base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) + pin_bank->pin_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) pin_bank->grange.base = pin_bank->grange.pin_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) pin_bank->grange.npins = pin_bank->nr_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) pin_bank->grange.gc = &pin_bank->gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) /* unregister the pinctrl interface with the pinctrl subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) static int samsung_pinctrl_unregister(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) struct samsung_pinctrl_drv_data *drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) struct samsung_pin_bank *bank = drvdata->pin_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) static const struct gpio_chip samsung_gpiolib_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) .request = gpiochip_generic_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) .free = gpiochip_generic_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) .set = samsung_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) .get = samsung_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) .direction_input = samsung_gpio_direction_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) .direction_output = samsung_gpio_direction_output,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) .to_irq = samsung_gpio_to_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) /* register the gpiolib interface with the gpiolib subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) static int samsung_gpiolib_register(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) struct samsung_pinctrl_drv_data *drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) struct samsung_pin_bank *bank = drvdata->pin_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) struct gpio_chip *gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) bank->gpio_chip = samsung_gpiolib_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) gc = &bank->gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) gc->base = bank->grange.base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) gc->ngpio = bank->nr_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) gc->parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) gc->of_node = bank->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) gc->label = bank->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) ret = devm_gpiochip_add_data(&pdev->dev, gc, bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) gc->label, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) static const struct samsung_pin_ctrl *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) struct device_node *node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) const struct samsung_pinctrl_of_match_data *of_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) id = of_alias_get_id(node, "pinctrl");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (id < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) dev_err(&pdev->dev, "failed to get alias id\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) of_data = of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) if (id >= of_data->num_ctrl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) dev_err(&pdev->dev, "invalid alias id %d\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) return &(of_data->ctrl[id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) static void samsung_banks_of_node_put(struct samsung_pinctrl_drv_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) struct samsung_pin_bank *bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) bank = d->pin_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) for (i = 0; i < d->nr_banks; ++i, ++bank)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) of_node_put(bank->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) /* retrieve the soc specific data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) static const struct samsung_pin_ctrl *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) struct device_node *node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) const struct samsung_pin_bank_data *bdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) const struct samsung_pin_ctrl *ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) struct samsung_pin_bank *bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) if (!ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) return ERR_PTR(-ENOENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) d->suspend = ctrl->suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) d->resume = ctrl->resume;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) d->nr_banks = ctrl->nr_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) sizeof(*d->pin_banks), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) if (!d->pin_banks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) for (i = 0; i < ctrl->nr_ext_resources + 1; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) res = platform_get_resource(pdev, IORESOURCE_MEM, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) dev_err(&pdev->dev, "failed to get mem%d resource\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) virt_base[i] = devm_ioremap(&pdev->dev, res->start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) if (!virt_base[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) dev_err(&pdev->dev, "failed to ioremap %pR\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) return ERR_PTR(-EIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) bank = d->pin_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) bdata = ctrl->pin_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) bank->type = bdata->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) bank->pctl_offset = bdata->pctl_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) bank->nr_pins = bdata->nr_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) bank->eint_func = bdata->eint_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) bank->eint_type = bdata->eint_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) bank->eint_mask = bdata->eint_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) bank->eint_offset = bdata->eint_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) bank->name = bdata->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) spin_lock_init(&bank->slock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) bank->drvdata = d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) bank->pin_base = d->nr_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) d->nr_pins += bank->nr_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) bank->eint_base = virt_base[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) bank->pctl_base = virt_base[bdata->pctl_res_idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) * Legacy platforms should provide only one resource with IO memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) * Store it as virt_base because legacy driver needs to access it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) * through samsung_pinctrl_drv_data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) d->virt_base = virt_base[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) for_each_child_of_node(node, np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) if (!of_find_property(np, "gpio-controller", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) bank = d->pin_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) for (i = 0; i < d->nr_banks; ++i, ++bank) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) if (of_node_name_eq(np, bank->name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) bank->of_node = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) d->pin_base = pin_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) pin_base += d->nr_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) return ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) static int samsung_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) struct samsung_pinctrl_drv_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) const struct samsung_pin_ctrl *ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) if (!drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) if (IS_ERR(ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) dev_err(&pdev->dev, "driver data not available\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) return PTR_ERR(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) drvdata->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) drvdata->irq = res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) if (ctrl->retention_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) drvdata->retention_ctrl = ctrl->retention_data->init(drvdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) ctrl->retention_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) if (IS_ERR(drvdata->retention_ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) ret = PTR_ERR(drvdata->retention_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) goto err_put_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) ret = samsung_pinctrl_register(pdev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) goto err_put_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) ret = samsung_gpiolib_register(pdev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) goto err_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) if (ctrl->eint_gpio_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) ctrl->eint_gpio_init(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (ctrl->eint_wkup_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) ctrl->eint_wkup_init(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) platform_set_drvdata(pdev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) err_unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) samsung_pinctrl_unregister(pdev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) err_put_banks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) samsung_banks_of_node_put(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) * samsung_pinctrl_suspend - save pinctrl state for suspend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) * Save data for all banks handled by this device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) for (i = 0; i < drvdata->nr_banks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) void __iomem *reg = bank->pctl_base + bank->pctl_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) const u8 *offs = bank->type->reg_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) const u8 *widths = bank->type->fld_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) enum pincfg_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) /* Registers without a powerdown config aren't lost */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) if (!widths[PINCFG_TYPE_CON_PDN])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) for (type = 0; type < PINCFG_TYPE_NUM; type++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) if (widths[type])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) bank->pm_save[type] = readl(reg + offs[type]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) /* Some banks have two config registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) bank->pm_save[PINCFG_TYPE_NUM] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) pr_debug("Save %s @ %p (con %#010x %08x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) bank->name, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) bank->pm_save[PINCFG_TYPE_FUNC],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) bank->pm_save[PINCFG_TYPE_NUM]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) reg, bank->pm_save[PINCFG_TYPE_FUNC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) if (drvdata->suspend)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) drvdata->suspend(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) drvdata->retention_ctrl->enable(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) * samsung_pinctrl_resume - restore pinctrl state from suspend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) * Restore one of the banks that was saved during suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) * We don't bother doing anything complicated to avoid glitching lines since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) * we're called before pad retention is turned off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) if (drvdata->resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) drvdata->resume(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) for (i = 0; i < drvdata->nr_banks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) void __iomem *reg = bank->pctl_base + bank->pctl_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) const u8 *offs = bank->type->reg_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) const u8 *widths = bank->type->fld_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) enum pincfg_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) /* Registers without a powerdown config aren't lost */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) if (!widths[PINCFG_TYPE_CON_PDN])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) /* Some banks have two config registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) bank->name, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) readl(reg + offs[PINCFG_TYPE_FUNC]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) bank->pm_save[PINCFG_TYPE_FUNC],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) bank->pm_save[PINCFG_TYPE_NUM]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) writel(bank->pm_save[PINCFG_TYPE_NUM],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) reg + offs[PINCFG_TYPE_FUNC] + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) bank->pm_save[PINCFG_TYPE_FUNC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) for (type = 0; type < PINCFG_TYPE_NUM; type++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) if (widths[type])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) writel(bank->pm_save[type], reg + offs[type]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) drvdata->retention_ctrl->disable(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) static const struct of_device_id samsung_pinctrl_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) #ifdef CONFIG_PINCTRL_EXYNOS_ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) { .compatible = "samsung,exynos3250-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) .data = &exynos3250_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) { .compatible = "samsung,exynos4210-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) .data = &exynos4210_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) { .compatible = "samsung,exynos4x12-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) .data = &exynos4x12_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) { .compatible = "samsung,exynos5250-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) .data = &exynos5250_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) { .compatible = "samsung,exynos5260-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) .data = &exynos5260_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) { .compatible = "samsung,exynos5410-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) .data = &exynos5410_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) { .compatible = "samsung,exynos5420-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) .data = &exynos5420_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) { .compatible = "samsung,s5pv210-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) .data = &s5pv210_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) #ifdef CONFIG_PINCTRL_EXYNOS_ARM64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) { .compatible = "samsung,exynos5433-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) .data = &exynos5433_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) { .compatible = "samsung,exynos7-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) .data = &exynos7_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) #ifdef CONFIG_PINCTRL_S3C64XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) { .compatible = "samsung,s3c64xx-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) .data = &s3c64xx_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) #ifdef CONFIG_PINCTRL_S3C24XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) { .compatible = "samsung,s3c2412-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) .data = &s3c2412_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) { .compatible = "samsung,s3c2416-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) .data = &s3c2416_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) { .compatible = "samsung,s3c2440-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) .data = &s3c2440_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) { .compatible = "samsung,s3c2450-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) .data = &s3c2450_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) static const struct dev_pm_ops samsung_pinctrl_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) samsung_pinctrl_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) static struct platform_driver samsung_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) .probe = samsung_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) .name = "samsung-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) .of_match_table = samsung_pinctrl_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) .suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) .pm = &samsung_pinctrl_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) static int __init samsung_pinctrl_drv_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) return platform_driver_register(&samsung_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) postcore_initcall(samsung_pinctrl_drv_register);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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