^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SH-X3 prototype CPU pinmux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <cpu/shx3.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "sh_pfc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) PINMUX_RESERVED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) PINMUX_DATA_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) PH5_DATA, PH4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) PINMUX_DATA_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) PINMUX_INPUT_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) PA7_IN, PA6_IN, PA5_IN, PA4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) PA3_IN, PA2_IN, PA1_IN, PA0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) PB7_IN, PB6_IN, PB5_IN, PB4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) PB3_IN, PB2_IN, PB1_IN, PB0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) PC7_IN, PC6_IN, PC5_IN, PC4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) PC3_IN, PC2_IN, PC1_IN, PC0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) PD7_IN, PD6_IN, PD5_IN, PD4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) PD3_IN, PD2_IN, PD1_IN, PD0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) PE7_IN, PE6_IN, PE5_IN, PE4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) PE3_IN, PE2_IN, PE1_IN, PE0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) PF7_IN, PF6_IN, PF5_IN, PF4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) PF3_IN, PF2_IN, PF1_IN, PF0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) PG7_IN, PG6_IN, PG5_IN, PG4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) PG3_IN, PG2_IN, PG1_IN, PG0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) PH5_IN, PH4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) PH3_IN, PH2_IN, PH1_IN, PH0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PINMUX_INPUT_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PINMUX_OUTPUT_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PH5_OUT, PH4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) PINMUX_OUTPUT_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PINMUX_FUNCTION_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PA7_FN, PA6_FN, PA5_FN, PA4_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PA3_FN, PA2_FN, PA1_FN, PA0_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PB7_FN, PB6_FN, PB5_FN, PB4_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PB3_FN, PB2_FN, PB1_FN, PB0_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PC7_FN, PC6_FN, PC5_FN, PC4_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PC3_FN, PC2_FN, PC1_FN, PC0_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PD7_FN, PD6_FN, PD5_FN, PD4_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PD3_FN, PD2_FN, PD1_FN, PD0_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PE7_FN, PE6_FN, PE5_FN, PE4_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PE3_FN, PE2_FN, PE1_FN, PE0_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PF7_FN, PF6_FN, PF5_FN, PF4_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PF3_FN, PF2_FN, PF1_FN, PF0_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PG7_FN, PG6_FN, PG5_FN, PG4_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PG3_FN, PG2_FN, PG1_FN, PG0_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PH5_FN, PH4_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PH3_FN, PH2_FN, PH1_FN, PH0_FN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINMUX_FUNCTION_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINMUX_MARK_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) D31_MARK, D30_MARK, D29_MARK, D28_MARK, D27_MARK, D26_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) D25_MARK, D24_MARK, D23_MARK, D22_MARK, D21_MARK, D20_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) D19_MARK, D18_MARK, D17_MARK, D16_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) BACK_MARK, BREQ_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) WE3_MARK, WE2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) CS6_MARK, CS5_MARK, CS4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) CLKOUTENB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) DACK3_MARK, DACK2_MARK, DACK1_MARK, DACK0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) DREQ3_MARK, DREQ2_MARK, DREQ1_MARK, DREQ0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) DRAK3_MARK, DRAK2_MARK, DRAK1_MARK, DRAK0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) SCK3_MARK, SCK2_MARK, SCK1_MARK, SCK0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) IRL3_MARK, IRL2_MARK, IRL1_MARK, IRL0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) TXD3_MARK, TXD2_MARK, TXD1_MARK, TXD0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) RXD3_MARK, RXD2_MARK, RXD1_MARK, RXD0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) CE2B_MARK, CE2A_MARK, IOIS16_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) STATUS1_MARK, STATUS0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) IRQOUT_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINMUX_MARK_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static const u16 pinmux_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* PA GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* PB GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* PC GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* PD GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /* PE GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* PF GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* PG GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* PH GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* PA FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PINMUX_DATA(D31_MARK, PA7_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) PINMUX_DATA(D30_MARK, PA6_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PINMUX_DATA(D29_MARK, PA5_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PINMUX_DATA(D28_MARK, PA4_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PINMUX_DATA(D27_MARK, PA3_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PINMUX_DATA(D26_MARK, PA2_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) PINMUX_DATA(D25_MARK, PA1_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PINMUX_DATA(D24_MARK, PA0_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* PB FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PINMUX_DATA(D23_MARK, PB7_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PINMUX_DATA(D22_MARK, PB6_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PINMUX_DATA(D21_MARK, PB5_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) PINMUX_DATA(D20_MARK, PB4_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PINMUX_DATA(D19_MARK, PB3_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) PINMUX_DATA(D18_MARK, PB2_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PINMUX_DATA(D17_MARK, PB1_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) PINMUX_DATA(D16_MARK, PB0_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* PC FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) PINMUX_DATA(BACK_MARK, PC7_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) PINMUX_DATA(BREQ_MARK, PC6_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) PINMUX_DATA(WE3_MARK, PC5_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) PINMUX_DATA(WE2_MARK, PC4_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) PINMUX_DATA(CS6_MARK, PC3_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) PINMUX_DATA(CS5_MARK, PC2_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) PINMUX_DATA(CS4_MARK, PC1_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) PINMUX_DATA(CLKOUTENB_MARK, PC0_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* PD FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) PINMUX_DATA(DACK3_MARK, PD7_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) PINMUX_DATA(DACK2_MARK, PD6_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) PINMUX_DATA(DACK1_MARK, PD5_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) PINMUX_DATA(DACK0_MARK, PD4_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) PINMUX_DATA(DREQ3_MARK, PD3_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) PINMUX_DATA(DREQ2_MARK, PD2_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) PINMUX_DATA(DREQ1_MARK, PD1_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) PINMUX_DATA(DREQ0_MARK, PD0_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* PE FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) PINMUX_DATA(IRQ3_MARK, PE7_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) PINMUX_DATA(IRQ2_MARK, PE6_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) PINMUX_DATA(IRQ1_MARK, PE5_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) PINMUX_DATA(IRQ0_MARK, PE4_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) PINMUX_DATA(DRAK3_MARK, PE3_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) PINMUX_DATA(DRAK2_MARK, PE2_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) PINMUX_DATA(DRAK1_MARK, PE1_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) PINMUX_DATA(DRAK0_MARK, PE0_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* PF FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) PINMUX_DATA(SCK3_MARK, PF7_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) PINMUX_DATA(SCK2_MARK, PF6_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) PINMUX_DATA(SCK1_MARK, PF5_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) PINMUX_DATA(SCK0_MARK, PF4_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) PINMUX_DATA(IRL3_MARK, PF3_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) PINMUX_DATA(IRL2_MARK, PF2_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) PINMUX_DATA(IRL1_MARK, PF1_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) PINMUX_DATA(IRL0_MARK, PF0_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* PG FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) PINMUX_DATA(TXD3_MARK, PG7_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) PINMUX_DATA(TXD2_MARK, PG6_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) PINMUX_DATA(TXD1_MARK, PG5_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) PINMUX_DATA(TXD0_MARK, PG4_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) PINMUX_DATA(RXD3_MARK, PG3_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) PINMUX_DATA(RXD2_MARK, PG2_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) PINMUX_DATA(RXD1_MARK, PG1_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) PINMUX_DATA(RXD0_MARK, PG0_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* PH FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) PINMUX_DATA(CE2B_MARK, PH5_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) PINMUX_DATA(CE2A_MARK, PH4_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) PINMUX_DATA(IOIS16_MARK, PH3_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) PINMUX_DATA(STATUS1_MARK, PH2_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) PINMUX_DATA(STATUS0_MARK, PH1_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) PINMUX_DATA(IRQOUT_MARK, PH0_FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static const struct sh_pfc_pin pinmux_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* PA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) PINMUX_GPIO(PA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) PINMUX_GPIO(PA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) PINMUX_GPIO(PA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) PINMUX_GPIO(PA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) PINMUX_GPIO(PA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) PINMUX_GPIO(PA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) PINMUX_GPIO(PA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) PINMUX_GPIO(PA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /* PB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) PINMUX_GPIO(PB7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) PINMUX_GPIO(PB6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) PINMUX_GPIO(PB5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) PINMUX_GPIO(PB4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) PINMUX_GPIO(PB3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) PINMUX_GPIO(PB2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) PINMUX_GPIO(PB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) PINMUX_GPIO(PB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* PC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) PINMUX_GPIO(PC7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) PINMUX_GPIO(PC6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) PINMUX_GPIO(PC5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) PINMUX_GPIO(PC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) PINMUX_GPIO(PC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) PINMUX_GPIO(PC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) PINMUX_GPIO(PC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) PINMUX_GPIO(PC0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* PD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) PINMUX_GPIO(PD7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) PINMUX_GPIO(PD6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) PINMUX_GPIO(PD5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) PINMUX_GPIO(PD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) PINMUX_GPIO(PD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) PINMUX_GPIO(PD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) PINMUX_GPIO(PD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) PINMUX_GPIO(PD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* PE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) PINMUX_GPIO(PE7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) PINMUX_GPIO(PE6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) PINMUX_GPIO(PE5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) PINMUX_GPIO(PE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) PINMUX_GPIO(PE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) PINMUX_GPIO(PE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) PINMUX_GPIO(PE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) PINMUX_GPIO(PE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* PF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) PINMUX_GPIO(PF7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) PINMUX_GPIO(PF6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) PINMUX_GPIO(PF5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) PINMUX_GPIO(PF4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) PINMUX_GPIO(PF3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) PINMUX_GPIO(PF2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) PINMUX_GPIO(PF1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) PINMUX_GPIO(PF0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /* PG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) PINMUX_GPIO(PG7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) PINMUX_GPIO(PG6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) PINMUX_GPIO(PG5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) PINMUX_GPIO(PG4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) PINMUX_GPIO(PG3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) PINMUX_GPIO(PG2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) PINMUX_GPIO(PG1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) PINMUX_GPIO(PG0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* PH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) PINMUX_GPIO(PH5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) PINMUX_GPIO(PH4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) PINMUX_GPIO(PH3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) PINMUX_GPIO(PH2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) PINMUX_GPIO(PH1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) PINMUX_GPIO(PH0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static const struct pinmux_func pinmux_func_gpios[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* FN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) GPIO_FN(D31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) GPIO_FN(D30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) GPIO_FN(D29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) GPIO_FN(D28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) GPIO_FN(D27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) GPIO_FN(D26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) GPIO_FN(D25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) GPIO_FN(D24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) GPIO_FN(D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) GPIO_FN(D22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) GPIO_FN(D21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) GPIO_FN(D20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) GPIO_FN(D19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) GPIO_FN(D18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) GPIO_FN(D17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) GPIO_FN(D16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) GPIO_FN(BACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) GPIO_FN(BREQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) GPIO_FN(WE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) GPIO_FN(WE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) GPIO_FN(CS6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) GPIO_FN(CS5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) GPIO_FN(CS4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) GPIO_FN(CLKOUTENB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) GPIO_FN(DACK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) GPIO_FN(DACK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) GPIO_FN(DACK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) GPIO_FN(DACK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) GPIO_FN(DREQ3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) GPIO_FN(DREQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) GPIO_FN(DREQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) GPIO_FN(DREQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) GPIO_FN(IRQ3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) GPIO_FN(IRQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) GPIO_FN(IRQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) GPIO_FN(IRQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) GPIO_FN(DRAK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) GPIO_FN(DRAK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) GPIO_FN(DRAK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) GPIO_FN(DRAK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) GPIO_FN(SCK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) GPIO_FN(SCK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) GPIO_FN(SCK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) GPIO_FN(SCK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) GPIO_FN(IRL3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) GPIO_FN(IRL2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) GPIO_FN(IRL1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) GPIO_FN(IRL0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) GPIO_FN(TXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) GPIO_FN(TXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) GPIO_FN(TXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) GPIO_FN(TXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) GPIO_FN(RXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) GPIO_FN(RXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) GPIO_FN(RXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) GPIO_FN(RXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) GPIO_FN(CE2B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) GPIO_FN(CE2A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) GPIO_FN(IOIS16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) GPIO_FN(STATUS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) GPIO_FN(STATUS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) GPIO_FN(IRQOUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static const struct pinmux_cfg_reg pinmux_config_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) PA7_FN, PA7_OUT, PA7_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) PA6_FN, PA6_OUT, PA6_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) PA5_FN, PA5_OUT, PA5_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) PA4_FN, PA4_OUT, PA4_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) PA3_FN, PA3_OUT, PA3_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) PA2_FN, PA2_OUT, PA2_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) PA1_FN, PA1_OUT, PA1_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) PA0_FN, PA0_OUT, PA0_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) PB7_FN, PB7_OUT, PB7_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) PB6_FN, PB6_OUT, PB6_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) PB5_FN, PB5_OUT, PB5_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) PB4_FN, PB4_OUT, PB4_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) PB3_FN, PB3_OUT, PB3_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) PB2_FN, PB2_OUT, PB2_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) PB1_FN, PB1_OUT, PB1_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) PB0_FN, PB0_OUT, PB0_IN, 0, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) PC7_FN, PC7_OUT, PC7_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) PC6_FN, PC6_OUT, PC6_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) PC5_FN, PC5_OUT, PC5_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) PC4_FN, PC4_OUT, PC4_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) PC3_FN, PC3_OUT, PC3_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) PC2_FN, PC2_OUT, PC2_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) PC1_FN, PC1_OUT, PC1_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) PC0_FN, PC0_OUT, PC0_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) PD7_FN, PD7_OUT, PD7_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) PD6_FN, PD6_OUT, PD6_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) PD5_FN, PD5_OUT, PD5_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) PD4_FN, PD4_OUT, PD4_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) PD3_FN, PD3_OUT, PD3_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) PD2_FN, PD2_OUT, PD2_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) PD1_FN, PD1_OUT, PD1_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) PD0_FN, PD0_OUT, PD0_IN, 0, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) PE7_FN, PE7_OUT, PE7_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) PE6_FN, PE6_OUT, PE6_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) PE5_FN, PE5_OUT, PE5_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) PE4_FN, PE4_OUT, PE4_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) PE3_FN, PE3_OUT, PE3_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) PE2_FN, PE2_OUT, PE2_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) PE1_FN, PE1_OUT, PE1_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) PE0_FN, PE0_OUT, PE0_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) PF7_FN, PF7_OUT, PF7_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) PF6_FN, PF6_OUT, PF6_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) PF5_FN, PF5_OUT, PF5_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) PF4_FN, PF4_OUT, PF4_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) PF3_FN, PF3_OUT, PF3_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) PF2_FN, PF2_OUT, PF2_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) PF1_FN, PF1_OUT, PF1_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) PF0_FN, PF0_OUT, PF0_IN, 0, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) PG7_FN, PG7_OUT, PG7_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) PG6_FN, PG6_OUT, PG6_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) PG5_FN, PG5_OUT, PG5_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) PG4_FN, PG4_OUT, PG4_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) PG3_FN, PG3_OUT, PG3_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) PG2_FN, PG2_OUT, PG2_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) PG1_FN, PG1_OUT, PG1_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) PG0_FN, PG0_OUT, PG0_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) PH5_FN, PH5_OUT, PH5_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) PH4_FN, PH4_OUT, PH4_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) PH3_FN, PH3_OUT, PH3_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) PH2_FN, PH2_OUT, PH2_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) PH1_FN, PH1_OUT, PH1_IN, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) PH0_FN, PH0_OUT, PH0_IN, 0, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static const struct pinmux_data_reg pinmux_data_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) { PINMUX_DATA_REG("PABDR", 0xffc70010, 32, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) { PINMUX_DATA_REG("PCDDR", 0xffc70014, 32, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) { PINMUX_DATA_REG("PEFDR", 0xffc70018, 32, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) { PINMUX_DATA_REG("PGHDR", 0xffc7001c, 32, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 0, 0, PH5_DATA, PH4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) const struct sh_pfc_soc_info shx3_pinmux_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .name = "shx3_pfc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .pins = pinmux_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .nr_pins = ARRAY_SIZE(pinmux_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .func_gpios = pinmux_func_gpios,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .pinmux_data = pinmux_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .pinmux_data_size = ARRAY_SIZE(pinmux_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .cfg_regs = pinmux_config_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .data_regs = pinmux_data_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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