^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <cpu/sh7722.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include "sh_pfc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) PINMUX_RESERVED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) PINMUX_DATA_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) PTC7_DATA, PTC5_DATA, PTC4_DATA, PTC3_DATA, PTC2_DATA, PTC0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, PTE1_DATA, PTE0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) PTF6_DATA, PTF5_DATA, PTF4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) PTG4_DATA, PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ1_DATA, PTJ0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PTK6_DATA, PTK5_DATA, PTK4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) PTR4_DATA, PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) PTW6_DATA, PTW5_DATA, PTW4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) PTX6_DATA, PTX5_DATA, PTX4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) PTY6_DATA, PTY5_DATA, PTY4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) PTZ5_DATA, PTZ4_DATA, PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) PINMUX_DATA_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) PINMUX_INPUT_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PTC7_IN, PTC5_IN, PTC4_IN, PTC3_IN, PTC2_IN, PTC0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, PTD3_IN, PTD2_IN, PTD1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, PTE1_IN, PTE0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PTF6_IN, PTF5_IN, PTF4_IN, PTF3_IN, PTF2_IN, PTF1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PTH6_IN, PTH5_IN, PTH1_IN, PTH0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PTJ1_IN, PTJ0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PTK6_IN, PTK5_IN, PTK4_IN, PTK3_IN, PTK2_IN, PTK0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PTQ5_IN, PTQ4_IN, PTQ3_IN, PTQ2_IN, PTQ0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PTR2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PTS4_IN, PTS2_IN, PTS1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PTW6_IN, PTW4_IN, PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PTX6_IN, PTX5_IN, PTX4_IN, PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PTY5_IN, PTY4_IN, PTY3_IN, PTY2_IN, PTY0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PTZ5_IN, PTZ4_IN, PTZ3_IN, PTZ2_IN, PTZ1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PINMUX_INPUT_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PINMUX_OUTPUT_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PTA7_OUT, PTA5_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PTC4_OUT, PTC3_OUT, PTC2_OUT, PTC0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PTD6_OUT, PTD5_OUT, PTD4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, PTE1_OUT, PTE0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PTF6_OUT, PTF5_OUT, PTF4_OUT, PTF3_OUT, PTF2_OUT, PTF0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PTG4_OUT, PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ1_OUT, PTJ0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PTK6_OUT, PTK5_OUT, PTK4_OUT, PTK3_OUT, PTK1_OUT, PTK0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PTR4_OUT, PTR3_OUT, PTR1_OUT, PTR0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PTS3_OUT, PTS2_OUT, PTS0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PTW5_OUT, PTW4_OUT, PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PTX6_OUT, PTX5_OUT, PTX4_OUT, PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PTY5_OUT, PTY4_OUT, PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINMUX_OUTPUT_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINMUX_MARK_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) SCIF0_TXD_MARK, SCIF0_RXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) SCIF1_TXD_MARK, SCIF1_RXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) SCIF2_TXD_MARK, SCIF2_RXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) SCIF2_RTS_MARK, SCIF2_CTS_MARK, SCIF2_SCK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) SIOTXD_MARK, SIORXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) SIOD_MARK, SIOSTRB0_MARK, SIOSTRB1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) SIOSCK_MARK, SIOMCK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) VIO_D15_MARK, VIO_D14_MARK, VIO_D13_MARK, VIO_D12_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) VIO_D11_MARK, VIO_D10_MARK, VIO_D9_MARK, VIO_D8_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) VIO_D7_MARK, VIO_D6_MARK, VIO_D5_MARK, VIO_D4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) VIO_D3_MARK, VIO_D2_MARK, VIO_D1_MARK, VIO_D0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK, VIO_FLD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) VIO_CKO_MARK, VIO_STEX_MARK, VIO_STEM_MARK, VIO_VD2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) VIO_HD2_MARK, VIO_CLK2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) LCDD23_MARK, LCDD22_MARK, LCDD21_MARK, LCDD20_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) LCDD19_MARK, LCDD18_MARK, LCDD17_MARK, LCDD16_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) LCDD15_MARK, LCDD14_MARK, LCDD13_MARK, LCDD12_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) LCDD11_MARK, LCDD10_MARK, LCDD9_MARK, LCDD8_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) LCDD7_MARK, LCDD6_MARK, LCDD5_MARK, LCDD4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) LCDD3_MARK, LCDD2_MARK, LCDD1_MARK, LCDD0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) LCDLCLK_MARK, LCDDON_MARK, LCDVCPWC_MARK, LCDVEPWC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) LCDVSYN_MARK, LCDDCK_MARK, LCDHSYN_MARK, LCDDISP_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) LCDRS_MARK, LCDCS_MARK, LCDWR_MARK, LCDRD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) LCDDON2_MARK, LCDVCPWC2_MARK, LCDVEPWC2_MARK, LCDVSYN2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) LCDCS2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) IOIS16_MARK, A25_MARK, A24_MARK, A23_MARK, A22_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) BS_MARK, CS6B_CE1B_MARK, WAIT_MARK, CS6A_CE2B_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) HPD63_MARK, HPD62_MARK, HPD61_MARK, HPD60_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) HPD59_MARK, HPD58_MARK, HPD57_MARK, HPD56_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) HPD55_MARK, HPD54_MARK, HPD53_MARK, HPD52_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) HPD51_MARK, HPD50_MARK, HPD49_MARK, HPD48_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) HPDQM7_MARK, HPDQM6_MARK, HPDQM5_MARK, HPDQM4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) IRQ4_MARK, IRQ5_MARK, IRQ6_MARK, IRQ7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) SDHICD_MARK, SDHIWP_MARK, SDHID3_MARK, SDHID2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) SDHID1_MARK, SDHID0_MARK, SDHICMD_MARK, SDHICLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) SIUAOLR_MARK, SIUAOBT_MARK, SIUAISLD_MARK, SIUAILR_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) SIUAIBT_MARK, SIUAOSLD_MARK, SIUMCKA_MARK, SIUFCKA_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) SIUBOLR_MARK, SIUBOBT_MARK, SIUBISLD_MARK, SIUBILR_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) SIUBIBT_MARK, SIUBOSLD_MARK, SIUMCKB_MARK, SIUFCKB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) AUDSYNC_MARK, AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) DACK_MARK, DREQ0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) DV_CLKI_MARK, DV_CLK_MARK, DV_HSYNC_MARK, DV_VSYNC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) DV_D15_MARK, DV_D14_MARK, DV_D13_MARK, DV_D12_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) DV_D11_MARK, DV_D10_MARK, DV_D9_MARK, DV_D8_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) DV_D7_MARK, DV_D6_MARK, DV_D5_MARK, DV_D4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) DV_D3_MARK, DV_D2_MARK, DV_D1_MARK, DV_D0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) STATUS0_MARK, PDSTATUS_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) SIOF0_MCK_MARK, SIOF0_SCK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) SIOF0_SYNC_MARK, SIOF0_SS1_MARK, SIOF0_SS2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) SIOF0_TXD_MARK, SIOF0_RXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) SIOF1_MCK_MARK, SIOF1_SCK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) SIOF1_SYNC_MARK, SIOF1_SS1_MARK, SIOF1_SS2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) SIOF1_TXD_MARK, SIOF1_RXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) TS_SDAT_MARK, TS_SCK_MARK, TS_SDEN_MARK, TS_SPSYNC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) IRDA_IN_MARK, IRDA_OUT_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) TPUTO_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) FCE_MARK, NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, FCDE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) FOE_MARK, FSC_MARK, FWE_MARK, FRB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, KEYIN4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) KEYOUT4_IN6_MARK, KEYOUT5_IN5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PINMUX_MARK_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PINMUX_FUNCTION_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) VIO_D7_SCIF1_SCK, VIO_D6_SCIF1_RXD, VIO_D5_SCIF1_TXD, VIO_D4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) VIO_D3, VIO_D2, VIO_D1, VIO_D0_LCDLCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) HPD55, HPD54, HPD53, HPD52, HPD51, HPD50, HPD49, HPD48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) IOIS16, HPDQM7, HPDQM6, HPDQM5, HPDQM4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) SDHICD, SDHIWP, SDHID3, IRQ2_SDHID2, SDHID1, SDHID0, SDHICMD, SDHICLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) A25, A24, A23, A22, IRQ5, IRQ4_BS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) PTF6, SIOSCK_SIUBOBT, SIOSTRB1_SIUBOLR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) SIOSTRB0_SIUBIBT, SIOD_SIUBILR, SIORXD_SIUBISLD, SIOTXD_SIUBOSLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) AUDSYNC, AUDATA3, AUDATA2, AUDATA1, AUDATA0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) LCDVCPWC_LCDVCPWC2, LCDVSYN2_DACK, LCDVSYN, LCDDISP_LCDRS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) LCDHSYN_LCDCS, LCDDON_LCDDON2, LCDD17_DV_HSYNC, LCDD16_DV_VSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) STATUS0, PDSTATUS, IRQ1, IRQ0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) SIUAILR_SIOF1_SS2, SIUAIBT_SIOF1_SS1, SIUAOLR_SIOF1_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) SIUAOBT_SIOF1_SCK, SIUAISLD_SIOF1_RXD, SIUAOSLD_SIOF1_TXD, PTK0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) LCDD15_DV_D15, LCDD14_DV_D14, LCDD13_DV_D13, LCDD12_DV_D12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) LCDD11_DV_D11, LCDD10_DV_D10, LCDD9_DV_D9, LCDD8_DV_D8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) LCDD7_DV_D7, LCDD6_DV_D6, LCDD5_DV_D5, LCDD4_DV_D4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) LCDD3_DV_D3, LCDD2_DV_D2, LCDD1_DV_D1, LCDD0_DV_D0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) HPD63, HPD62, HPD61, HPD60, HPD59, HPD58, HPD57, HPD56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) SIOF0_SS2_SIM_RST, SIOF0_SS1_TS_SPSYNC, SIOF0_SYNC_TS_SDEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) SIOF0_SCK_TS_SCK, PTQ2, PTQ1, PTQ0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) LCDRD, CS6B_CE1B_LCDCS2, WAIT, LCDDCK_LCDWR, LCDVEPWC_LCDVEPWC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) SCIF0_CTS_SIUAISPD, SCIF0_RTS_SIUAOSPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) SCIF0_SCK_TPUTO, SCIF0_RXD, SCIF0_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) FOE_VIO_VD2, FWE, FSC, DREQ0, FCDE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) NAF2_VIO_D10, NAF1_VIO_D9, NAF0_VIO_D8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) FRB_VIO_CLK2, FCE_VIO_HD2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) NAF7_VIO_D15, NAF6_VIO_D14, NAF5_VIO_D13, NAF4_VIO_D12, NAF3_VIO_D11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) VIO_FLD_SCIF2_CTS, VIO_CKO_SCIF2_RTS, VIO_STEX_SCIF2_SCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) VIO_STEM_SCIF2_TXD, VIO_HD_SCIF2_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) VIO_VD_SCIF1_CTS, VIO_CLK_SCIF1_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) CS6A_CE2B, LCDD23, LCDD22, LCDD21, LCDD20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) LCDD19_DV_CLKI, LCDD18_DV_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) KEYOUT5_IN5, KEYOUT4_IN6, KEYOUT3, KEYOUT2, KEYOUT1, KEYOUT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) KEYIN4_IRQ7, KEYIN3, KEYIN2, KEYIN1, KEYIN0_IRQ6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PSA15_KEYIN0, PSA15_IRQ6, PSA14_KEYIN4, PSA14_IRQ7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PSA9_IRQ4, PSA9_BS, PSA4_IRQ2, PSA4_SDHID2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) PSB15_SIOTXD, PSB15_SIUBOSLD, PSB14_SIORXD, PSB14_SIUBISLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PSB13_SIOD, PSB13_SIUBILR, PSB12_SIOSTRB0, PSB12_SIUBIBT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) PSB11_SIOSTRB1, PSB11_SIUBOLR, PSB10_SIOSCK, PSB10_SIUBOBT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PSB9_SIOMCK, PSB9_SIUMCKB, PSB8_SIOF0_MCK, PSB8_IRQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) PSB7_SIOF0_TXD, PSB7_IRDA_OUT, PSB6_SIOF0_RXD, PSB6_IRDA_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) PSB5_SIOF0_SCK, PSB5_TS_SCK, PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) PSB3_SIOF0_SS1, PSB3_TS_SPSYNC, PSB2_SIOF0_SS2, PSB2_SIM_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) PSB1_SIUMCKA, PSB1_SIOF1_MCK, PSB0_SIUAOSLD, PSB0_SIOF1_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) PSC15_SIUAISLD, PSC15_SIOF1_RXD, PSC14_SIUAOBT, PSC14_SIOF1_SCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) PSC13_SIUAOLR, PSC13_SIOF1_SYNC, PSC12_SIUAIBT, PSC12_SIOF1_SS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) PSC11_SIUAILR, PSC11_SIOF1_SS2, PSC0_NAF, PSC0_VIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) PSD13_VIO, PSD13_SCIF2, PSD12_VIO, PSD12_SCIF1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) PSD11_VIO, PSD11_SCIF1, PSD10_VIO_D0, PSD10_LCDLCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB, PSD8_SCIF0_SCK, PSD8_TPUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) PSD7_SCIF0_RTS, PSD7_SIUAOSPD, PSD6_SCIF0_CTS, PSD6_SIUAISPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) PSD5_CS6B_CE1B, PSD5_LCDCS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) PSD2_LCDDON, PSD2_LCDDON2, PSD0_LCDD19_LCDD0, PSD0_DV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT, PSE12_LCDVSYN2, PSE12_DACK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) PSE3_FLCTL, PSE3_VIO, PSE2_NAF2, PSE2_VIO_D10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) PSE1_NAF1, PSE1_VIO_D9, PSE0_NAF0, PSE0_VIO_D8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) HIZA14_KEYSC, HIZA14_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) HIZA10_NAF, HIZA10_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) HIZA9_VIO, HIZA9_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) HIZA8_LCDC, HIZA8_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) HIZA7_LCDC, HIZA7_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) HIZA6_LCDC, HIZA6_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) HIZB4_SIUA, HIZB4_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) HIZB1_VIO, HIZB1_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) HIZB0_VIO, HIZB0_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) HIZC15_IRQ7, HIZC15_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) HIZC14_IRQ6, HIZC14_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) HIZC13_IRQ5, HIZC13_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) HIZC12_IRQ4, HIZC12_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) HIZC11_IRQ3, HIZC11_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) HIZC10_IRQ2, HIZC10_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) HIZC9_IRQ1, HIZC9_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) HIZC8_IRQ0, HIZC8_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MSELB9_VIO, MSELB9_VIO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) MSELB8_RGB, MSELB8_SYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) PINMUX_FUNCTION_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const u16 pinmux_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* PTA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) PINMUX_DATA(PTA6_DATA, PTA6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) PINMUX_DATA(PTA4_DATA, PTA4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) PINMUX_DATA(PTA3_DATA, PTA3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) PINMUX_DATA(PTA2_DATA, PTA2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) PINMUX_DATA(PTA1_DATA, PTA1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) PINMUX_DATA(PTA0_DATA, PTA0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /* PTB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /* PTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) PINMUX_DATA(PTC7_DATA, PTC7_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) PINMUX_DATA(PTC5_DATA, PTC5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /* PTD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) PINMUX_DATA(PTD7_DATA, PTD7_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) PINMUX_DATA(PTD6_DATA, PTD6_OUT, PTD6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) PINMUX_DATA(PTD5_DATA, PTD5_OUT, PTD5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) PINMUX_DATA(PTD4_DATA, PTD4_OUT, PTD4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) PINMUX_DATA(PTD3_DATA, PTD3_OUT, PTD3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) PINMUX_DATA(PTD2_DATA, PTD2_OUT, PTD2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) PINMUX_DATA(PTD1_DATA, PTD1_OUT, PTD1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) PINMUX_DATA(PTD0_DATA, PTD0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* PTE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) PINMUX_DATA(PTE7_DATA, PTE7_OUT, PTE7_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) PINMUX_DATA(PTE6_DATA, PTE6_OUT, PTE6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) PINMUX_DATA(PTE5_DATA, PTE5_OUT, PTE5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) PINMUX_DATA(PTE4_DATA, PTE4_OUT, PTE4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) PINMUX_DATA(PTE1_DATA, PTE1_OUT, PTE1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) PINMUX_DATA(PTE0_DATA, PTE0_OUT, PTE0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* PTF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) PINMUX_DATA(PTF6_DATA, PTF6_OUT, PTF6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) PINMUX_DATA(PTF5_DATA, PTF5_OUT, PTF5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) PINMUX_DATA(PTF4_DATA, PTF4_OUT, PTF4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) PINMUX_DATA(PTF3_DATA, PTF3_OUT, PTF3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) PINMUX_DATA(PTF2_DATA, PTF2_OUT, PTF2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) PINMUX_DATA(PTF1_DATA, PTF1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) PINMUX_DATA(PTF0_DATA, PTF0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* PTG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) PINMUX_DATA(PTG4_DATA, PTG4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) PINMUX_DATA(PTG3_DATA, PTG3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) PINMUX_DATA(PTG2_DATA, PTG2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) PINMUX_DATA(PTG1_DATA, PTG1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) PINMUX_DATA(PTG0_DATA, PTG0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* PTH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) PINMUX_DATA(PTH7_DATA, PTH7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) PINMUX_DATA(PTH6_DATA, PTH6_OUT, PTH6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) PINMUX_DATA(PTH5_DATA, PTH5_OUT, PTH5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) PINMUX_DATA(PTH4_DATA, PTH4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) PINMUX_DATA(PTH3_DATA, PTH3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) PINMUX_DATA(PTH2_DATA, PTH2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) PINMUX_DATA(PTH1_DATA, PTH1_OUT, PTH1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) PINMUX_DATA(PTH0_DATA, PTH0_OUT, PTH0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* PTJ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) PINMUX_DATA(PTJ1_DATA, PTJ1_OUT, PTJ1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) PINMUX_DATA(PTJ0_DATA, PTJ0_OUT, PTJ0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* PTK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) PINMUX_DATA(PTK6_DATA, PTK6_OUT, PTK6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) PINMUX_DATA(PTK5_DATA, PTK5_OUT, PTK5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) PINMUX_DATA(PTK4_DATA, PTK4_OUT, PTK4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) PINMUX_DATA(PTK3_DATA, PTK3_OUT, PTK3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) PINMUX_DATA(PTK2_DATA, PTK2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) PINMUX_DATA(PTK1_DATA, PTK1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) PINMUX_DATA(PTK0_DATA, PTK0_OUT, PTK0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* PTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) PINMUX_DATA(PTL7_DATA, PTL7_OUT, PTL7_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) PINMUX_DATA(PTL6_DATA, PTL6_OUT, PTL6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) PINMUX_DATA(PTL5_DATA, PTL5_OUT, PTL5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) PINMUX_DATA(PTL4_DATA, PTL4_OUT, PTL4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) PINMUX_DATA(PTL3_DATA, PTL3_OUT, PTL3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) PINMUX_DATA(PTL2_DATA, PTL2_OUT, PTL2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) PINMUX_DATA(PTL1_DATA, PTL1_OUT, PTL1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) PINMUX_DATA(PTL0_DATA, PTL0_OUT, PTL0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* PTM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) PINMUX_DATA(PTM7_DATA, PTM7_OUT, PTM7_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) PINMUX_DATA(PTM6_DATA, PTM6_OUT, PTM6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) PINMUX_DATA(PTM5_DATA, PTM5_OUT, PTM5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) PINMUX_DATA(PTM4_DATA, PTM4_OUT, PTM4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) PINMUX_DATA(PTM3_DATA, PTM3_OUT, PTM3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) PINMUX_DATA(PTM2_DATA, PTM2_OUT, PTM2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) PINMUX_DATA(PTM1_DATA, PTM1_OUT, PTM1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) PINMUX_DATA(PTM0_DATA, PTM0_OUT, PTM0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* PTN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) PINMUX_DATA(PTN7_DATA, PTN7_OUT, PTN7_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) PINMUX_DATA(PTN6_DATA, PTN6_OUT, PTN6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) PINMUX_DATA(PTN5_DATA, PTN5_OUT, PTN5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) PINMUX_DATA(PTN4_DATA, PTN4_OUT, PTN4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) PINMUX_DATA(PTN3_DATA, PTN3_OUT, PTN3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) PINMUX_DATA(PTN2_DATA, PTN2_OUT, PTN2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) PINMUX_DATA(PTN1_DATA, PTN1_OUT, PTN1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) PINMUX_DATA(PTN0_DATA, PTN0_OUT, PTN0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* PTQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) PINMUX_DATA(PTQ6_DATA, PTQ6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) PINMUX_DATA(PTQ5_DATA, PTQ5_OUT, PTQ5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) PINMUX_DATA(PTQ4_DATA, PTQ4_OUT, PTQ4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) PINMUX_DATA(PTQ3_DATA, PTQ3_OUT, PTQ3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) PINMUX_DATA(PTQ2_DATA, PTQ2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) PINMUX_DATA(PTQ1_DATA, PTQ1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) PINMUX_DATA(PTQ0_DATA, PTQ0_OUT, PTQ0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* PTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) PINMUX_DATA(PTR4_DATA, PTR4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) PINMUX_DATA(PTR3_DATA, PTR3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) PINMUX_DATA(PTR2_DATA, PTR2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) PINMUX_DATA(PTR1_DATA, PTR1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) PINMUX_DATA(PTR0_DATA, PTR0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /* PTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) PINMUX_DATA(PTS4_DATA, PTS4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) PINMUX_DATA(PTS3_DATA, PTS3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) PINMUX_DATA(PTS2_DATA, PTS2_OUT, PTS2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) PINMUX_DATA(PTS1_DATA, PTS1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) PINMUX_DATA(PTS0_DATA, PTS0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /* PTT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) PINMUX_DATA(PTT4_DATA, PTT4_OUT, PTT4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) PINMUX_DATA(PTT3_DATA, PTT3_OUT, PTT3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) PINMUX_DATA(PTT2_DATA, PTT2_OUT, PTT2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) PINMUX_DATA(PTT1_DATA, PTT1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) PINMUX_DATA(PTT0_DATA, PTT0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) /* PTU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) PINMUX_DATA(PTU4_DATA, PTU4_OUT, PTU4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) PINMUX_DATA(PTU3_DATA, PTU3_OUT, PTU3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) PINMUX_DATA(PTU2_DATA, PTU2_OUT, PTU2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) PINMUX_DATA(PTU1_DATA, PTU1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) PINMUX_DATA(PTU0_DATA, PTU0_OUT, PTU0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /* PTV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) PINMUX_DATA(PTV4_DATA, PTV4_OUT, PTV4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) PINMUX_DATA(PTV3_DATA, PTV3_OUT, PTV3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) PINMUX_DATA(PTV2_DATA, PTV2_OUT, PTV2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) PINMUX_DATA(PTV1_DATA, PTV1_OUT, PTV1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) PINMUX_DATA(PTV0_DATA, PTV0_OUT, PTV0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /* PTW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) PINMUX_DATA(PTW6_DATA, PTW6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) PINMUX_DATA(PTW5_DATA, PTW5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) PINMUX_DATA(PTW4_DATA, PTW4_OUT, PTW4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) PINMUX_DATA(PTW3_DATA, PTW3_OUT, PTW3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) PINMUX_DATA(PTW2_DATA, PTW2_OUT, PTW2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) PINMUX_DATA(PTW1_DATA, PTW1_OUT, PTW1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) PINMUX_DATA(PTW0_DATA, PTW0_OUT, PTW0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /* PTX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) PINMUX_DATA(PTX6_DATA, PTX6_OUT, PTX6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) PINMUX_DATA(PTX5_DATA, PTX5_OUT, PTX5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) PINMUX_DATA(PTX4_DATA, PTX4_OUT, PTX4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) PINMUX_DATA(PTX3_DATA, PTX3_OUT, PTX3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) PINMUX_DATA(PTX2_DATA, PTX2_OUT, PTX2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) PINMUX_DATA(PTX1_DATA, PTX1_OUT, PTX1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) PINMUX_DATA(PTX0_DATA, PTX0_OUT, PTX0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /* PTY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) PINMUX_DATA(PTY5_DATA, PTY5_OUT, PTY5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) PINMUX_DATA(PTY4_DATA, PTY4_OUT, PTY4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) PINMUX_DATA(PTY3_DATA, PTY3_OUT, PTY3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) PINMUX_DATA(PTY2_DATA, PTY2_OUT, PTY2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) PINMUX_DATA(PTY1_DATA, PTY1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) PINMUX_DATA(PTY0_DATA, PTY0_OUT, PTY0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /* PTZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) PINMUX_DATA(PTZ5_DATA, PTZ5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) PINMUX_DATA(PTZ4_DATA, PTZ4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) PINMUX_DATA(PTZ3_DATA, PTZ3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) PINMUX_DATA(PTZ2_DATA, PTZ2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) PINMUX_DATA(PTZ1_DATA, PTZ1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /* SCIF0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) PINMUX_DATA(SCIF0_TXD_MARK, SCIF0_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) PINMUX_DATA(SCIF0_RXD_MARK, SCIF0_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) PINMUX_DATA(SCIF0_RTS_MARK, PSD7_SCIF0_RTS, SCIF0_RTS_SIUAOSPD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) PINMUX_DATA(SCIF0_CTS_MARK, PSD6_SCIF0_CTS, SCIF0_CTS_SIUAISPD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) PINMUX_DATA(SCIF0_SCK_MARK, PSD8_SCIF0_SCK, SCIF0_SCK_TPUTO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) /* SCIF1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) PINMUX_DATA(SCIF1_TXD_MARK, PSD11_SCIF1, VIO_D5_SCIF1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) PINMUX_DATA(SCIF1_RXD_MARK, PSD11_SCIF1, VIO_D6_SCIF1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) PINMUX_DATA(SCIF1_RTS_MARK, PSD12_SCIF1, VIO_CLK_SCIF1_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) PINMUX_DATA(SCIF1_CTS_MARK, PSD12_SCIF1, VIO_VD_SCIF1_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) PINMUX_DATA(SCIF1_SCK_MARK, PSD11_SCIF1, VIO_D7_SCIF1_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* SCIF2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) PINMUX_DATA(SCIF2_TXD_MARK, PSD13_SCIF2, VIO_STEM_SCIF2_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) PINMUX_DATA(SCIF2_RXD_MARK, PSD13_SCIF2, VIO_HD_SCIF2_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) PINMUX_DATA(SCIF2_RTS_MARK, PSD13_SCIF2, VIO_CKO_SCIF2_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) PINMUX_DATA(SCIF2_CTS_MARK, PSD13_SCIF2, VIO_FLD_SCIF2_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) PINMUX_DATA(SCIF2_SCK_MARK, PSD13_SCIF2, VIO_STEX_SCIF2_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /* SIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) PINMUX_DATA(SIOTXD_MARK, PSB15_SIOTXD, SIOTXD_SIUBOSLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) PINMUX_DATA(SIORXD_MARK, PSB14_SIORXD, SIORXD_SIUBISLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) PINMUX_DATA(SIOD_MARK, PSB13_SIOD, SIOD_SIUBILR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) PINMUX_DATA(SIOSTRB0_MARK, PSB12_SIOSTRB0, SIOSTRB0_SIUBIBT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) PINMUX_DATA(SIOSTRB1_MARK, PSB11_SIOSTRB1, SIOSTRB1_SIUBOLR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) PINMUX_DATA(SIOSCK_MARK, PSB10_SIOSCK, SIOSCK_SIUBOBT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) PINMUX_DATA(SIOMCK_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIOMCK, PTF6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /* CEU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) PINMUX_DATA(VIO_D15_MARK, PSC0_VIO, HIZA10_NAF, NAF7_VIO_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) PINMUX_DATA(VIO_D14_MARK, PSC0_VIO, HIZA10_NAF, NAF6_VIO_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) PINMUX_DATA(VIO_D13_MARK, PSC0_VIO, HIZA10_NAF, NAF5_VIO_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) PINMUX_DATA(VIO_D12_MARK, PSC0_VIO, HIZA10_NAF, NAF4_VIO_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) PINMUX_DATA(VIO_D11_MARK, PSC0_VIO, HIZA10_NAF, NAF3_VIO_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) PINMUX_DATA(VIO_D10_MARK, PSE2_VIO_D10, HIZB0_VIO, NAF2_VIO_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) PINMUX_DATA(VIO_D9_MARK, PSE1_VIO_D9, HIZB0_VIO, NAF1_VIO_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) PINMUX_DATA(VIO_D8_MARK, PSE0_VIO_D8, HIZB0_VIO, NAF0_VIO_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) PINMUX_DATA(VIO_D7_MARK, PSD11_VIO, VIO_D7_SCIF1_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) PINMUX_DATA(VIO_D6_MARK, PSD11_VIO, VIO_D6_SCIF1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) PINMUX_DATA(VIO_D5_MARK, PSD11_VIO, VIO_D5_SCIF1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) PINMUX_DATA(VIO_D4_MARK, VIO_D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) PINMUX_DATA(VIO_D3_MARK, VIO_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) PINMUX_DATA(VIO_D2_MARK, VIO_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) PINMUX_DATA(VIO_D1_MARK, VIO_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) PINMUX_DATA(VIO_D0_MARK, PSD10_VIO_D0, VIO_D0_LCDLCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) PINMUX_DATA(VIO_CLK_MARK, PSD12_VIO, MSELB9_VIO, VIO_CLK_SCIF1_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) PINMUX_DATA(VIO_VD_MARK, PSD12_VIO, MSELB9_VIO, VIO_VD_SCIF1_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) PINMUX_DATA(VIO_HD_MARK, PSD13_VIO, MSELB9_VIO, VIO_HD_SCIF2_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) PINMUX_DATA(VIO_FLD_MARK, PSD13_VIO, HIZA9_VIO, VIO_FLD_SCIF2_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) PINMUX_DATA(VIO_CKO_MARK, PSD13_VIO, HIZA9_VIO, VIO_CKO_SCIF2_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) PINMUX_DATA(VIO_STEX_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEX_SCIF2_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) PINMUX_DATA(VIO_STEM_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEM_SCIF2_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) HIZB0_VIO, FOE_VIO_VD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) HIZB1_VIO, FCE_VIO_HD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) HIZB1_VIO, FRB_VIO_CLK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /* LCDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) PINMUX_DATA(LCDD23_MARK, HIZA8_LCDC, LCDD23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) PINMUX_DATA(LCDD22_MARK, HIZA8_LCDC, LCDD22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) PINMUX_DATA(LCDD21_MARK, HIZA8_LCDC, LCDD21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) PINMUX_DATA(LCDD20_MARK, HIZA8_LCDC, LCDD20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) PINMUX_DATA(LCDD19_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD19_DV_CLKI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) PINMUX_DATA(LCDD18_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD18_DV_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) PINMUX_DATA(LCDD17_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) LCDD17_DV_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) PINMUX_DATA(LCDD16_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) LCDD16_DV_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) PINMUX_DATA(LCDD15_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD15_DV_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) PINMUX_DATA(LCDD14_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD14_DV_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) PINMUX_DATA(LCDD13_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD13_DV_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) PINMUX_DATA(LCDD12_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD12_DV_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) PINMUX_DATA(LCDD11_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD11_DV_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PINMUX_DATA(LCDD10_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD10_DV_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) PINMUX_DATA(LCDD9_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD9_DV_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) PINMUX_DATA(LCDD8_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD8_DV_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) PINMUX_DATA(LCDD7_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD7_DV_D7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) PINMUX_DATA(LCDD6_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD6_DV_D6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) PINMUX_DATA(LCDD5_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD5_DV_D5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) PINMUX_DATA(LCDD4_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD4_DV_D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) PINMUX_DATA(LCDD3_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD3_DV_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) PINMUX_DATA(LCDD2_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD2_DV_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) PINMUX_DATA(LCDD1_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD1_DV_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) PINMUX_DATA(LCDD0_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD0_DV_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) PINMUX_DATA(LCDLCLK_MARK, PSD10_LCDLCLK, VIO_D0_LCDLCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* Main LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) PINMUX_DATA(LCDDON_MARK, PSD2_LCDDON, HIZA7_LCDC, LCDDON_LCDDON2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) PINMUX_DATA(LCDVCPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) PINMUX_DATA(LCDVEPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) PINMUX_DATA(LCDVSYN_MARK, HIZA7_LCDC, LCDVSYN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /* Main LCD - RGB Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) PINMUX_DATA(LCDDCK_MARK, MSELB8_RGB, HIZA8_LCDC, LCDDCK_LCDWR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) PINMUX_DATA(LCDHSYN_MARK, MSELB8_RGB, HIZA7_LCDC, LCDHSYN_LCDCS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) PINMUX_DATA(LCDDISP_MARK, MSELB8_RGB, HIZA7_LCDC, LCDDISP_LCDRS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) /* Main LCD - SYS Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) PINMUX_DATA(LCDRS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDDISP_LCDRS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) PINMUX_DATA(LCDCS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDHSYN_LCDCS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) PINMUX_DATA(LCDWR_MARK, MSELB8_SYS, HIZA8_LCDC, LCDDCK_LCDWR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) PINMUX_DATA(LCDRD_MARK, HIZA7_LCDC, LCDRD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /* Sub LCD - SYS Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) PINMUX_DATA(LCDDON2_MARK, PSD2_LCDDON2, HIZA7_LCDC, LCDDON_LCDDON2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) PINMUX_DATA(LCDVCPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) PINMUX_DATA(LCDVEPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) PINMUX_DATA(LCDVSYN2_MARK, PSE12_LCDVSYN2, HIZA8_LCDC, LCDVSYN2_DACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) PINMUX_DATA(LCDCS2_MARK, PSD5_LCDCS2, CS6B_CE1B_LCDCS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) /* BSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) PINMUX_DATA(IOIS16_MARK, IOIS16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) PINMUX_DATA(A25_MARK, A25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) PINMUX_DATA(A24_MARK, A24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) PINMUX_DATA(A23_MARK, A23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) PINMUX_DATA(A22_MARK, A22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) PINMUX_DATA(BS_MARK, PSA9_BS, IRQ4_BS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) PINMUX_DATA(CS6B_CE1B_MARK, PSD5_CS6B_CE1B, CS6B_CE1B_LCDCS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) PINMUX_DATA(WAIT_MARK, WAIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) PINMUX_DATA(CS6A_CE2B_MARK, CS6A_CE2B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) /* SBSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) PINMUX_DATA(HPD63_MARK, HPD63),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) PINMUX_DATA(HPD62_MARK, HPD62),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) PINMUX_DATA(HPD61_MARK, HPD61),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) PINMUX_DATA(HPD60_MARK, HPD60),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) PINMUX_DATA(HPD59_MARK, HPD59),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) PINMUX_DATA(HPD58_MARK, HPD58),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) PINMUX_DATA(HPD57_MARK, HPD57),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) PINMUX_DATA(HPD56_MARK, HPD56),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) PINMUX_DATA(HPD55_MARK, HPD55),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) PINMUX_DATA(HPD54_MARK, HPD54),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) PINMUX_DATA(HPD53_MARK, HPD53),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) PINMUX_DATA(HPD52_MARK, HPD52),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) PINMUX_DATA(HPD51_MARK, HPD51),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) PINMUX_DATA(HPD50_MARK, HPD50),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) PINMUX_DATA(HPD49_MARK, HPD49),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) PINMUX_DATA(HPD48_MARK, HPD48),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) PINMUX_DATA(HPDQM7_MARK, HPDQM7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) PINMUX_DATA(HPDQM6_MARK, HPDQM6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) PINMUX_DATA(HPDQM5_MARK, HPDQM5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) PINMUX_DATA(HPDQM4_MARK, HPDQM4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) PINMUX_DATA(IRQ0_MARK, HIZC8_IRQ0, IRQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) PINMUX_DATA(IRQ1_MARK, HIZC9_IRQ1, IRQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) PINMUX_DATA(IRQ2_MARK, PSA4_IRQ2, HIZC10_IRQ2, IRQ2_SDHID2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) PINMUX_DATA(IRQ3_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_IRQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) HIZC11_IRQ3, PTQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) PINMUX_DATA(IRQ4_MARK, PSA9_IRQ4, HIZC12_IRQ4, IRQ4_BS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) PINMUX_DATA(IRQ5_MARK, HIZC13_IRQ5, IRQ5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) PINMUX_DATA(IRQ6_MARK, PSA15_IRQ6, HIZC14_IRQ6, KEYIN0_IRQ6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) PINMUX_DATA(IRQ7_MARK, PSA14_IRQ7, HIZC15_IRQ7, KEYIN4_IRQ7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /* SDHI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) PINMUX_DATA(SDHICD_MARK, SDHICD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) PINMUX_DATA(SDHIWP_MARK, SDHIWP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) PINMUX_DATA(SDHID3_MARK, SDHID3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) PINMUX_DATA(SDHID2_MARK, PSA4_SDHID2, IRQ2_SDHID2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) PINMUX_DATA(SDHID1_MARK, SDHID1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) PINMUX_DATA(SDHID0_MARK, SDHID0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) PINMUX_DATA(SDHICMD_MARK, SDHICMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) PINMUX_DATA(SDHICLK_MARK, SDHICLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) /* SIU - Port A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, HIZB4_SIUA, SIUAOLR_SIOF1_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, HIZB4_SIUA, SIUAOBT_SIOF1_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, HIZB4_SIUA, SIUAISLD_SIOF1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, HIZB4_SIUA, SIUAILR_SIOF1_SS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, HIZB4_SIUA, SIUAIBT_SIOF1_SS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, HIZB4_SIUA, SIUAOSLD_SIOF1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, HIZB4_SIUA, PSB1_SIUMCKA, PTK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, HIZB4_SIUA, PTK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) /* SIU - Port B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) PINMUX_DATA(SIUBOBT_MARK, PSB10_SIUBOBT, SIOSCK_SIUBOBT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) PINMUX_DATA(SIUBISLD_MARK, PSB14_SIUBISLD, SIORXD_SIUBISLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) PINMUX_DATA(SIUBILR_MARK, PSB13_SIUBILR, SIOD_SIUBILR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) PINMUX_DATA(SIUBIBT_MARK, PSB12_SIUBIBT, SIOSTRB0_SIUBIBT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) PINMUX_DATA(SIUBOSLD_MARK, PSB15_SIUBOSLD, SIOTXD_SIUBOSLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) PINMUX_DATA(SIUMCKB_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIUMCKB, PTF6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) PINMUX_DATA(SIUFCKB_MARK, PSD9_SIUFCKB, PTF6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /* AUD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) PINMUX_DATA(AUDSYNC_MARK, AUDSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) PINMUX_DATA(AUDATA3_MARK, AUDATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) PINMUX_DATA(AUDATA2_MARK, AUDATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) PINMUX_DATA(AUDATA1_MARK, AUDATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) PINMUX_DATA(AUDATA0_MARK, AUDATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /* DMAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) PINMUX_DATA(DACK_MARK, PSE12_DACK, LCDVSYN2_DACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) PINMUX_DATA(DREQ0_MARK, DREQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) /* VOU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) PINMUX_DATA(DV_CLKI_MARK, PSD0_DV, LCDD19_DV_CLKI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) PINMUX_DATA(DV_CLK_MARK, PSD0_DV, LCDD18_DV_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) PINMUX_DATA(DV_HSYNC_MARK, PSD0_DV, LCDD17_DV_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) PINMUX_DATA(DV_VSYNC_MARK, PSD0_DV, LCDD16_DV_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) PINMUX_DATA(DV_D15_MARK, PSD0_DV, LCDD15_DV_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) PINMUX_DATA(DV_D14_MARK, PSD0_DV, LCDD14_DV_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) PINMUX_DATA(DV_D13_MARK, PSD0_DV, LCDD13_DV_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) PINMUX_DATA(DV_D12_MARK, PSD0_DV, LCDD12_DV_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) PINMUX_DATA(DV_D11_MARK, PSD0_DV, LCDD11_DV_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) PINMUX_DATA(DV_D10_MARK, PSD0_DV, LCDD10_DV_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) PINMUX_DATA(DV_D9_MARK, PSD0_DV, LCDD9_DV_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) PINMUX_DATA(DV_D8_MARK, PSD0_DV, LCDD8_DV_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) PINMUX_DATA(DV_D7_MARK, PSD0_DV, LCDD7_DV_D7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) PINMUX_DATA(DV_D6_MARK, PSD0_DV, LCDD6_DV_D6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) PINMUX_DATA(DV_D5_MARK, PSD0_DV, LCDD5_DV_D5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) PINMUX_DATA(DV_D4_MARK, PSD0_DV, LCDD4_DV_D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) PINMUX_DATA(DV_D3_MARK, PSD0_DV, LCDD3_DV_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) PINMUX_DATA(DV_D2_MARK, PSD0_DV, LCDD2_DV_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) PINMUX_DATA(DV_D1_MARK, PSD0_DV, LCDD1_DV_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) PINMUX_DATA(DV_D0_MARK, PSD0_DV, LCDD0_DV_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) /* CPG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) PINMUX_DATA(STATUS0_MARK, STATUS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) PINMUX_DATA(PDSTATUS_MARK, PDSTATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /* SIOF0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) PINMUX_DATA(SIOF0_MCK_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_SIOF0_MCK, PTQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) PINMUX_DATA(SIOF0_SCK_MARK, PSB5_SIOF0_SCK, SIOF0_SCK_TS_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) PINMUX_DATA(SIOF0_SYNC_MARK, PSB4_SIOF0_SYNC, SIOF0_SYNC_TS_SDEN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) PINMUX_DATA(SIOF0_SS1_MARK, PSB3_SIOF0_SS1, SIOF0_SS1_TS_SPSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) PINMUX_DATA(SIOF0_SS2_MARK, PSB2_SIOF0_SS2, SIOF0_SS2_SIM_RST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) PINMUX_DATA(SIOF0_TXD_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) PSB7_SIOF0_TXD, PTQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) PINMUX_DATA(SIOF0_RXD_MARK, PSE13_SIOF0_RXD_IRDA_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) PSB6_SIOF0_RXD, PTQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /* SIOF1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) PINMUX_DATA(SIOF1_MCK_MARK, PSE11_SIUMCKA_SIOF1_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) PSB1_SIOF1_MCK, PTK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) PINMUX_DATA(SIOF1_SCK_MARK, PSC14_SIOF1_SCK, SIUAOBT_SIOF1_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) PINMUX_DATA(SIOF1_SYNC_MARK, PSC13_SIOF1_SYNC, SIUAOLR_SIOF1_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) PINMUX_DATA(SIOF1_SS1_MARK, PSC12_SIOF1_SS1, SIUAIBT_SIOF1_SS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) PINMUX_DATA(SIOF1_SS2_MARK, PSC11_SIOF1_SS2, SIUAILR_SIOF1_SS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) PINMUX_DATA(SIOF1_TXD_MARK, PSB0_SIOF1_TXD, SIUAOSLD_SIOF1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) PINMUX_DATA(SIOF1_RXD_MARK, PSC15_SIOF1_RXD, SIUAISLD_SIOF1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) /* SIM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) PINMUX_DATA(SIM_D_MARK, PSE15_SIM_D, PTQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) PINMUX_DATA(SIM_CLK_MARK, PSE14_SIM_CLK, PTQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) PINMUX_DATA(SIM_RST_MARK, PSB2_SIM_RST, SIOF0_SS2_SIM_RST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) /* TSIF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) PINMUX_DATA(TS_SDAT_MARK, PSE13_TS_SDAT, PTQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) PINMUX_DATA(TS_SCK_MARK, PSB5_TS_SCK, SIOF0_SCK_TS_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) PINMUX_DATA(TS_SDEN_MARK, PSB4_TS_SDEN, SIOF0_SYNC_TS_SDEN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) PINMUX_DATA(TS_SPSYNC_MARK, PSB3_TS_SPSYNC, SIOF0_SS1_TS_SPSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) /* IRDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) PINMUX_DATA(IRDA_IN_MARK, PSE13_SIOF0_RXD_IRDA_IN, PSB6_IRDA_IN, PTQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) PINMUX_DATA(IRDA_OUT_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) PSB7_IRDA_OUT, PTQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /* TPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) PINMUX_DATA(TPUTO_MARK, PSD8_TPUTO, SCIF0_SCK_TPUTO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) /* FLCTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) PINMUX_DATA(FCE_MARK, PSE3_FLCTL, FCE_VIO_HD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) PINMUX_DATA(NAF7_MARK, PSC0_NAF, HIZA10_NAF, NAF7_VIO_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) PINMUX_DATA(NAF6_MARK, PSC0_NAF, HIZA10_NAF, NAF6_VIO_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) PINMUX_DATA(NAF5_MARK, PSC0_NAF, HIZA10_NAF, NAF5_VIO_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) PINMUX_DATA(NAF4_MARK, PSC0_NAF, HIZA10_NAF, NAF4_VIO_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) PINMUX_DATA(NAF3_MARK, PSC0_NAF, HIZA10_NAF, NAF3_VIO_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) PINMUX_DATA(NAF2_MARK, PSE2_NAF2, HIZB0_VIO, NAF2_VIO_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) PINMUX_DATA(NAF1_MARK, PSE1_NAF1, HIZB0_VIO, NAF1_VIO_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) PINMUX_DATA(NAF0_MARK, PSE0_NAF0, HIZB0_VIO, NAF0_VIO_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) PINMUX_DATA(FCDE_MARK, FCDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) PINMUX_DATA(FOE_MARK, PSE3_FLCTL, HIZB0_VIO, FOE_VIO_VD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) PINMUX_DATA(FSC_MARK, FSC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) PINMUX_DATA(FWE_MARK, FWE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) PINMUX_DATA(FRB_MARK, PSE3_FLCTL, FRB_VIO_CLK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) /* KEYSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) PINMUX_DATA(KEYIN0_MARK, PSA15_KEYIN0, HIZC14_IRQ6, KEYIN0_IRQ6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) PINMUX_DATA(KEYIN1_MARK, HIZA14_KEYSC, KEYIN1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) PINMUX_DATA(KEYIN2_MARK, HIZA14_KEYSC, KEYIN2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) PINMUX_DATA(KEYIN3_MARK, HIZA14_KEYSC, KEYIN3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) PINMUX_DATA(KEYIN4_MARK, PSA14_KEYIN4, HIZC15_IRQ7, KEYIN4_IRQ7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) PINMUX_DATA(KEYOUT0_MARK, HIZA14_KEYSC, KEYOUT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) PINMUX_DATA(KEYOUT1_MARK, HIZA14_KEYSC, KEYOUT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) PINMUX_DATA(KEYOUT2_MARK, HIZA14_KEYSC, KEYOUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) PINMUX_DATA(KEYOUT3_MARK, HIZA14_KEYSC, KEYOUT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) PINMUX_DATA(KEYOUT4_IN6_MARK, HIZA14_KEYSC, KEYOUT4_IN6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) PINMUX_DATA(KEYOUT5_IN5_MARK, HIZA14_KEYSC, KEYOUT5_IN5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) static const struct sh_pfc_pin pinmux_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) /* PTA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) PINMUX_GPIO(PTA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) PINMUX_GPIO(PTA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) PINMUX_GPIO(PTA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) PINMUX_GPIO(PTA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) PINMUX_GPIO(PTA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) PINMUX_GPIO(PTA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) PINMUX_GPIO(PTA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) PINMUX_GPIO(PTA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) /* PTB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) PINMUX_GPIO(PTB7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) PINMUX_GPIO(PTB6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) PINMUX_GPIO(PTB5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) PINMUX_GPIO(PTB4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) PINMUX_GPIO(PTB3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) PINMUX_GPIO(PTB2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) PINMUX_GPIO(PTB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) PINMUX_GPIO(PTB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) /* PTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) PINMUX_GPIO(PTC7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) PINMUX_GPIO(PTC5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) PINMUX_GPIO(PTC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) PINMUX_GPIO(PTC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) PINMUX_GPIO(PTC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) PINMUX_GPIO(PTC0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) /* PTD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) PINMUX_GPIO(PTD7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) PINMUX_GPIO(PTD6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) PINMUX_GPIO(PTD5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) PINMUX_GPIO(PTD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) PINMUX_GPIO(PTD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) PINMUX_GPIO(PTD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) PINMUX_GPIO(PTD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) PINMUX_GPIO(PTD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) /* PTE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) PINMUX_GPIO(PTE7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) PINMUX_GPIO(PTE6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) PINMUX_GPIO(PTE5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) PINMUX_GPIO(PTE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) PINMUX_GPIO(PTE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) PINMUX_GPIO(PTE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) /* PTF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) PINMUX_GPIO(PTF6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) PINMUX_GPIO(PTF5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) PINMUX_GPIO(PTF4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) PINMUX_GPIO(PTF3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) PINMUX_GPIO(PTF2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) PINMUX_GPIO(PTF1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) PINMUX_GPIO(PTF0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) /* PTG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) PINMUX_GPIO(PTG4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) PINMUX_GPIO(PTG3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) PINMUX_GPIO(PTG2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) PINMUX_GPIO(PTG1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) PINMUX_GPIO(PTG0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /* PTH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) PINMUX_GPIO(PTH7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) PINMUX_GPIO(PTH6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) PINMUX_GPIO(PTH5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) PINMUX_GPIO(PTH4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) PINMUX_GPIO(PTH3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) PINMUX_GPIO(PTH2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) PINMUX_GPIO(PTH1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) PINMUX_GPIO(PTH0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) /* PTJ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) PINMUX_GPIO(PTJ7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) PINMUX_GPIO(PTJ6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) PINMUX_GPIO(PTJ5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) PINMUX_GPIO(PTJ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) PINMUX_GPIO(PTJ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) /* PTK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) PINMUX_GPIO(PTK6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) PINMUX_GPIO(PTK5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) PINMUX_GPIO(PTK4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) PINMUX_GPIO(PTK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) PINMUX_GPIO(PTK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) PINMUX_GPIO(PTK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) PINMUX_GPIO(PTK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) /* PTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) PINMUX_GPIO(PTL7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) PINMUX_GPIO(PTL6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) PINMUX_GPIO(PTL5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) PINMUX_GPIO(PTL4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) PINMUX_GPIO(PTL3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) PINMUX_GPIO(PTL2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) PINMUX_GPIO(PTL1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) PINMUX_GPIO(PTL0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) /* PTM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) PINMUX_GPIO(PTM7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) PINMUX_GPIO(PTM6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) PINMUX_GPIO(PTM5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) PINMUX_GPIO(PTM4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) PINMUX_GPIO(PTM3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) PINMUX_GPIO(PTM2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) PINMUX_GPIO(PTM1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) PINMUX_GPIO(PTM0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) /* PTN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) PINMUX_GPIO(PTN7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) PINMUX_GPIO(PTN6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) PINMUX_GPIO(PTN5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) PINMUX_GPIO(PTN4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) PINMUX_GPIO(PTN3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) PINMUX_GPIO(PTN2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) PINMUX_GPIO(PTN1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) PINMUX_GPIO(PTN0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) /* PTQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) PINMUX_GPIO(PTQ6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) PINMUX_GPIO(PTQ5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) PINMUX_GPIO(PTQ4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) PINMUX_GPIO(PTQ3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) PINMUX_GPIO(PTQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) PINMUX_GPIO(PTQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) PINMUX_GPIO(PTQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) /* PTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) PINMUX_GPIO(PTR4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) PINMUX_GPIO(PTR3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) PINMUX_GPIO(PTR2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) PINMUX_GPIO(PTR1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) PINMUX_GPIO(PTR0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) /* PTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) PINMUX_GPIO(PTS4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) PINMUX_GPIO(PTS3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) PINMUX_GPIO(PTS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) PINMUX_GPIO(PTS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) PINMUX_GPIO(PTS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) /* PTT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) PINMUX_GPIO(PTT4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) PINMUX_GPIO(PTT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) PINMUX_GPIO(PTT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) PINMUX_GPIO(PTT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) PINMUX_GPIO(PTT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) /* PTU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) PINMUX_GPIO(PTU4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) PINMUX_GPIO(PTU3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) PINMUX_GPIO(PTU2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) PINMUX_GPIO(PTU1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) PINMUX_GPIO(PTU0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) /* PTV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) PINMUX_GPIO(PTV4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) PINMUX_GPIO(PTV3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) PINMUX_GPIO(PTV2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) PINMUX_GPIO(PTV1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) PINMUX_GPIO(PTV0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) /* PTW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) PINMUX_GPIO(PTW6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) PINMUX_GPIO(PTW5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) PINMUX_GPIO(PTW4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) PINMUX_GPIO(PTW3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) PINMUX_GPIO(PTW2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) PINMUX_GPIO(PTW1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) PINMUX_GPIO(PTW0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) /* PTX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) PINMUX_GPIO(PTX6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) PINMUX_GPIO(PTX5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) PINMUX_GPIO(PTX4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) PINMUX_GPIO(PTX3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) PINMUX_GPIO(PTX2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) PINMUX_GPIO(PTX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) PINMUX_GPIO(PTX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) /* PTY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) PINMUX_GPIO(PTY5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) PINMUX_GPIO(PTY4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) PINMUX_GPIO(PTY3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) PINMUX_GPIO(PTY2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) PINMUX_GPIO(PTY1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) PINMUX_GPIO(PTY0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) /* PTZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) PINMUX_GPIO(PTZ5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) PINMUX_GPIO(PTZ4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) PINMUX_GPIO(PTZ3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) PINMUX_GPIO(PTZ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) PINMUX_GPIO(PTZ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) static const struct pinmux_func pinmux_func_gpios[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) /* SCIF0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) GPIO_FN(SCIF0_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) GPIO_FN(SCIF0_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) GPIO_FN(SCIF0_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) GPIO_FN(SCIF0_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) GPIO_FN(SCIF0_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) /* SCIF1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) GPIO_FN(SCIF1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) GPIO_FN(SCIF1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) GPIO_FN(SCIF1_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) GPIO_FN(SCIF1_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) GPIO_FN(SCIF1_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) /* SCIF2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) GPIO_FN(SCIF2_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) GPIO_FN(SCIF2_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) GPIO_FN(SCIF2_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) GPIO_FN(SCIF2_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) GPIO_FN(SCIF2_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) /* SIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) GPIO_FN(SIOTXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) GPIO_FN(SIORXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) GPIO_FN(SIOD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) GPIO_FN(SIOSTRB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) GPIO_FN(SIOSTRB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) GPIO_FN(SIOSCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) GPIO_FN(SIOMCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) /* CEU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) GPIO_FN(VIO_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) GPIO_FN(VIO_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) GPIO_FN(VIO_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) GPIO_FN(VIO_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) GPIO_FN(VIO_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) GPIO_FN(VIO_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) GPIO_FN(VIO_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) GPIO_FN(VIO_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) GPIO_FN(VIO_D7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) GPIO_FN(VIO_D6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) GPIO_FN(VIO_D5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) GPIO_FN(VIO_D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) GPIO_FN(VIO_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) GPIO_FN(VIO_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) GPIO_FN(VIO_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) GPIO_FN(VIO_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) GPIO_FN(VIO_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) GPIO_FN(VIO_VD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) GPIO_FN(VIO_HD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) GPIO_FN(VIO_FLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) GPIO_FN(VIO_CKO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) GPIO_FN(VIO_STEX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) GPIO_FN(VIO_STEM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) GPIO_FN(VIO_VD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) GPIO_FN(VIO_HD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) GPIO_FN(VIO_CLK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) /* LCDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) GPIO_FN(LCDD23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) GPIO_FN(LCDD22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) GPIO_FN(LCDD21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) GPIO_FN(LCDD20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) GPIO_FN(LCDD19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) GPIO_FN(LCDD18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) GPIO_FN(LCDD17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) GPIO_FN(LCDD16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) GPIO_FN(LCDD15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) GPIO_FN(LCDD14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) GPIO_FN(LCDD13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) GPIO_FN(LCDD12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) GPIO_FN(LCDD11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) GPIO_FN(LCDD10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) GPIO_FN(LCDD9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) GPIO_FN(LCDD8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) GPIO_FN(LCDD7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) GPIO_FN(LCDD6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) GPIO_FN(LCDD5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) GPIO_FN(LCDD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) GPIO_FN(LCDD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) GPIO_FN(LCDD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) GPIO_FN(LCDD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) GPIO_FN(LCDD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) GPIO_FN(LCDLCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) /* Main LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) GPIO_FN(LCDDON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) GPIO_FN(LCDVCPWC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) GPIO_FN(LCDVEPWC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) GPIO_FN(LCDVSYN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) /* Main LCD - RGB Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) GPIO_FN(LCDDCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) GPIO_FN(LCDHSYN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) GPIO_FN(LCDDISP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) /* Main LCD - SYS Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) GPIO_FN(LCDRS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) GPIO_FN(LCDCS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) GPIO_FN(LCDWR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) GPIO_FN(LCDRD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) /* Sub LCD - SYS Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) GPIO_FN(LCDDON2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) GPIO_FN(LCDVCPWC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) GPIO_FN(LCDVEPWC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) GPIO_FN(LCDVSYN2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) GPIO_FN(LCDCS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) /* BSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) GPIO_FN(IOIS16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) GPIO_FN(A25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) GPIO_FN(A24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) GPIO_FN(A23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) GPIO_FN(A22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) GPIO_FN(BS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) GPIO_FN(CS6B_CE1B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) GPIO_FN(WAIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) GPIO_FN(CS6A_CE2B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) /* SBSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) GPIO_FN(HPD63),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) GPIO_FN(HPD62),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) GPIO_FN(HPD61),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) GPIO_FN(HPD60),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) GPIO_FN(HPD59),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) GPIO_FN(HPD58),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) GPIO_FN(HPD57),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) GPIO_FN(HPD56),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) GPIO_FN(HPD55),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) GPIO_FN(HPD54),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) GPIO_FN(HPD53),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) GPIO_FN(HPD52),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) GPIO_FN(HPD51),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) GPIO_FN(HPD50),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) GPIO_FN(HPD49),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) GPIO_FN(HPD48),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) GPIO_FN(HPDQM7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) GPIO_FN(HPDQM6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) GPIO_FN(HPDQM5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) GPIO_FN(HPDQM4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) /* IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) GPIO_FN(IRQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) GPIO_FN(IRQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) GPIO_FN(IRQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) GPIO_FN(IRQ3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) GPIO_FN(IRQ4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) GPIO_FN(IRQ5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) GPIO_FN(IRQ6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) GPIO_FN(IRQ7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) /* SDHI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) GPIO_FN(SDHICD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) GPIO_FN(SDHIWP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) GPIO_FN(SDHID3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) GPIO_FN(SDHID2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) GPIO_FN(SDHID1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) GPIO_FN(SDHID0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) GPIO_FN(SDHICMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) GPIO_FN(SDHICLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) /* SIU - Port A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) GPIO_FN(SIUAOLR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) GPIO_FN(SIUAOBT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) GPIO_FN(SIUAISLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) GPIO_FN(SIUAILR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) GPIO_FN(SIUAIBT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) GPIO_FN(SIUAOSLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) GPIO_FN(SIUMCKA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) GPIO_FN(SIUFCKA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) /* SIU - Port B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) GPIO_FN(SIUBOLR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) GPIO_FN(SIUBOBT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) GPIO_FN(SIUBISLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) GPIO_FN(SIUBILR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) GPIO_FN(SIUBIBT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) GPIO_FN(SIUBOSLD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) GPIO_FN(SIUMCKB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) GPIO_FN(SIUFCKB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) /* AUD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) GPIO_FN(AUDSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) GPIO_FN(AUDATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) GPIO_FN(AUDATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) GPIO_FN(AUDATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) GPIO_FN(AUDATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) /* DMAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) GPIO_FN(DACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) GPIO_FN(DREQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) /* VOU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) GPIO_FN(DV_CLKI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) GPIO_FN(DV_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) GPIO_FN(DV_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) GPIO_FN(DV_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) GPIO_FN(DV_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) GPIO_FN(DV_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) GPIO_FN(DV_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) GPIO_FN(DV_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) GPIO_FN(DV_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) GPIO_FN(DV_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) GPIO_FN(DV_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) GPIO_FN(DV_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) GPIO_FN(DV_D7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) GPIO_FN(DV_D6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) GPIO_FN(DV_D5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) GPIO_FN(DV_D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) GPIO_FN(DV_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) GPIO_FN(DV_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) GPIO_FN(DV_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) GPIO_FN(DV_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) /* CPG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) GPIO_FN(STATUS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) GPIO_FN(PDSTATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) /* SIOF0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) GPIO_FN(SIOF0_MCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) GPIO_FN(SIOF0_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) GPIO_FN(SIOF0_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) GPIO_FN(SIOF0_SS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) GPIO_FN(SIOF0_SS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) GPIO_FN(SIOF0_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) GPIO_FN(SIOF0_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) /* SIOF1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) GPIO_FN(SIOF1_MCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) GPIO_FN(SIOF1_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) GPIO_FN(SIOF1_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) GPIO_FN(SIOF1_SS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) GPIO_FN(SIOF1_SS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) GPIO_FN(SIOF1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) GPIO_FN(SIOF1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) /* SIM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) GPIO_FN(SIM_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) GPIO_FN(SIM_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) GPIO_FN(SIM_RST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) /* TSIF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) GPIO_FN(TS_SDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) GPIO_FN(TS_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) GPIO_FN(TS_SDEN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) GPIO_FN(TS_SPSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) /* IRDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) GPIO_FN(IRDA_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) GPIO_FN(IRDA_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) /* TPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) GPIO_FN(TPUTO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) /* FLCTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) GPIO_FN(FCE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) GPIO_FN(NAF7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) GPIO_FN(NAF6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) GPIO_FN(NAF5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) GPIO_FN(NAF4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) GPIO_FN(NAF3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) GPIO_FN(NAF2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) GPIO_FN(NAF1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) GPIO_FN(NAF0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) GPIO_FN(FCDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) GPIO_FN(FOE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) GPIO_FN(FSC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) GPIO_FN(FWE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) GPIO_FN(FRB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) /* KEYSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) GPIO_FN(KEYIN0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) GPIO_FN(KEYIN1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) GPIO_FN(KEYIN2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) GPIO_FN(KEYIN3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) GPIO_FN(KEYIN4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) GPIO_FN(KEYOUT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) GPIO_FN(KEYOUT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) GPIO_FN(KEYOUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) GPIO_FN(KEYOUT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) GPIO_FN(KEYOUT4_IN6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) GPIO_FN(KEYOUT5_IN5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) static const struct pinmux_cfg_reg pinmux_config_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) VIO_D7_SCIF1_SCK, PTA7_OUT, 0, PTA7_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) VIO_D6_SCIF1_RXD, 0, 0, PTA6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) VIO_D5_SCIF1_TXD, PTA5_OUT, 0, PTA5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) VIO_D4, 0, 0, PTA4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) VIO_D3, 0, 0, PTA3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) VIO_D2, 0, 0, PTA2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) VIO_D1, 0, 0, PTA1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) VIO_D0_LCDLCLK, 0, 0, PTA0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) HPD55, PTB7_OUT, 0, PTB7_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) HPD54, PTB6_OUT, 0, PTB6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) HPD53, PTB5_OUT, 0, PTB5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) HPD52, PTB4_OUT, 0, PTB4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) HPD51, PTB3_OUT, 0, PTB3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) HPD50, PTB2_OUT, 0, PTB2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) HPD49, PTB1_OUT, 0, PTB1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) HPD48, PTB0_OUT, 0, PTB0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) 0, 0, 0, PTC7_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) IOIS16, 0, 0, PTC5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) HPDQM7, PTC4_OUT, 0, PTC4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) HPDQM6, PTC3_OUT, 0, PTC3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) HPDQM5, PTC2_OUT, 0, PTC2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) HPDQM4, PTC0_OUT, 0, PTC0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) SDHICD, 0, 0, PTD7_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) SDHIWP, PTD6_OUT, 0, PTD6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) SDHID3, PTD5_OUT, 0, PTD5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) IRQ2_SDHID2, PTD4_OUT, 0, PTD4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) SDHID1, PTD3_OUT, 0, PTD3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) SDHID0, PTD2_OUT, 0, PTD2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) SDHICMD, PTD1_OUT, 0, PTD1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) SDHICLK, PTD0_OUT, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) A25, PTE7_OUT, 0, PTE7_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) A24, PTE6_OUT, 0, PTE6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) A23, PTE5_OUT, 0, PTE5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) A22, PTE4_OUT, 0, PTE4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) IRQ5, PTE1_OUT, 0, PTE1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) IRQ4_BS, PTE0_OUT, 0, PTE0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) PTF6, PTF6_OUT, 0, PTF6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) SIOSCK_SIUBOBT, PTF5_OUT, 0, PTF5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) SIOSTRB1_SIUBOLR, PTF4_OUT, 0, PTF4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) SIOSTRB0_SIUBIBT, PTF3_OUT, 0, PTF3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) SIOD_SIUBILR, PTF2_OUT, 0, PTF2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) SIORXD_SIUBISLD, 0, 0, PTF1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) SIOTXD_SIUBOSLD, PTF0_OUT, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) AUDSYNC, PTG4_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) AUDATA3, PTG3_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) AUDATA2, PTG2_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) AUDATA1, PTG1_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) AUDATA0, PTG0_OUT, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) LCDVCPWC_LCDVCPWC2, PTH7_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) LCDVSYN2_DACK, PTH6_OUT, 0, PTH6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) LCDVSYN, PTH5_OUT, 0, PTH5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) LCDDISP_LCDRS, PTH4_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) LCDHSYN_LCDCS, PTH3_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) LCDDON_LCDDON2, PTH2_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) LCDD17_DV_HSYNC, PTH1_OUT, 0, PTH1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) LCDD16_DV_VSYNC, PTH0_OUT, 0, PTH0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) STATUS0, PTJ7_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) 0, PTJ6_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) PDSTATUS, PTJ5_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) IRQ1, PTJ1_OUT, 0, PTJ1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) IRQ0, PTJ0_OUT, 0, PTJ0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) SIUAILR_SIOF1_SS2, PTK6_OUT, 0, PTK6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) SIUAIBT_SIOF1_SS1, PTK5_OUT, 0, PTK5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) SIUAOLR_SIOF1_SYNC, PTK4_OUT, 0, PTK4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) SIUAOBT_SIOF1_SCK, PTK3_OUT, 0, PTK3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) SIUAISLD_SIOF1_RXD, 0, 0, PTK2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) SIUAOSLD_SIOF1_TXD, PTK1_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) PTK0, PTK0_OUT, 0, PTK0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) LCDD15_DV_D15, PTL7_OUT, 0, PTL7_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) LCDD14_DV_D14, PTL6_OUT, 0, PTL6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) LCDD13_DV_D13, PTL5_OUT, 0, PTL5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) LCDD12_DV_D12, PTL4_OUT, 0, PTL4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) LCDD11_DV_D11, PTL3_OUT, 0, PTL3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) LCDD10_DV_D10, PTL2_OUT, 0, PTL2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) LCDD9_DV_D9, PTL1_OUT, 0, PTL1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) LCDD8_DV_D8, PTL0_OUT, 0, PTL0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) LCDD7_DV_D7, PTM7_OUT, 0, PTM7_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) LCDD6_DV_D6, PTM6_OUT, 0, PTM6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) LCDD5_DV_D5, PTM5_OUT, 0, PTM5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) LCDD4_DV_D4, PTM4_OUT, 0, PTM4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) LCDD3_DV_D3, PTM3_OUT, 0, PTM3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) LCDD2_DV_D2, PTM2_OUT, 0, PTM2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) LCDD1_DV_D1, PTM1_OUT, 0, PTM1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) LCDD0_DV_D0, PTM0_OUT, 0, PTM0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) HPD63, PTN7_OUT, 0, PTN7_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) HPD62, PTN6_OUT, 0, PTN6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) HPD61, PTN5_OUT, 0, PTN5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) HPD60, PTN4_OUT, 0, PTN4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) HPD59, PTN3_OUT, 0, PTN3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) HPD58, PTN2_OUT, 0, PTN2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) HPD57, PTN1_OUT, 0, PTN1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) HPD56, PTN0_OUT, 0, PTN0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) SIOF0_SS2_SIM_RST, PTQ6_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) SIOF0_SS1_TS_SPSYNC, PTQ5_OUT, 0, PTQ5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) SIOF0_SYNC_TS_SDEN, PTQ4_OUT, 0, PTQ4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) SIOF0_SCK_TS_SCK, PTQ3_OUT, 0, PTQ3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) PTQ2, 0, 0, PTQ2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) PTQ1, PTQ1_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) PTQ0, PTQ0_OUT, 0, PTQ0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) LCDRD, PTR4_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) CS6B_CE1B_LCDCS2, PTR3_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) WAIT, 0, 0, PTR2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) LCDDCK_LCDWR, PTR1_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) LCDVEPWC_LCDVEPWC2, PTR0_OUT, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) SCIF0_CTS_SIUAISPD, 0, 0, PTS4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) SCIF0_RTS_SIUAOSPD, PTS3_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) SCIF0_SCK_TPUTO, PTS2_OUT, 0, PTS2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) SCIF0_RXD, 0, 0, PTS1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) SCIF0_TXD, PTS0_OUT, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) FOE_VIO_VD2, PTT4_OUT, 0, PTT4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) FWE, PTT3_OUT, 0, PTT3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) FSC, PTT2_OUT, 0, PTT2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) DREQ0, 0, 0, PTT1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) FCDE, PTT0_OUT, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) NAF2_VIO_D10, PTU4_OUT, 0, PTU4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) NAF1_VIO_D9, PTU3_OUT, 0, PTU3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) NAF0_VIO_D8, PTU2_OUT, 0, PTU2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) FRB_VIO_CLK2, 0, 0, PTU1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) FCE_VIO_HD2, PTU0_OUT, 0, PTU0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) NAF7_VIO_D15, PTV4_OUT, 0, PTV4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) NAF6_VIO_D14, PTV3_OUT, 0, PTV3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) NAF5_VIO_D13, PTV2_OUT, 0, PTV2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) NAF4_VIO_D12, PTV1_OUT, 0, PTV1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) NAF3_VIO_D11, PTV0_OUT, 0, PTV0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) VIO_FLD_SCIF2_CTS, 0, 0, PTW6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) VIO_CKO_SCIF2_RTS, PTW5_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) VIO_STEX_SCIF2_SCK, PTW4_OUT, 0, PTW4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) VIO_STEM_SCIF2_TXD, PTW3_OUT, 0, PTW3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) VIO_HD_SCIF2_RXD, PTW2_OUT, 0, PTW2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) VIO_VD_SCIF1_CTS, PTW1_OUT, 0, PTW1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) VIO_CLK_SCIF1_RTS, PTW0_OUT, 0, PTW0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) CS6A_CE2B, PTX6_OUT, 0, PTX6_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) LCDD23, PTX5_OUT, 0, PTX5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) LCDD22, PTX4_OUT, 0, PTX4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) LCDD21, PTX3_OUT, 0, PTX3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) LCDD20, PTX2_OUT, 0, PTX2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) LCDD19_DV_CLKI, PTX1_OUT, 0, PTX1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) LCDD18_DV_CLK, PTX0_OUT, 0, PTX0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) KEYOUT5_IN5, PTY5_OUT, 0, PTY5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) KEYOUT4_IN6, PTY4_OUT, 0, PTY4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) KEYOUT3, PTY3_OUT, 0, PTY3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) KEYOUT2, PTY2_OUT, 0, PTY2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) KEYOUT1, PTY1_OUT, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) KEYOUT0, PTY0_OUT, 0, PTY0_IN ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) KEYIN4_IRQ7, 0, 0, PTZ5_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) KEYIN3, 0, 0, PTZ4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) KEYIN2, 0, 0, PTZ3_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) KEYIN1, 0, 0, PTZ2_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) KEYIN0_IRQ6, 0, 0, PTZ1_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) PSA15_KEYIN0, PSA15_IRQ6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) PSA14_KEYIN4, PSA14_IRQ7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) PSA9_IRQ4, PSA9_BS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) PSA4_IRQ2, PSA4_SDHID2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) PSB15_SIOTXD, PSB15_SIUBOSLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) PSB14_SIORXD, PSB14_SIUBISLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) PSB13_SIOD, PSB13_SIUBILR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) PSB12_SIOSTRB0, PSB12_SIUBIBT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) PSB11_SIOSTRB1, PSB11_SIUBOLR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) PSB10_SIOSCK, PSB10_SIUBOBT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) PSB9_SIOMCK, PSB9_SIUMCKB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) PSB8_SIOF0_MCK, PSB8_IRQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) PSB7_SIOF0_TXD, PSB7_IRDA_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) PSB6_SIOF0_RXD, PSB6_IRDA_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) PSB5_SIOF0_SCK, PSB5_TS_SCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) PSB3_SIOF0_SS1, PSB3_TS_SPSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) PSB2_SIOF0_SS2, PSB2_SIM_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) PSB1_SIUMCKA, PSB1_SIOF1_MCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) PSB0_SIUAOSLD, PSB0_SIOF1_TXD ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) PSC15_SIUAISLD, PSC15_SIOF1_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) PSC14_SIUAOBT, PSC14_SIOF1_SCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) PSC13_SIUAOLR, PSC13_SIOF1_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) PSC12_SIUAIBT, PSC12_SIOF1_SS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) PSC11_SIUAILR, PSC11_SIOF1_SS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) PSC0_NAF, PSC0_VIO ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) PSD13_VIO, PSD13_SCIF2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) PSD12_VIO, PSD12_SCIF1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) PSD11_VIO, PSD11_SCIF1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) PSD10_VIO_D0, PSD10_LCDLCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) PSD8_SCIF0_SCK, PSD8_TPUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) PSD7_SCIF0_RTS, PSD7_SIUAOSPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) PSD6_SCIF0_CTS, PSD6_SIUAISPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) PSD5_CS6B_CE1B, PSD5_LCDCS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) PSD2_LCDDON, PSD2_LCDDON2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) PSD0_LCDD19_LCDD0, PSD0_DV ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) { PINMUX_CFG_REG("PSELE", 0xa4050156, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) PSE12_LCDVSYN2, PSE12_DACK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) PSE3_FLCTL, PSE3_VIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) PSE2_NAF2, PSE2_VIO_D10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) PSE1_NAF1, PSE1_VIO_D9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) PSE0_NAF0, PSE0_VIO_D8 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) { PINMUX_CFG_REG("HIZCRA", 0xa4050158, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) HIZA14_KEYSC, HIZA14_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) HIZA10_NAF, HIZA10_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) HIZA9_VIO, HIZA9_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) HIZA8_LCDC, HIZA8_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) HIZA7_LCDC, HIZA7_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) HIZA6_LCDC, HIZA6_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) { PINMUX_CFG_REG("HIZCRB", 0xa405015a, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) HIZB4_SIUA, HIZB4_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) HIZB1_VIO, HIZB1_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) HIZB0_VIO, HIZB0_HIZ ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) { PINMUX_CFG_REG("HIZCRC", 0xa405015c, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) HIZC15_IRQ7, HIZC15_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) HIZC14_IRQ6, HIZC14_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) HIZC13_IRQ5, HIZC13_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) HIZC12_IRQ4, HIZC12_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) HIZC11_IRQ3, HIZC11_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) HIZC10_IRQ2, HIZC10_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) HIZC9_IRQ1, HIZC9_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) HIZC8_IRQ0, HIZC8_HIZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) { PINMUX_CFG_REG("MSELCRB", 0xa4050182, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) MSELB9_VIO, MSELB9_VIO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) MSELB8_RGB, MSELB8_SYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) static const struct pinmux_data_reg pinmux_data_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) { PINMUX_DATA_REG("PADR", 0xa4050120, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) { PINMUX_DATA_REG("PBDR", 0xa4050122, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) { PINMUX_DATA_REG("PCDR", 0xa4050124, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) PTC7_DATA, 0, PTC5_DATA, PTC4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) PTC3_DATA, PTC2_DATA, 0, PTC0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) { PINMUX_DATA_REG("PDDR", 0xa4050126, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) { PINMUX_DATA_REG("PEDR", 0xa4050128, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) 0, 0, PTE1_DATA, PTE0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) { PINMUX_DATA_REG("PFDR", 0xa405012a, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) 0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) { PINMUX_DATA_REG("PGDR", 0xa405012c, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) 0, 0, 0, PTG4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) { PINMUX_DATA_REG("PHDR", 0xa405012e, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) { PINMUX_DATA_REG("PJDR", 0xa4050130, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) 0, 0, PTJ1_DATA, PTJ0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) { PINMUX_DATA_REG("PKDR", 0xa4050132, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) 0, PTK6_DATA, PTK5_DATA, PTK4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) { PINMUX_DATA_REG("PLDR", 0xa4050134, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) { PINMUX_DATA_REG("PMDR", 0xa4050136, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) { PINMUX_DATA_REG("PNDR", 0xa4050138, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) { PINMUX_DATA_REG("PQDR", 0xa405013a, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) { PINMUX_DATA_REG("PRDR", 0xa405013c, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) 0, 0, 0, PTR4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) { PINMUX_DATA_REG("PSDR", 0xa405013e, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) 0, 0, 0, PTS4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) { PINMUX_DATA_REG("PTDR", 0xa4050160, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) 0, 0, 0, PTT4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) { PINMUX_DATA_REG("PUDR", 0xa4050162, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) 0, 0, 0, PTU4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) { PINMUX_DATA_REG("PVDR", 0xa4050164, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) 0, 0, 0, PTV4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) { PINMUX_DATA_REG("PWDR", 0xa4050166, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) 0, PTW6_DATA, PTW5_DATA, PTW4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) { PINMUX_DATA_REG("PXDR", 0xa4050168, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) 0, PTX6_DATA, PTX5_DATA, PTX4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) { PINMUX_DATA_REG("PYDR", 0xa405016a, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) 0, PTY6_DATA, PTY5_DATA, PTY4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) { PINMUX_DATA_REG("PZDR", 0xa405016c, 8, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) 0, 0, PTZ5_DATA, PTZ4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) const struct sh_pfc_soc_info sh7722_pinmux_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) .name = "sh7722_pfc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) .pins = pinmux_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) .nr_pins = ARRAY_SIZE(pinmux_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) .func_gpios = pinmux_func_gpios,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) .cfg_regs = pinmux_config_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) .data_regs = pinmux_data_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) .pinmux_data = pinmux_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) .pinmux_data_size = ARRAY_SIZE(pinmux_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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