^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SH7203 Pinmux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 Magnus Damm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <cpu/sh7203.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "sh_pfc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) PINMUX_RESERVED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) PINMUX_DATA_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) PB12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) PC14_DATA, PC13_DATA, PC12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) PF30_DATA, PF29_DATA, PF28_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) PINMUX_DATA_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) PINMUX_INPUT_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) FORCE_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) PA7_IN, PA6_IN, PA5_IN, PA4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) PA3_IN, PA2_IN, PA1_IN, PA0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) PB11_IN, PB10_IN, PB9_IN, PB8_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) PC14_IN, PC13_IN, PC12_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) PC11_IN, PC10_IN, PC9_IN, PC8_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) PC7_IN, PC6_IN, PC5_IN, PC4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PC3_IN, PC2_IN, PC1_IN, PC0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) PD15_IN, PD14_IN, PD13_IN, PD12_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PD11_IN, PD10_IN, PD9_IN, PD8_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PD7_IN, PD6_IN, PD5_IN, PD4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PD3_IN, PD2_IN, PD1_IN, PD0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PE15_IN, PE14_IN, PE13_IN, PE12_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PE11_IN, PE10_IN, PE9_IN, PE8_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PE7_IN, PE6_IN, PE5_IN, PE4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PE3_IN, PE2_IN, PE1_IN, PE0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PF30_IN, PF29_IN, PF28_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PF27_IN, PF26_IN, PF25_IN, PF24_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PF23_IN, PF22_IN, PF21_IN, PF20_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PF19_IN, PF18_IN, PF17_IN, PF16_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PF15_IN, PF14_IN, PF13_IN, PF12_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PF11_IN, PF10_IN, PF9_IN, PF8_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PF7_IN, PF6_IN, PF5_IN, PF4_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PF3_IN, PF2_IN, PF1_IN, PF0_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PINMUX_INPUT_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PINMUX_OUTPUT_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) FORCE_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PC14_OUT, PC13_OUT, PC12_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PF30_OUT, PF29_OUT, PF28_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINMUX_OUTPUT_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINMUX_FUNCTION_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PB11_IOR_IN, PB11_IOR_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PB10_IOR_IN, PB10_IOR_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PB9_IOR_IN, PB9_IOR_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PB8_IOR_IN, PB8_IOR_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PB11MD_0, PB11MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PB10MD_0, PB10MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PB9MD_00, PB9MD_01, PB9MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PB8MD_00, PB8MD_01, PB8MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PB12IRQ_00, PB12IRQ_01, PB12IRQ_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PC14MD_0, PC14MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PC13MD_0, PC13MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PC12MD_0, PC12MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PC11MD_00, PC11MD_01, PC11MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PC10MD_00, PC10MD_01, PC10MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PC9MD_0, PC9MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PC8MD_0, PC8MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PC7MD_0, PC7MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PC6MD_0, PC6MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PC5MD_0, PC5MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PC4MD_0, PC4MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PC3MD_0, PC3MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PC2MD_0, PC2MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PC1MD_0, PC1MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PC0MD_00, PC0MD_01, PC0MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PE15MD_00, PE15MD_01, PE15MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PE14MD_00, PE14MD_01, PE14MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PE13MD_00, PE13MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PE12MD_00, PE12MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) PE3MD_00, PE3MD_01, PE3MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PE2MD_00, PE2MD_01, PE2MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) PF30MD_0, PF30MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) PF29MD_0, PF29MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) PF28MD_0, PF28MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PF27MD_0, PF27MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) PF26MD_0, PF26MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PF25MD_0, PF25MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PF24MD_0, PF24MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) PF23MD_00, PF23MD_01, PF23MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) PF22MD_00, PF22MD_01, PF22MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PF21MD_00, PF21MD_01, PF21MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PF20MD_00, PF20MD_01, PF20MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PF19MD_00, PF19MD_01, PF19MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PF18MD_00, PF18MD_01, PF18MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PF17MD_00, PF17MD_01, PF17MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PF16MD_00, PF16MD_01, PF16MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PF15MD_00, PF15MD_01, PF15MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PF14MD_00, PF14MD_01, PF14MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PF13MD_00, PF13MD_01, PF13MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PF12MD_00, PF12MD_01, PF12MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) PF11MD_00, PF11MD_01, PF11MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PF10MD_00, PF10MD_01, PF10MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PF9MD_00, PF9MD_01, PF9MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PF8MD_00, PF8MD_01, PF8MD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PINMUX_FUNCTION_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PINMUX_MARK_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) UBCTRG_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) CRX0_MARK, CRX0_CRX1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) SDA3_MARK, SCL3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) SDA2_MARK, SCL2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) SDA1_MARK, SCL1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) SDA0_MARK, SCL0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ADTRG_PD_MARK, ADTRG_PE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) D31_MARK, D30_MARK, D29_MARK, D28_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) D27_MARK, D26_MARK, D25_MARK, D24_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) D23_MARK, D22_MARK, D21_MARK, D20_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) D19_MARK, D18_MARK, D17_MARK, D16_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) A25_MARK, A24_MARK, A23_MARK, A22_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) A21_MARK, CS4_MARK, MRES_MARK, BS_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) TXD0_MARK, RXD0_MARK, SCK0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) TXD1_MARK, RXD1_MARK, SCK1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) TXD2_MARK, RXD2_MARK, SCK2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) RTS3_MARK, CTS3_MARK, TXD3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) RXD3_MARK, SCK3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) AUDIO_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) FCE_MARK, FRB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) PINMUX_MARK_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static const u16 pinmux_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /* PA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) PINMUX_DATA(PA7_DATA, PA7_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) PINMUX_DATA(PA6_DATA, PA6_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) PINMUX_DATA(PA5_DATA, PA5_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) PINMUX_DATA(PA4_DATA, PA4_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) PINMUX_DATA(PA3_DATA, PA3_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) PINMUX_DATA(PA2_DATA, PA2_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) PINMUX_DATA(PA1_DATA, PA1_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) PINMUX_DATA(PA0_DATA, PA0_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* PB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) PINMUX_DATA(UBCTRG_MARK, PB12MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) PINMUX_DATA(CTX1_MARK, PB11MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) PINMUX_DATA(CRX1_MARK, PB10MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) PINMUX_DATA(CTX0_MARK, PB9MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) PINMUX_DATA(CRX0_MARK, PB8MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) PINMUX_DATA(PB7_DATA, PB7MD_00, FORCE_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) PINMUX_DATA(SDA3_MARK, PB7MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) PINMUX_DATA(PINT7_PB_MARK, PB7MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) PINMUX_DATA(PB6_DATA, PB6MD_00, FORCE_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) PINMUX_DATA(SCL3_MARK, PB6MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) PINMUX_DATA(PINT6_PB_MARK, PB6MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) PINMUX_DATA(PB5_DATA, PB5MD_00, FORCE_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) PINMUX_DATA(SDA2_MARK, PB6MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) PINMUX_DATA(PINT5_PB_MARK, PB6MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) PINMUX_DATA(PB4_DATA, PB4MD_00, FORCE_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) PINMUX_DATA(SCL2_MARK, PB4MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) PINMUX_DATA(PINT4_PB_MARK, PB4MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) PINMUX_DATA(PB3_DATA, PB3MD_00, FORCE_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) PINMUX_DATA(SDA1_MARK, PB3MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) PINMUX_DATA(PINT3_PB_MARK, PB3MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) PINMUX_DATA(PB2_DATA, PB2MD_00, FORCE_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) PINMUX_DATA(SCL1_MARK, PB2MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) PINMUX_DATA(PINT2_PB_MARK, PB2MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) PINMUX_DATA(PB1_DATA, PB1MD_00, FORCE_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) PINMUX_DATA(SDA0_MARK, PB1MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) PINMUX_DATA(PINT1_PB_MARK, PB1MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) PINMUX_DATA(PB0_DATA, PB0MD_00, FORCE_IN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) PINMUX_DATA(SCL0_MARK, PB0MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) PINMUX_DATA(PINT0_PB_MARK, PB0MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* PC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) PINMUX_DATA(WAIT_MARK, PC14MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) PINMUX_DATA(RDWR_MARK, PC13MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) PINMUX_DATA(CKE_MARK, PC12MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) PINMUX_DATA(CASU_MARK, PC11MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) PINMUX_DATA(BREQ_MARK, PC11MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) PINMUX_DATA(RASU_MARK, PC10MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) PINMUX_DATA(BACK_MARK, PC10MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) PINMUX_DATA(CASL_MARK, PC9MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) PINMUX_DATA(RASL_MARK, PC8MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) PINMUX_DATA(CS3_MARK, PC3MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) PINMUX_DATA(CS2_MARK, PC2MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) PINMUX_DATA(A1_MARK, PC1MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) PINMUX_DATA(A0_MARK, PC0MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) PINMUX_DATA(CS7_MARK, PC0MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* PD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) PINMUX_DATA(D31_MARK, PD15MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) PINMUX_DATA(PINT7_PD_MARK, PD15MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) PINMUX_DATA(TIOC4D_MARK, PD15MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) PINMUX_DATA(D30_MARK, PD14MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) PINMUX_DATA(PINT6_PD_MARK, PD14MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) PINMUX_DATA(TIOC4C_MARK, PD14MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) PINMUX_DATA(D29_MARK, PD13MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) PINMUX_DATA(PINT5_PD_MARK, PD13MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) PINMUX_DATA(TEND1_PD_MARK, PD13MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) PINMUX_DATA(TIOC4B_MARK, PD13MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) PINMUX_DATA(D28_MARK, PD12MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) PINMUX_DATA(PINT4_PD_MARK, PD12MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) PINMUX_DATA(DACK1_PD_MARK, PD12MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) PINMUX_DATA(TIOC4A_MARK, PD12MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) PINMUX_DATA(D27_MARK, PD11MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) PINMUX_DATA(PINT3_PD_MARK, PD11MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) PINMUX_DATA(TIOC3D_MARK, PD11MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) PINMUX_DATA(D26_MARK, PD10MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) PINMUX_DATA(PINT2_PD_MARK, PD10MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) PINMUX_DATA(TEND0_PD_MARK, PD10MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) PINMUX_DATA(TIOC3C_MARK, PD10MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) PINMUX_DATA(D25_MARK, PD9MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) PINMUX_DATA(PINT1_PD_MARK, PD9MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) PINMUX_DATA(DACK0_PD_MARK, PD9MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) PINMUX_DATA(TIOC3B_MARK, PD9MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) PINMUX_DATA(D24_MARK, PD8MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) PINMUX_DATA(PINT0_PD_MARK, PD8MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) PINMUX_DATA(TIOC3A_MARK, PD8MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) PINMUX_DATA(D23_MARK, PD7MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) PINMUX_DATA(SCS1_PD_MARK, PD7MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) PINMUX_DATA(TIOC2B_MARK, PD7MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) PINMUX_DATA(D22_MARK, PD6MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) PINMUX_DATA(SSO1_PD_MARK, PD6MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) PINMUX_DATA(TIOC2A_MARK, PD6MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) PINMUX_DATA(D21_MARK, PD5MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) PINMUX_DATA(SSI1_PD_MARK, PD5MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) PINMUX_DATA(TIOC1B_MARK, PD5MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) PINMUX_DATA(D20_MARK, PD4MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) PINMUX_DATA(TIOC1A_MARK, PD4MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) PINMUX_DATA(D19_MARK, PD3MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) PINMUX_DATA(SCS0_PD_MARK, PD3MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) PINMUX_DATA(DACK3_MARK, PD3MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) PINMUX_DATA(TIOC0D_MARK, PD3MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) PINMUX_DATA(D18_MARK, PD2MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) PINMUX_DATA(SSO0_PD_MARK, PD2MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) PINMUX_DATA(DREQ3_MARK, PD2MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) PINMUX_DATA(TIOC0C_MARK, PD2MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) PINMUX_DATA(D17_MARK, PD1MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) PINMUX_DATA(SSI0_PD_MARK, PD1MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) PINMUX_DATA(DACK2_MARK, PD1MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) PINMUX_DATA(TIOC0B_MARK, PD1MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) PINMUX_DATA(D16_MARK, PD0MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) PINMUX_DATA(DREQ2_MARK, PD0MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) PINMUX_DATA(TIOC0A_MARK, PD0MD_101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* PE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) PINMUX_DATA(IOIS16_MARK, PE15MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) PINMUX_DATA(RTS3_MARK, PE15MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) PINMUX_DATA(CS1_MARK, PE14MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) PINMUX_DATA(CTS3_MARK, PE14MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) PINMUX_DATA(TXD3_MARK, PE13MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) PINMUX_DATA(RXD3_MARK, PE12MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) PINMUX_DATA(TEND1_PE_MARK, PE11MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) PINMUX_DATA(CE2B_MARK, PE10MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) PINMUX_DATA(TEND0_PE_MARK, PE10MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) PINMUX_DATA(SCK3_MARK, PE9MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) PINMUX_DATA(CE2A_MARK, PE8MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) PINMUX_DATA(SCK2_MARK, PE8MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) PINMUX_DATA(FRAME_MARK, PE7MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) PINMUX_DATA(TXD2_MARK, PE7MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) PINMUX_DATA(DACK1_PE_MARK, PE7MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PINMUX_DATA(A25_MARK, PE6MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) PINMUX_DATA(RXD2_MARK, PE6MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) PINMUX_DATA(A24_MARK, PE5MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) PINMUX_DATA(TXD1_MARK, PE5MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) PINMUX_DATA(DACK0_PE_MARK, PE5MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) PINMUX_DATA(A23_MARK, PE4MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) PINMUX_DATA(RXD1_MARK, PE4MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) PINMUX_DATA(A22_MARK, PE3MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) PINMUX_DATA(SCK1_MARK, PE3MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) PINMUX_DATA(A21_MARK, PE2MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) PINMUX_DATA(SCK0_MARK, PE2MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) PINMUX_DATA(CS4_MARK, PE1MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) PINMUX_DATA(MRES_MARK, PE1MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) PINMUX_DATA(TXD0_MARK, PE1MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) PINMUX_DATA(BS_MARK, PE0MD_001),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) PINMUX_DATA(RXD0_MARK, PE0MD_011),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) /* PF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) PINMUX_DATA(SSIDATA3_MARK, PF29MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) PINMUX_DATA(SSIWS3_MARK, PF28MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) PINMUX_DATA(SSISCK3_MARK, PF27MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) PINMUX_DATA(SSIDATA2_MARK, PF26MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) PINMUX_DATA(SSIWS2_MARK, PF25MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) PINMUX_DATA(SSISCK2_MARK, PF24MD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) PINMUX_DATA(SSIDATA1_MARK, PF23MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) PINMUX_DATA(SSIWS1_MARK, PF22MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) PINMUX_DATA(SSISCK1_MARK, PF21MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) PINMUX_DATA(LCD_CLK_MARK, PF21MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) PINMUX_DATA(SSIDATA0_MARK, PF20MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) PINMUX_DATA(LCD_FLM_MARK, PF20MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) PINMUX_DATA(SSIWS0_MARK, PF19MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) PINMUX_DATA(SSISCK0_MARK, PF18MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) PINMUX_DATA(LCD_CL2_MARK, PF18MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) PINMUX_DATA(FCE_MARK, PF17MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) PINMUX_DATA(LCD_CL1_MARK, PF17MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) PINMUX_DATA(FRB_MARK, PF16MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) PINMUX_DATA(LCD_DON_MARK, PF16MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) PINMUX_DATA(NAF7_MARK, PF15MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) PINMUX_DATA(NAF6_MARK, PF14MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) PINMUX_DATA(NAF5_MARK, PF13MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) PINMUX_DATA(NAF4_MARK, PF12MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) PINMUX_DATA(NAF3_MARK, PF11MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) PINMUX_DATA(NAF2_MARK, PF10MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) PINMUX_DATA(NAF1_MARK, PF9MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) PINMUX_DATA(NAF0_MARK, PF8MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) PINMUX_DATA(FSC_MARK, PF7MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) PINMUX_DATA(SCS1_PF_MARK, PF7MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) PINMUX_DATA(FOE_MARK, PF6MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) PINMUX_DATA(SSO1_PF_MARK, PF6MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) PINMUX_DATA(FCDE_MARK, PF5MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) PINMUX_DATA(SSI1_PF_MARK, PF5MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) PINMUX_DATA(FWE_MARK, PF4MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) PINMUX_DATA(SCS0_PF_MARK, PF3MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) PINMUX_DATA(SSO0_PF_MARK, PF2MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) PINMUX_DATA(SSI0_PF_MARK, PF1MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) static const struct sh_pfc_pin pinmux_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) /* PA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) PINMUX_GPIO(PA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) PINMUX_GPIO(PA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) PINMUX_GPIO(PA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) PINMUX_GPIO(PA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) PINMUX_GPIO(PA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) PINMUX_GPIO(PA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) PINMUX_GPIO(PA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) PINMUX_GPIO(PA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) /* PB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) PINMUX_GPIO(PB12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) PINMUX_GPIO(PB11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) PINMUX_GPIO(PB10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) PINMUX_GPIO(PB9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) PINMUX_GPIO(PB8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) PINMUX_GPIO(PB7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) PINMUX_GPIO(PB6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) PINMUX_GPIO(PB5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) PINMUX_GPIO(PB4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) PINMUX_GPIO(PB3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) PINMUX_GPIO(PB2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) PINMUX_GPIO(PB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) PINMUX_GPIO(PB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) /* PC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) PINMUX_GPIO(PC14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) PINMUX_GPIO(PC13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) PINMUX_GPIO(PC12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) PINMUX_GPIO(PC11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) PINMUX_GPIO(PC10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) PINMUX_GPIO(PC9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) PINMUX_GPIO(PC8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) PINMUX_GPIO(PC7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) PINMUX_GPIO(PC6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) PINMUX_GPIO(PC5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) PINMUX_GPIO(PC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) PINMUX_GPIO(PC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) PINMUX_GPIO(PC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) PINMUX_GPIO(PC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) PINMUX_GPIO(PC0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) /* PD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) PINMUX_GPIO(PD15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) PINMUX_GPIO(PD14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) PINMUX_GPIO(PD13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) PINMUX_GPIO(PD12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) PINMUX_GPIO(PD11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) PINMUX_GPIO(PD10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) PINMUX_GPIO(PD9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) PINMUX_GPIO(PD8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) PINMUX_GPIO(PD7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) PINMUX_GPIO(PD6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) PINMUX_GPIO(PD5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) PINMUX_GPIO(PD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) PINMUX_GPIO(PD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) PINMUX_GPIO(PD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) PINMUX_GPIO(PD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) PINMUX_GPIO(PD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) /* PE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) PINMUX_GPIO(PE15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) PINMUX_GPIO(PE14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) PINMUX_GPIO(PE13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) PINMUX_GPIO(PE12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) PINMUX_GPIO(PE11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) PINMUX_GPIO(PE10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) PINMUX_GPIO(PE9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) PINMUX_GPIO(PE8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) PINMUX_GPIO(PE7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) PINMUX_GPIO(PE6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) PINMUX_GPIO(PE5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) PINMUX_GPIO(PE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) PINMUX_GPIO(PE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) PINMUX_GPIO(PE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) PINMUX_GPIO(PE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) PINMUX_GPIO(PE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) /* PF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) PINMUX_GPIO(PF30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) PINMUX_GPIO(PF29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) PINMUX_GPIO(PF28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) PINMUX_GPIO(PF27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) PINMUX_GPIO(PF26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) PINMUX_GPIO(PF25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) PINMUX_GPIO(PF24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) PINMUX_GPIO(PF23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) PINMUX_GPIO(PF22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) PINMUX_GPIO(PF21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) PINMUX_GPIO(PF20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) PINMUX_GPIO(PF19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) PINMUX_GPIO(PF18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) PINMUX_GPIO(PF17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) PINMUX_GPIO(PF16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) PINMUX_GPIO(PF15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) PINMUX_GPIO(PF14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) PINMUX_GPIO(PF13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) PINMUX_GPIO(PF12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) PINMUX_GPIO(PF11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) PINMUX_GPIO(PF10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) PINMUX_GPIO(PF9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) PINMUX_GPIO(PF8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) PINMUX_GPIO(PF7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) PINMUX_GPIO(PF6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) PINMUX_GPIO(PF5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) PINMUX_GPIO(PF4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) PINMUX_GPIO(PF3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) PINMUX_GPIO(PF2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) PINMUX_GPIO(PF1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) PINMUX_GPIO(PF0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) static const struct pinmux_func pinmux_func_gpios[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /* INTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) GPIO_FN(PINT7_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) GPIO_FN(PINT6_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) GPIO_FN(PINT5_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) GPIO_FN(PINT4_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) GPIO_FN(PINT3_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) GPIO_FN(PINT2_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) GPIO_FN(PINT1_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) GPIO_FN(PINT0_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) GPIO_FN(PINT7_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) GPIO_FN(PINT6_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) GPIO_FN(PINT5_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) GPIO_FN(PINT4_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) GPIO_FN(PINT3_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) GPIO_FN(PINT2_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) GPIO_FN(PINT1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) GPIO_FN(PINT0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) GPIO_FN(IRQ7_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) GPIO_FN(IRQ6_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) GPIO_FN(IRQ5_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) GPIO_FN(IRQ4_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) GPIO_FN(IRQ3_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) GPIO_FN(IRQ2_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) GPIO_FN(IRQ1_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) GPIO_FN(IRQ0_PB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) GPIO_FN(IRQ7_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) GPIO_FN(IRQ6_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) GPIO_FN(IRQ5_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) GPIO_FN(IRQ4_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) GPIO_FN(IRQ3_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) GPIO_FN(IRQ2_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) GPIO_FN(IRQ1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) GPIO_FN(IRQ0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) GPIO_FN(IRQ7_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) GPIO_FN(IRQ6_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) GPIO_FN(IRQ5_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) GPIO_FN(IRQ4_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) GPIO_FN(IRQ3_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) GPIO_FN(IRQ2_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) GPIO_FN(IRQ1_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) GPIO_FN(IRQ0_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) GPIO_FN(WDTOVF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) GPIO_FN(IRQOUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) GPIO_FN(REFOUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) GPIO_FN(IRQOUT_REFOUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) GPIO_FN(UBCTRG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) /* CAN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) GPIO_FN(CTX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) GPIO_FN(CRX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) GPIO_FN(CTX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) GPIO_FN(CTX0_CTX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) GPIO_FN(CRX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) GPIO_FN(CRX0_CRX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) /* IIC3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) GPIO_FN(SDA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) GPIO_FN(SCL3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) GPIO_FN(SDA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) GPIO_FN(SCL2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) GPIO_FN(SDA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) GPIO_FN(SCL1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) GPIO_FN(SDA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) GPIO_FN(SCL0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) /* DMAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) GPIO_FN(TEND0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) GPIO_FN(TEND0_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) GPIO_FN(DACK0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) GPIO_FN(DACK0_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) GPIO_FN(DREQ0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) GPIO_FN(DREQ0_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) GPIO_FN(TEND1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) GPIO_FN(TEND1_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) GPIO_FN(DACK1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) GPIO_FN(DACK1_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) GPIO_FN(DREQ1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) GPIO_FN(DREQ1_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) GPIO_FN(DACK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) GPIO_FN(DREQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) GPIO_FN(DACK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) GPIO_FN(DREQ3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) /* ADC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) GPIO_FN(ADTRG_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) GPIO_FN(ADTRG_PE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) /* BSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) GPIO_FN(D31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) GPIO_FN(D30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) GPIO_FN(D29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) GPIO_FN(D28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) GPIO_FN(D27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) GPIO_FN(D26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) GPIO_FN(D25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) GPIO_FN(D24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) GPIO_FN(D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) GPIO_FN(D22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) GPIO_FN(D21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) GPIO_FN(D20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) GPIO_FN(D19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) GPIO_FN(D18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) GPIO_FN(D17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) GPIO_FN(D16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) GPIO_FN(A25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) GPIO_FN(A24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) GPIO_FN(A23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) GPIO_FN(A22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) GPIO_FN(A21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) GPIO_FN(CS4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) GPIO_FN(MRES),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) GPIO_FN(BS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) GPIO_FN(IOIS16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) GPIO_FN(CS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) GPIO_FN(CS6_CE1B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) GPIO_FN(CE2B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) GPIO_FN(CS5_CE1A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) GPIO_FN(CE2A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) GPIO_FN(FRAME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) GPIO_FN(WAIT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) GPIO_FN(RDWR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) GPIO_FN(CKE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) GPIO_FN(CASU),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) GPIO_FN(BREQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) GPIO_FN(RASU),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) GPIO_FN(BACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) GPIO_FN(CASL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) GPIO_FN(RASL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) GPIO_FN(WE3_DQMUU_AH_ICIO_WR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) GPIO_FN(WE2_DQMUL_ICIORD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) GPIO_FN(WE1_DQMLU_WE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) GPIO_FN(WE0_DQMLL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) GPIO_FN(CS3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) GPIO_FN(CS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) GPIO_FN(A1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) GPIO_FN(A0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) GPIO_FN(CS7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) /* TMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) GPIO_FN(TIOC4D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) GPIO_FN(TIOC4C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) GPIO_FN(TIOC4B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) GPIO_FN(TIOC4A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) GPIO_FN(TIOC3D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) GPIO_FN(TIOC3C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) GPIO_FN(TIOC3B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) GPIO_FN(TIOC3A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) GPIO_FN(TIOC2B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) GPIO_FN(TIOC1B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) GPIO_FN(TIOC2A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) GPIO_FN(TIOC1A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) GPIO_FN(TIOC0D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) GPIO_FN(TIOC0C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) GPIO_FN(TIOC0B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) GPIO_FN(TIOC0A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) GPIO_FN(TCLKD_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) GPIO_FN(TCLKC_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) GPIO_FN(TCLKB_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) GPIO_FN(TCLKA_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) GPIO_FN(TCLKD_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) GPIO_FN(TCLKC_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) GPIO_FN(TCLKB_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) GPIO_FN(TCLKA_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) /* SSU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) GPIO_FN(SCS0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) GPIO_FN(SSO0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) GPIO_FN(SSI0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) GPIO_FN(SSCK0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) GPIO_FN(SCS0_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) GPIO_FN(SSO0_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) GPIO_FN(SSI0_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) GPIO_FN(SSCK0_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) GPIO_FN(SCS1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) GPIO_FN(SSO1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) GPIO_FN(SSI1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) GPIO_FN(SSCK1_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) GPIO_FN(SCS1_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) GPIO_FN(SSO1_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) GPIO_FN(SSI1_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) GPIO_FN(SSCK1_PF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) /* SCIF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) GPIO_FN(TXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) GPIO_FN(RXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) GPIO_FN(SCK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) GPIO_FN(TXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) GPIO_FN(RXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) GPIO_FN(SCK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) GPIO_FN(TXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) GPIO_FN(RXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) GPIO_FN(SCK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) GPIO_FN(RTS3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) GPIO_FN(CTS3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) GPIO_FN(TXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) GPIO_FN(RXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) GPIO_FN(SCK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) /* SSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) GPIO_FN(AUDIO_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) GPIO_FN(SSIDATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) GPIO_FN(SSIWS3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) GPIO_FN(SSISCK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) GPIO_FN(SSIDATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) GPIO_FN(SSIWS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) GPIO_FN(SSISCK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) GPIO_FN(SSIDATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) GPIO_FN(SSIWS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) GPIO_FN(SSISCK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) GPIO_FN(SSIDATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) GPIO_FN(SSIWS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) GPIO_FN(SSISCK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) /* FLCTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) GPIO_FN(FCE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) GPIO_FN(FRB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) GPIO_FN(NAF7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) GPIO_FN(NAF6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) GPIO_FN(NAF5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) GPIO_FN(NAF4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) GPIO_FN(NAF3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) GPIO_FN(NAF2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) GPIO_FN(NAF1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) GPIO_FN(NAF0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) GPIO_FN(FSC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) GPIO_FN(FOE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) GPIO_FN(FCDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) GPIO_FN(FWE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) /* LCDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) GPIO_FN(LCD_VEPWC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) GPIO_FN(LCD_VCPWC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) GPIO_FN(LCD_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) GPIO_FN(LCD_FLM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) GPIO_FN(LCD_M_DISP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) GPIO_FN(LCD_CL2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) GPIO_FN(LCD_CL1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) GPIO_FN(LCD_DON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) GPIO_FN(LCD_DATA15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) GPIO_FN(LCD_DATA14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) GPIO_FN(LCD_DATA13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) GPIO_FN(LCD_DATA12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) GPIO_FN(LCD_DATA11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) GPIO_FN(LCD_DATA10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) GPIO_FN(LCD_DATA9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) GPIO_FN(LCD_DATA8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) GPIO_FN(LCD_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) GPIO_FN(LCD_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) GPIO_FN(LCD_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) GPIO_FN(LCD_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) GPIO_FN(LCD_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) GPIO_FN(LCD_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) GPIO_FN(LCD_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) GPIO_FN(LCD_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) static const struct pinmux_cfg_reg pinmux_config_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) PB11_IN, PB11_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) PB10_IN, PB10_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) PB9_IN, PB9_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) PB8_IN, PB8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) PB11MD_0, PB11MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) PB10MD_0, PB10MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) PB9MD_00, PB9MD_01, PB9MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) PB8MD_00, PB8MD_01, PB8MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) PC14_IN, PC14_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) PC13_IN, PC13_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) PC12_IN, PC12_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) PC11_IN, PC11_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) PC10_IN, PC10_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) PC9_IN, PC9_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) PC8_IN, PC8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) PC7_IN, PC7_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) PC6_IN, PC6_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) PC5_IN, PC5_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) PC4_IN, PC4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) PC3_IN, PC3_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) PC2_IN, PC2_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) PC1_IN, PC1_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) PC0_IN, PC0_OUT ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) PC14MD_0, PC14MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) PC13MD_0, PC13MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) PC12MD_0, PC12MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) PC11MD_00, PC11MD_01, PC11MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) PC10MD_00, PC10MD_01, PC10MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) PC9MD_0, PC9MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) PC8MD_0, PC8MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) PC7MD_0, PC7MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) PC6MD_0, PC6MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) PC5MD_0, PC5MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) PC4MD_0, PC4MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) PC3MD_0, PC3MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) PC2MD_0, PC2MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) PC1MD_0, PC1MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) PC0MD_00, PC0MD_01, PC0MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) PD15_IN, PD15_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) PD14_IN, PD14_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) PD13_IN, PD13_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) PD12_IN, PD12_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) PD11_IN, PD11_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) PD10_IN, PD10_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) PD9_IN, PD9_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) PD8_IN, PD8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) PD7_IN, PD7_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) PD6_IN, PD6_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) PD5_IN, PD5_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) PD4_IN, PD4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) PD3_IN, PD3_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) PD2_IN, PD2_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) PD1_IN, PD1_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) PD0_IN, PD0_OUT ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) PD15MD_000, PD15MD_001, PD15MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) PD15MD_100, PD15MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) PD14MD_000, PD14MD_001, PD14MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) 0, PD14MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) PD13MD_000, PD13MD_001, PD13MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) PD13MD_100, PD13MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) PD12MD_000, PD12MD_001, PD12MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) PD12MD_100, PD12MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) PD11MD_000, PD11MD_001, PD11MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) PD11MD_100, PD11MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) PD10MD_000, PD10MD_001, PD10MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) PD10MD_100, PD10MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) PD9MD_000, PD9MD_001, PD9MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) PD9MD_100, PD9MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) PD8MD_000, PD8MD_001, PD8MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) PD8MD_100, PD8MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) { PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) PD7MD_100, PD7MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) PD6MD_100, PD6MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) PD5MD_100, PD5MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) PD4MD_100, PD4MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) { PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) PD3MD_100, PD3MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) PD2MD_100, PD2MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) PD1MD_100, PD1MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) PD0MD_100, PD0MD_101, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) { PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) PE15_IN, PE15_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) PE14_IN, PE14_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) PE13_IN, PE13_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) PE12_IN, PE12_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) PE11_IN, PE11_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) PE10_IN, PE10_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) PE9_IN, PE9_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) PE8_IN, PE8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) PE7_IN, PE7_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) PE6_IN, PE6_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) PE5_IN, PE5_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) PE4_IN, PE4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) PE3_IN, PE3_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) PE2_IN, PE2_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) PE1_IN, PE1_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) PE0_IN, PE0_OUT ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) { PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) PE15MD_00, PE15MD_01, 0, PE15MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) PE14MD_00, PE14MD_01, 0, PE14MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) PE13MD_00, 0, 0, PE13MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) PE12MD_00, 0, 0, PE12MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) { PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) PE11MD_000, PE11MD_001, PE11MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) PE11MD_100, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) PE10MD_000, PE10MD_001, PE10MD_010, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) PE10MD_100, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) { PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) PE7MD_100, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) PE6MD_100, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) PE5MD_100, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) PE4MD_100, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) { PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) PE3MD_00, PE3MD_01, 0, PE3MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) PE2MD_00, PE2MD_01, 0, PE2MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) PE0MD_000, PE0MD_001, 0, PE0MD_011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) PE0MD_100, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) { PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) PF30_IN, PF30_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) PF29_IN, PF29_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) PF28_IN, PF28_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) PF27_IN, PF27_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) PF26_IN, PF26_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) PF25_IN, PF25_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) PF24_IN, PF24_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) PF23_IN, PF23_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) PF22_IN, PF22_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) PF21_IN, PF21_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) PF20_IN, PF20_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) PF19_IN, PF19_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) PF18_IN, PF18_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) PF17_IN, PF17_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) PF16_IN, PF16_OUT ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) { PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) PF15_IN, PF15_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) PF14_IN, PF14_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) PF13_IN, PF13_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) PF12_IN, PF12_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) PF11_IN, PF11_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) PF10_IN, PF10_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) PF9_IN, PF9_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) PF8_IN, PF8_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) PF7_IN, PF7_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) PF6_IN, PF6_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) PF5_IN, PF5_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) PF4_IN, PF4_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) PF3_IN, PF3_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) PF2_IN, PF2_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) PF1_IN, PF1_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) PF0_IN, PF0_OUT ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) { PINMUX_CFG_REG("PFCRH4", 0xfffe3a88, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) PF30MD_0, PF30MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) PF29MD_0, PF29MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) PF28MD_0, PF28MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) { PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) PF27MD_0, PF27MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) PF26MD_0, PF26MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) PF25MD_0, PF25MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) PF24MD_0, PF24MD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) { PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) PF23MD_00, PF23MD_01, PF23MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) PF22MD_00, PF22MD_01, PF22MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) PF21MD_00, PF21MD_01, PF21MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) PF20MD_00, PF20MD_01, PF20MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) { PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) PF19MD_00, PF19MD_01, PF19MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) PF18MD_00, PF18MD_01, PF18MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) PF17MD_00, PF17MD_01, PF17MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) PF16MD_00, PF16MD_01, PF16MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) { PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) PF15MD_00, PF15MD_01, PF15MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) PF14MD_00, PF14MD_01, PF14MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) PF13MD_00, PF13MD_01, PF13MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) PF12MD_00, PF12MD_01, PF12MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) { PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) PF11MD_00, PF11MD_01, PF11MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) PF10MD_00, PF10MD_01, PF10MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) PF9MD_00, PF9MD_01, PF9MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) PF8MD_00, PF8MD_01, PF8MD_10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) { PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) { PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) static const struct pinmux_data_reg pinmux_data_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) 0, 0, 0, PB12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) 0, PC14_DATA, PC13_DATA, PC12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) 0, PF30_DATA, PF29_DATA, PF28_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) const struct sh_pfc_soc_info sh7203_pinmux_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) .name = "sh7203_pfc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) .pins = pinmux_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) .nr_pins = ARRAY_SIZE(pinmux_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) .func_gpios = pinmux_func_gpios,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) .cfg_regs = pinmux_config_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) .data_regs = pinmux_data_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) .pinmux_data = pinmux_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) .pinmux_data_size = ARRAY_SIZE(pinmux_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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