^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * r8a7792 processor support - PFC hardware block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013-2014 Renesas Electronics Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2016 Cogent Embedded, Inc., <source@cogentembedded.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "sh_pfc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CPU_ALL_GP(fn, sfx) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) PORT_GP_29(0, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) PORT_GP_23(1, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) PORT_GP_32(2, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PORT_GP_28(3, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) PORT_GP_17(4, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) PORT_GP_17(5, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) PORT_GP_17(6, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) PORT_GP_17(7, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) PORT_GP_17(8, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) PORT_GP_17(9, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) PORT_GP_32(10, fn, sfx), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PORT_GP_30(11, fn, sfx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PINMUX_RESERVED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) PINMUX_DATA_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) GP_ALL(DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PINMUX_DATA_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PINMUX_FUNCTION_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) GP_ALL(FN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* GPSR0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) FN_IP0_17, FN_IP0_18, FN_IP0_19, FN_IP0_20, FN_IP0_21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) FN_IP0_22, FN_IP0_23, FN_IP1_0, FN_IP1_1, FN_IP1_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) FN_IP1_3, FN_IP1_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* GPSR1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8, FN_IP1_9, FN_IP1_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) FN_IP1_11, FN_IP1_12, FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) FN_DU1_DB5_C3_DATA15, FN_DU1_DB6_C4, FN_DU1_DB7_C5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_DU1_DISP, FN_DU1_CDE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* GPSR2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) FN_D0, FN_D1, FN_D2, FN_D3, FN_D4, FN_D5, FN_D6, FN_D7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) FN_D8, FN_D9, FN_D10, FN_D11, FN_D12, FN_D13, FN_D14, FN_D15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) FN_A0, FN_A1, FN_A2, FN_A3, FN_A4, FN_A5, FN_A6, FN_A7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) FN_A8, FN_A9, FN_A10, FN_A11, FN_A12, FN_A13, FN_A14, FN_A15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* GPSR3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) FN_A16, FN_A17, FN_A18, FN_A19, FN_IP1_17, FN_IP1_18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) FN_CS1_N_A26, FN_EX_CS0_N, FN_EX_CS1_N, FN_EX_CS2_N, FN_EX_CS3_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) FN_EX_CS4_N, FN_EX_CS5_N, FN_BS_N, FN_RD_N, FN_RD_WR_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) FN_WE0_N, FN_WE1_N, FN_EX_WAIT0, FN_IRQ0, FN_IRQ1, FN_IRQ2, FN_IRQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) FN_IP1_19, FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* GPSR4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC_N, FN_VI0_VSYNC_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) FN_VI0_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* GPSR5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC_N, FN_VI1_VSYNC_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) FN_VI1_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* GPSR6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3, FN_IP2_4, FN_IP2_5, FN_IP2_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) FN_IP2_7, FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11, FN_IP2_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) FN_IP2_13, FN_IP2_14, FN_IP2_15, FN_IP2_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* GPSR7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3, FN_IP3_4, FN_IP3_5, FN_IP3_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) FN_IP3_7, FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11, FN_IP3_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14, FN_VI3_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* GPSR8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2, FN_IP4_4, FN_IP4_6_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) FN_IP4_8_7, FN_IP4_10_9, FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) FN_IP4_18_17, FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* GPSR9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2, FN_IP5_3, FN_IP5_4, FN_IP5_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) FN_IP5_6, FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10, FN_IP5_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3, FN_VI5_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* GPSR10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) FN_IP6_0, FN_IP6_1, FN_HRTS0_N, FN_IP6_2, FN_IP6_3, FN_IP6_4, FN_IP6_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) FN_HCTS1_N, FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0_N, FN_RTS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) FN_TX0, FN_RX0, FN_SCK1, FN_CTS1_N, FN_RTS1_N, FN_TX1, FN_RX1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, FN_IP6_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX, FN_CAN0_RX, FN_CAN_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) FN_CAN1_TX, FN_CAN1_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* GPSR11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6, FN_IP7_7, FN_SD0_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) FN_SD0_CMD, FN_SD0_DAT0, FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) FN_SD0_CD, FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18, FN_IP7_19, FN_IP7_20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) FN_ADICLK, FN_ADICS_SAMP, FN_ADIDATA, FN_ADICHS0, FN_ADICHS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) FN_ADICHS2, FN_AVS1, FN_AVS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* IPSR0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) FN_DU0_DR3_Y5_DATA3, FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7, FN_DU0_DG0_DATA8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) FN_DU0_DG7_Y3_DATA15, FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) FN_DU0_DB3_C1, FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) FN_DU0_DB7_C5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* IPSR1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DISP, FN_DU0_CDE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) FN_DU1_DG2_C6_DATA6, FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10, FN_DU1_DG7_Y3_DATA11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1, FN_A22, FN_IO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* IPSR2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) FN_VI2_HSYNC_N, FN_AVB_RXD0, FN_VI2_VSYNC_N, FN_AVB_RXD1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) FN_VI2_FIELD, FN_AVB_TXD2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* IPSR3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) FN_VI3_HSYNC_N, FN_AVB_TXD5, FN_VI3_VSYNC_N, FN_AVB_TXD6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) FN_VI3_D11_Y3, FN_AVB_AVTP_MATCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* IPSR4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC_N, FN_VI0_D13_G5_Y5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) FN_VI4_VSYNC_N, FN_VI0_D14_G6_Y6, FN_RDR_CLKOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* IPSR5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_B, FN_VI5_HSYNC_N, FN_VI1_D13_G5_Y5_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) FN_VI5_VSYNC_N, FN_VI1_D14_G6_Y6_B, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* IPSR6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2, FN_DREQ0_N, FN_RX2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) FN_DACK1, FN_SCK3, FN_TX3, FN_DREQ1_N, FN_RX3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /* IPSR7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) FN_SSI_SCK34, FN_TPU0TO0, FN_SSI_WS34, FN_TPU0TO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) FN_AUDIO_CLKA, FN_AUDIO_CLKB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* MOD_SEL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) FN_SEL_VI1_0, FN_SEL_VI1_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PINMUX_FUNCTION_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PINMUX_MARK_BEGIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) DU1_DB2_C0_DATA12_MARK, DU1_DB3_C1_DATA13_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) DU1_DB4_C2_DATA14_MARK, DU1_DB5_C3_DATA15_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) DU1_DISP_MARK, DU1_CDE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK, D6_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK, D12_MARK, D13_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) D14_MARK, D15_MARK, A0_MARK, A1_MARK, A2_MARK, A3_MARK, A4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) A5_MARK, A6_MARK, A7_MARK, A8_MARK, A9_MARK, A10_MARK, A11_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) A12_MARK, A13_MARK, A14_MARK, A15_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) A16_MARK, A17_MARK, A18_MARK, A19_MARK, CS1_N_A26_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) EX_CS0_N_MARK, EX_CS1_N_MARK, EX_CS2_N_MARK, EX_CS3_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) EX_CS4_N_MARK, EX_CS5_N_MARK, BS_N_MARK, RD_N_MARK, RD_WR_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) WE0_N_MARK, WE1_N_MARK, EX_WAIT0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_N_MARK, VI0_VSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) VI0_D3_B3_C3_MARK, VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK, VI0_D8_G0_Y0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) VI0_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) VI1_CLK_MARK, VI1_CLKENB_MARK, VI1_HSYNC_N_MARK, VI1_VSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK, VI1_D2_B2_C2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) VI1_D3_B3_C3_MARK, VI1_D4_B4_C4_MARK, VI1_D5_B5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK, VI1_D8_G0_Y0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) VI1_D9_G1_Y1_MARK, VI1_D10_G2_Y2_MARK, VI1_D11_G3_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) VI1_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) VI3_D10_Y2_MARK, VI3_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) VI4_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) VI5_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) HRTS0_N_MARK, HCTS1_N_MARK, SCK0_MARK, CTS0_N_MARK, RTS0_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) TX0_MARK, RX0_MARK, SCK1_MARK, CTS1_N_MARK, RTS1_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) TX1_MARK, RX1_MARK, SCIF_CLK_MARK, CAN0_TX_MARK, CAN0_RX_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) CAN_CLK_MARK, CAN1_TX_MARK, CAN1_RX_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) SD0_CLK_MARK, SD0_CMD_MARK, SD0_DAT0_MARK, SD0_DAT1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) SD0_DAT2_MARK, SD0_DAT3_MARK, SD0_CD_MARK, SD0_WP_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ADICLK_MARK, ADICS_SAMP_MARK, ADIDATA_MARK, ADICHS0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* IPSR0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) DU0_DR0_DATA0_MARK, DU0_DR1_DATA1_MARK, DU0_DR2_Y4_DATA2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) DU0_DR3_Y5_DATA3_MARK, DU0_DR4_Y6_DATA4_MARK, DU0_DR5_Y7_DATA5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) DU0_DR6_Y8_DATA6_MARK, DU0_DR7_Y9_DATA7_MARK, DU0_DG0_DATA8_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) DU0_DG1_DATA9_MARK, DU0_DG2_C6_DATA10_MARK, DU0_DG3_C7_DATA11_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) DU0_DG4_Y0_DATA12_MARK, DU0_DG5_Y1_DATA13_MARK, DU0_DG6_Y2_DATA14_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DU0_DG7_Y3_DATA15_MARK, DU0_DB0_MARK, DU0_DB1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) DU0_DB2_C0_MARK, DU0_DB3_C1_MARK, DU0_DB4_C2_MARK, DU0_DB5_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) DU0_DB6_C4_MARK, DU0_DB7_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* IPSR1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, DU0_DISP_MARK, DU0_CDE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) DU1_DR2_Y4_DATA0_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR4_Y6_DATA2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) DU1_DR5_Y7_DATA3_MARK, DU1_DR6_DATA4_MARK, DU1_DR7_DATA5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) DU1_DG2_C6_DATA6_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG4_Y0_DATA8_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) DU1_DG5_Y1_DATA9_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG7_Y3_DATA11_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* IPSR2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) VI2_HSYNC_N_MARK, AVB_RXD0_MARK, VI2_VSYNC_N_MARK, AVB_RXD1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_TX_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) VI2_D8_Y0_MARK, AVB_RXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) VI2_D10_Y2_MARK, AVB_TXD0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) VI2_D11_Y3_MARK, AVB_TXD1_MARK, VI2_FIELD_MARK, AVB_TXD2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* IPSR3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) VI3_CLK_MARK, AVB_TXD3_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) VI3_HSYNC_N_MARK, AVB_TXD5_MARK, VI3_VSYNC_N_MARK, AVB_TXD6_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) VI3_D11_Y3_MARK, AVB_AVTP_MATCH_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* IPSR4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) VI0_D13_G5_Y5_MARK, VI4_VSYNC_N_MARK, VI0_D14_G6_Y6_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) RDR_CLKOUT_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK, VI4_D1_C1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) VI0_D16_R0_MARK, VI1_D12_G4_Y4_MARK, VI4_D2_C2_MARK, VI0_D17_R1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) VI1_D13_G5_Y5_MARK, VI4_D3_C3_MARK, VI0_D18_R2_MARK, VI1_D14_G6_Y6_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) VI4_D4_C4_MARK, VI0_D19_R3_MARK, VI1_D15_G7_Y7_MARK, VI4_D5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) VI0_D20_R4_MARK, VI2_D12_Y4_MARK, VI4_D6_C6_MARK, VI0_D21_R5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) VI2_D13_Y5_MARK, VI4_D7_C7_MARK, VI0_D22_R6_MARK, VI2_D14_Y6_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) VI4_D8_Y0_MARK, VI0_D23_R7_MARK, VI2_D15_Y7_MARK, VI4_D9_Y1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK, VI4_D11_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /* IPSR5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) VI5_CLKENB_MARK, VI1_D12_G4_Y4_B_MARK, VI5_HSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) VI1_D13_G5_Y5_B_MARK, VI5_VSYNC_N_MARK, VI1_D14_G6_Y6_B_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) VI5_D0_C0_MARK, VI1_D15_G7_Y7_B_MARK, VI5_D1_C1_MARK, VI1_D16_R0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) VI5_D2_C2_MARK, VI1_D17_R1_MARK, VI5_D3_C3_MARK, VI1_D18_R2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) VI5_D4_C4_MARK, VI1_D19_R3_MARK, VI5_D5_C5_MARK, VI1_D20_R4_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) VI5_D6_C6_MARK, VI1_D21_R5_MARK, VI5_D7_C7_MARK, VI1_D22_R6_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) VI5_D8_Y0_MARK, VI1_D23_R7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* IPSR6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK, DREQ0_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) RX2_MARK, DACK1_MARK, SCK3_MARK, TX3_MARK, DREQ1_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) RX3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* IPSR7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) PWM0_MARK, TCLK1_MARK, FSO_CFE_0_MARK, PWM1_MARK, TCLK2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) FSO_CFE_1_MARK, PWM2_MARK, TCLK3_MARK, FSO_TOE_MARK, PWM3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) PWM4_MARK, SSI_SCK34_MARK, TPU0TO0_MARK, SSI_WS34_MARK, TPU0TO1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) SSI_SDATA3_MARK, TPU0TO2_MARK, SSI_SCK4_MARK, TPU0TO3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) SSI_WS4_MARK, SSI_SDATA4_MARK, AUDIO_CLKOUT_MARK, AUDIO_CLKA_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) AUDIO_CLKB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) PINMUX_MARK_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static const u16 pinmux_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) PINMUX_SINGLE(DU1_DB2_C0_DATA12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) PINMUX_SINGLE(DU1_DB3_C1_DATA13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) PINMUX_SINGLE(DU1_DB4_C2_DATA14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) PINMUX_SINGLE(DU1_DB5_C3_DATA15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) PINMUX_SINGLE(DU1_DB6_C4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) PINMUX_SINGLE(DU1_DB7_C5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) PINMUX_SINGLE(DU1_EXHSYNC_DU1_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) PINMUX_SINGLE(DU1_EXVSYNC_DU1_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) PINMUX_SINGLE(DU1_EXODDF_DU1_ODDF_DISP_CDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) PINMUX_SINGLE(DU1_DISP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) PINMUX_SINGLE(DU1_CDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) PINMUX_SINGLE(D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) PINMUX_SINGLE(D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) PINMUX_SINGLE(D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) PINMUX_SINGLE(D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) PINMUX_SINGLE(D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) PINMUX_SINGLE(D5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) PINMUX_SINGLE(D6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) PINMUX_SINGLE(D7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) PINMUX_SINGLE(D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) PINMUX_SINGLE(D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) PINMUX_SINGLE(D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) PINMUX_SINGLE(D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) PINMUX_SINGLE(D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) PINMUX_SINGLE(D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) PINMUX_SINGLE(D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) PINMUX_SINGLE(D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) PINMUX_SINGLE(A0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) PINMUX_SINGLE(A1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) PINMUX_SINGLE(A2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) PINMUX_SINGLE(A3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) PINMUX_SINGLE(A4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) PINMUX_SINGLE(A5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) PINMUX_SINGLE(A6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) PINMUX_SINGLE(A7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) PINMUX_SINGLE(A8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) PINMUX_SINGLE(A9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) PINMUX_SINGLE(A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) PINMUX_SINGLE(A11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) PINMUX_SINGLE(A12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) PINMUX_SINGLE(A13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) PINMUX_SINGLE(A14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) PINMUX_SINGLE(A15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) PINMUX_SINGLE(A16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) PINMUX_SINGLE(A17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) PINMUX_SINGLE(A18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) PINMUX_SINGLE(A19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) PINMUX_SINGLE(CS1_N_A26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) PINMUX_SINGLE(EX_CS0_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) PINMUX_SINGLE(EX_CS1_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) PINMUX_SINGLE(EX_CS2_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) PINMUX_SINGLE(EX_CS3_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) PINMUX_SINGLE(EX_CS4_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) PINMUX_SINGLE(EX_CS5_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) PINMUX_SINGLE(BS_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) PINMUX_SINGLE(RD_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) PINMUX_SINGLE(RD_WR_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) PINMUX_SINGLE(WE0_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) PINMUX_SINGLE(WE1_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) PINMUX_SINGLE(EX_WAIT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) PINMUX_SINGLE(IRQ0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) PINMUX_SINGLE(IRQ1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) PINMUX_SINGLE(IRQ2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) PINMUX_SINGLE(IRQ3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) PINMUX_SINGLE(CS0_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) PINMUX_SINGLE(VI0_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) PINMUX_SINGLE(VI0_CLKENB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) PINMUX_SINGLE(VI0_HSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) PINMUX_SINGLE(VI0_VSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) PINMUX_SINGLE(VI0_D0_B0_C0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) PINMUX_SINGLE(VI0_D1_B1_C1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) PINMUX_SINGLE(VI0_D2_B2_C2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) PINMUX_SINGLE(VI0_D3_B3_C3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) PINMUX_SINGLE(VI0_D4_B4_C4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) PINMUX_SINGLE(VI0_D5_B5_C5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) PINMUX_SINGLE(VI0_D6_B6_C6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) PINMUX_SINGLE(VI0_D7_B7_C7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) PINMUX_SINGLE(VI0_D8_G0_Y0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) PINMUX_SINGLE(VI0_D9_G1_Y1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) PINMUX_SINGLE(VI0_D10_G2_Y2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) PINMUX_SINGLE(VI0_D11_G3_Y3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) PINMUX_SINGLE(VI0_FIELD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) PINMUX_SINGLE(VI1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) PINMUX_SINGLE(VI1_CLKENB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) PINMUX_SINGLE(VI1_HSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) PINMUX_SINGLE(VI1_VSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) PINMUX_SINGLE(VI1_D0_B0_C0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) PINMUX_SINGLE(VI1_D1_B1_C1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) PINMUX_SINGLE(VI1_D2_B2_C2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) PINMUX_SINGLE(VI1_D3_B3_C3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) PINMUX_SINGLE(VI1_D4_B4_C4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) PINMUX_SINGLE(VI1_D5_B5_C5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) PINMUX_SINGLE(VI1_D6_B6_C6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) PINMUX_SINGLE(VI1_D7_B7_C7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) PINMUX_SINGLE(VI1_D8_G0_Y0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) PINMUX_SINGLE(VI1_D9_G1_Y1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) PINMUX_SINGLE(VI1_D10_G2_Y2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) PINMUX_SINGLE(VI1_D11_G3_Y3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) PINMUX_SINGLE(VI1_FIELD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) PINMUX_SINGLE(VI3_D10_Y2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) PINMUX_SINGLE(VI3_FIELD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) PINMUX_SINGLE(VI4_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) PINMUX_SINGLE(VI5_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) PINMUX_SINGLE(VI5_D9_Y1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) PINMUX_SINGLE(VI5_D10_Y2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) PINMUX_SINGLE(VI5_D11_Y3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) PINMUX_SINGLE(VI5_FIELD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) PINMUX_SINGLE(HRTS0_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) PINMUX_SINGLE(HCTS1_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) PINMUX_SINGLE(SCK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) PINMUX_SINGLE(CTS0_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) PINMUX_SINGLE(RTS0_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) PINMUX_SINGLE(TX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) PINMUX_SINGLE(RX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) PINMUX_SINGLE(SCK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) PINMUX_SINGLE(CTS1_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) PINMUX_SINGLE(RTS1_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) PINMUX_SINGLE(TX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) PINMUX_SINGLE(RX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) PINMUX_SINGLE(SCIF_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) PINMUX_SINGLE(CAN0_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) PINMUX_SINGLE(CAN0_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) PINMUX_SINGLE(CAN_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) PINMUX_SINGLE(CAN1_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) PINMUX_SINGLE(CAN1_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) PINMUX_SINGLE(SD0_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) PINMUX_SINGLE(SD0_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) PINMUX_SINGLE(SD0_DAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) PINMUX_SINGLE(SD0_DAT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) PINMUX_SINGLE(SD0_DAT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) PINMUX_SINGLE(SD0_DAT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) PINMUX_SINGLE(SD0_CD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) PINMUX_SINGLE(SD0_WP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) PINMUX_SINGLE(ADICLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) PINMUX_SINGLE(ADICS_SAMP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) PINMUX_SINGLE(ADIDATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) PINMUX_SINGLE(ADICHS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) PINMUX_SINGLE(ADICHS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) PINMUX_SINGLE(ADICHS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) PINMUX_SINGLE(AVS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) PINMUX_SINGLE(AVS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /* IPSR0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) PINMUX_IPSR_GPSR(IP0_0, DU0_DR0_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) PINMUX_IPSR_GPSR(IP0_1, DU0_DR1_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) PINMUX_IPSR_GPSR(IP0_2, DU0_DR2_Y4_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) PINMUX_IPSR_GPSR(IP0_3, DU0_DR3_Y5_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) PINMUX_IPSR_GPSR(IP0_4, DU0_DR4_Y6_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) PINMUX_IPSR_GPSR(IP0_5, DU0_DR5_Y7_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) PINMUX_IPSR_GPSR(IP0_6, DU0_DR6_Y8_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) PINMUX_IPSR_GPSR(IP0_7, DU0_DR7_Y9_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) PINMUX_IPSR_GPSR(IP0_8, DU0_DG0_DATA8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) PINMUX_IPSR_GPSR(IP0_9, DU0_DG1_DATA9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) PINMUX_IPSR_GPSR(IP0_10, DU0_DG2_C6_DATA10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) PINMUX_IPSR_GPSR(IP0_11, DU0_DG3_C7_DATA11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) PINMUX_IPSR_GPSR(IP0_12, DU0_DG4_Y0_DATA12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) PINMUX_IPSR_GPSR(IP0_13, DU0_DG5_Y1_DATA13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) PINMUX_IPSR_GPSR(IP0_14, DU0_DG6_Y2_DATA14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) PINMUX_IPSR_GPSR(IP0_15, DU0_DG7_Y3_DATA15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) PINMUX_IPSR_GPSR(IP0_16, DU0_DB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) PINMUX_IPSR_GPSR(IP0_17, DU0_DB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) PINMUX_IPSR_GPSR(IP0_18, DU0_DB2_C0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) PINMUX_IPSR_GPSR(IP0_19, DU0_DB3_C1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) PINMUX_IPSR_GPSR(IP0_20, DU0_DB4_C2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) PINMUX_IPSR_GPSR(IP0_21, DU0_DB5_C3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) PINMUX_IPSR_GPSR(IP0_22, DU0_DB6_C4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) PINMUX_IPSR_GPSR(IP0_23, DU0_DB7_C5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* IPSR1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) PINMUX_IPSR_GPSR(IP1_0, DU0_EXHSYNC_DU0_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) PINMUX_IPSR_GPSR(IP1_1, DU0_EXVSYNC_DU0_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) PINMUX_IPSR_GPSR(IP1_2, DU0_EXODDF_DU0_ODDF_DISP_CDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) PINMUX_IPSR_GPSR(IP1_3, DU0_DISP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) PINMUX_IPSR_GPSR(IP1_4, DU0_CDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) PINMUX_IPSR_GPSR(IP1_5, DU1_DR2_Y4_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) PINMUX_IPSR_GPSR(IP1_6, DU1_DR3_Y5_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) PINMUX_IPSR_GPSR(IP1_7, DU1_DR4_Y6_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) PINMUX_IPSR_GPSR(IP1_8, DU1_DR5_Y7_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) PINMUX_IPSR_GPSR(IP1_9, DU1_DR6_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) PINMUX_IPSR_GPSR(IP1_10, DU1_DR7_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) PINMUX_IPSR_GPSR(IP1_11, DU1_DG2_C6_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) PINMUX_IPSR_GPSR(IP1_12, DU1_DG3_C7_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) PINMUX_IPSR_GPSR(IP1_13, DU1_DG4_Y0_DATA8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) PINMUX_IPSR_GPSR(IP1_14, DU1_DG5_Y1_DATA9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) PINMUX_IPSR_GPSR(IP1_15, DU1_DG6_Y2_DATA10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) PINMUX_IPSR_GPSR(IP1_16, DU1_DG7_Y3_DATA11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) PINMUX_IPSR_GPSR(IP1_17, A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) PINMUX_IPSR_GPSR(IP1_17, MOSI_IO0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) PINMUX_IPSR_GPSR(IP1_18, A21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) PINMUX_IPSR_GPSR(IP1_18, MISO_IO1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) PINMUX_IPSR_GPSR(IP1_19, A22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) PINMUX_IPSR_GPSR(IP1_19, IO2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) PINMUX_IPSR_GPSR(IP1_20, A23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) PINMUX_IPSR_GPSR(IP1_20, IO3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) PINMUX_IPSR_GPSR(IP1_21, A24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) PINMUX_IPSR_GPSR(IP1_21, SPCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) PINMUX_IPSR_GPSR(IP1_22, A25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) PINMUX_IPSR_GPSR(IP1_22, SSL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /* IPSR2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) PINMUX_IPSR_GPSR(IP2_0, VI2_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) PINMUX_IPSR_GPSR(IP2_0, AVB_RX_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) PINMUX_IPSR_GPSR(IP2_1, VI2_CLKENB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) PINMUX_IPSR_GPSR(IP2_1, AVB_RX_DV),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PINMUX_IPSR_GPSR(IP2_2, VI2_HSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) PINMUX_IPSR_GPSR(IP2_2, AVB_RXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) PINMUX_IPSR_GPSR(IP2_3, VI2_VSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) PINMUX_IPSR_GPSR(IP2_3, AVB_RXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) PINMUX_IPSR_GPSR(IP2_4, VI2_D0_C0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) PINMUX_IPSR_GPSR(IP2_4, AVB_RXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) PINMUX_IPSR_GPSR(IP2_5, VI2_D1_C1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) PINMUX_IPSR_GPSR(IP2_5, AVB_RXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) PINMUX_IPSR_GPSR(IP2_6, VI2_D2_C2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) PINMUX_IPSR_GPSR(IP2_6, AVB_RXD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) PINMUX_IPSR_GPSR(IP2_7, VI2_D3_C3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) PINMUX_IPSR_GPSR(IP2_7, AVB_RXD5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) PINMUX_IPSR_GPSR(IP2_8, VI2_D4_C4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) PINMUX_IPSR_GPSR(IP2_8, AVB_RXD6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) PINMUX_IPSR_GPSR(IP2_9, VI2_D5_C5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) PINMUX_IPSR_GPSR(IP2_9, AVB_RXD7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) PINMUX_IPSR_GPSR(IP2_10, VI2_D6_C6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) PINMUX_IPSR_GPSR(IP2_10, AVB_RX_ER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) PINMUX_IPSR_GPSR(IP2_11, VI2_D7_C7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) PINMUX_IPSR_GPSR(IP2_11, AVB_COL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) PINMUX_IPSR_GPSR(IP2_12, VI2_D8_Y0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) PINMUX_IPSR_GPSR(IP2_12, AVB_TXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) PINMUX_IPSR_GPSR(IP2_13, VI2_D9_Y1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) PINMUX_IPSR_GPSR(IP2_13, AVB_TX_EN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) PINMUX_IPSR_GPSR(IP2_14, VI2_D10_Y2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) PINMUX_IPSR_GPSR(IP2_14, AVB_TXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) PINMUX_IPSR_GPSR(IP2_15, VI2_D11_Y3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) PINMUX_IPSR_GPSR(IP2_15, AVB_TXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) PINMUX_IPSR_GPSR(IP2_16, VI2_FIELD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) PINMUX_IPSR_GPSR(IP2_16, AVB_TXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* IPSR3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) PINMUX_IPSR_GPSR(IP3_0, VI3_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) PINMUX_IPSR_GPSR(IP3_0, AVB_TX_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) PINMUX_IPSR_GPSR(IP3_1, VI3_CLKENB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) PINMUX_IPSR_GPSR(IP3_1, AVB_TXD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) PINMUX_IPSR_GPSR(IP3_2, VI3_HSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) PINMUX_IPSR_GPSR(IP3_2, AVB_TXD5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) PINMUX_IPSR_GPSR(IP3_3, VI3_VSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) PINMUX_IPSR_GPSR(IP3_3, AVB_TXD6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) PINMUX_IPSR_GPSR(IP3_4, VI3_D0_C0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) PINMUX_IPSR_GPSR(IP3_4, AVB_TXD7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) PINMUX_IPSR_GPSR(IP3_5, VI3_D1_C1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) PINMUX_IPSR_GPSR(IP3_5, AVB_TX_ER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) PINMUX_IPSR_GPSR(IP3_6, VI3_D2_C2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) PINMUX_IPSR_GPSR(IP3_6, AVB_GTX_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) PINMUX_IPSR_GPSR(IP3_7, VI3_D3_C3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) PINMUX_IPSR_GPSR(IP3_7, AVB_MDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) PINMUX_IPSR_GPSR(IP3_8, VI3_D4_C4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) PINMUX_IPSR_GPSR(IP3_8, AVB_MDIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) PINMUX_IPSR_GPSR(IP3_9, VI3_D5_C5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) PINMUX_IPSR_GPSR(IP3_9, AVB_LINK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) PINMUX_IPSR_GPSR(IP3_10, VI3_D6_C6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) PINMUX_IPSR_GPSR(IP3_10, AVB_MAGIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) PINMUX_IPSR_GPSR(IP3_11, VI3_D7_C7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) PINMUX_IPSR_GPSR(IP3_11, AVB_PHY_INT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) PINMUX_IPSR_GPSR(IP3_12, VI3_D8_Y0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) PINMUX_IPSR_GPSR(IP3_12, AVB_CRS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) PINMUX_IPSR_GPSR(IP3_13, VI3_D9_Y1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) PINMUX_IPSR_GPSR(IP3_13, AVB_GTXREFCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) PINMUX_IPSR_GPSR(IP3_14, VI3_D11_Y3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) PINMUX_IPSR_GPSR(IP3_14, AVB_AVTP_MATCH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) /* IPSR4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) PINMUX_IPSR_GPSR(IP4_0, VI4_CLKENB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) PINMUX_IPSR_GPSR(IP4_0, VI0_D12_G4_Y4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) PINMUX_IPSR_GPSR(IP4_1, VI4_HSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) PINMUX_IPSR_GPSR(IP4_1, VI0_D13_G5_Y5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) PINMUX_IPSR_GPSR(IP4_3_2, VI4_VSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) PINMUX_IPSR_GPSR(IP4_3_2, VI0_D14_G6_Y6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) PINMUX_IPSR_GPSR(IP4_4, VI4_D0_C0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) PINMUX_IPSR_GPSR(IP4_4, VI0_D15_G7_Y7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) PINMUX_IPSR_GPSR(IP4_6_5, VI4_D1_C1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) PINMUX_IPSR_GPSR(IP4_6_5, VI0_D16_R0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) PINMUX_IPSR_MSEL(IP4_6_5, VI1_D12_G4_Y4, SEL_VI1_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) PINMUX_IPSR_GPSR(IP4_8_7, VI4_D2_C2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) PINMUX_IPSR_GPSR(IP4_8_7, VI0_D17_R1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) PINMUX_IPSR_MSEL(IP4_8_7, VI1_D13_G5_Y5, SEL_VI1_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) PINMUX_IPSR_GPSR(IP4_10_9, VI4_D3_C3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) PINMUX_IPSR_GPSR(IP4_10_9, VI0_D18_R2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) PINMUX_IPSR_MSEL(IP4_10_9, VI1_D14_G6_Y6, SEL_VI1_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) PINMUX_IPSR_GPSR(IP4_12_11, VI4_D4_C4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) PINMUX_IPSR_GPSR(IP4_12_11, VI0_D19_R3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) PINMUX_IPSR_MSEL(IP4_12_11, VI1_D15_G7_Y7, SEL_VI1_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) PINMUX_IPSR_GPSR(IP4_14_13, VI4_D5_C5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) PINMUX_IPSR_GPSR(IP4_14_13, VI0_D20_R4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) PINMUX_IPSR_GPSR(IP4_14_13, VI2_D12_Y4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) PINMUX_IPSR_GPSR(IP4_16_15, VI4_D6_C6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) PINMUX_IPSR_GPSR(IP4_16_15, VI0_D21_R5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) PINMUX_IPSR_GPSR(IP4_16_15, VI2_D13_Y5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) PINMUX_IPSR_GPSR(IP4_18_17, VI4_D7_C7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) PINMUX_IPSR_GPSR(IP4_18_17, VI0_D22_R6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) PINMUX_IPSR_GPSR(IP4_18_17, VI2_D14_Y6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) PINMUX_IPSR_GPSR(IP4_20_19, VI4_D8_Y0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) PINMUX_IPSR_GPSR(IP4_20_19, VI0_D23_R7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) PINMUX_IPSR_GPSR(IP4_20_19, VI2_D15_Y7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) PINMUX_IPSR_GPSR(IP4_21, VI4_D9_Y1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) PINMUX_IPSR_GPSR(IP4_21, VI3_D12_Y4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) PINMUX_IPSR_GPSR(IP4_22, VI4_D10_Y2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) PINMUX_IPSR_GPSR(IP4_22, VI3_D13_Y5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) PINMUX_IPSR_GPSR(IP4_23, VI4_D11_Y3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) PINMUX_IPSR_GPSR(IP4_23, VI3_D14_Y6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) PINMUX_IPSR_GPSR(IP4_24, VI4_FIELD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) PINMUX_IPSR_GPSR(IP4_24, VI3_D15_Y7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) /* IPSR5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) PINMUX_IPSR_GPSR(IP5_0, VI5_CLKENB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) PINMUX_IPSR_MSEL(IP5_0, VI1_D12_G4_Y4_B, SEL_VI1_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) PINMUX_IPSR_GPSR(IP5_1, VI5_HSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) PINMUX_IPSR_MSEL(IP5_1, VI1_D13_G5_Y5_B, SEL_VI1_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) PINMUX_IPSR_GPSR(IP5_2, VI5_VSYNC_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) PINMUX_IPSR_MSEL(IP5_2, VI1_D14_G6_Y6_B, SEL_VI1_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) PINMUX_IPSR_GPSR(IP5_3, VI5_D0_C0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) PINMUX_IPSR_MSEL(IP5_3, VI1_D15_G7_Y7_B, SEL_VI1_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) PINMUX_IPSR_GPSR(IP5_4, VI5_D1_C1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) PINMUX_IPSR_GPSR(IP5_4, VI1_D16_R0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) PINMUX_IPSR_GPSR(IP5_5, VI5_D2_C2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) PINMUX_IPSR_GPSR(IP5_5, VI1_D17_R1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) PINMUX_IPSR_GPSR(IP5_6, VI5_D3_C3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) PINMUX_IPSR_GPSR(IP5_6, VI1_D18_R2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) PINMUX_IPSR_GPSR(IP5_7, VI5_D4_C4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) PINMUX_IPSR_GPSR(IP5_7, VI1_D19_R3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) PINMUX_IPSR_GPSR(IP5_8, VI5_D5_C5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) PINMUX_IPSR_GPSR(IP5_8, VI1_D20_R4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) PINMUX_IPSR_GPSR(IP5_9, VI5_D6_C6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) PINMUX_IPSR_GPSR(IP5_9, VI1_D21_R5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) PINMUX_IPSR_GPSR(IP5_10, VI5_D7_C7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) PINMUX_IPSR_GPSR(IP5_10, VI1_D22_R6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) PINMUX_IPSR_GPSR(IP5_11, VI5_D8_Y0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) PINMUX_IPSR_GPSR(IP5_11, VI1_D23_R7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) /* IPSR6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) PINMUX_IPSR_GPSR(IP6_0, MSIOF0_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) PINMUX_IPSR_GPSR(IP6_0, HSCK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) PINMUX_IPSR_GPSR(IP6_1, MSIOF0_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) PINMUX_IPSR_GPSR(IP6_1, HCTS0_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) PINMUX_IPSR_GPSR(IP6_2, MSIOF0_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) PINMUX_IPSR_GPSR(IP6_2, HTX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) PINMUX_IPSR_GPSR(IP6_3, MSIOF0_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) PINMUX_IPSR_GPSR(IP6_3, HRX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) PINMUX_IPSR_GPSR(IP6_4, MSIOF1_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) PINMUX_IPSR_GPSR(IP6_4, HSCK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) PINMUX_IPSR_GPSR(IP6_5, MSIOF1_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) PINMUX_IPSR_GPSR(IP6_5, HRTS1_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) PINMUX_IPSR_GPSR(IP6_6, MSIOF1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) PINMUX_IPSR_GPSR(IP6_6, HTX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) PINMUX_IPSR_GPSR(IP6_7, MSIOF1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) PINMUX_IPSR_GPSR(IP6_7, HRX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) PINMUX_IPSR_GPSR(IP6_9_8, DRACK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) PINMUX_IPSR_GPSR(IP6_9_8, SCK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) PINMUX_IPSR_GPSR(IP6_11_10, DACK0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) PINMUX_IPSR_GPSR(IP6_11_10, TX2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) PINMUX_IPSR_GPSR(IP6_13_12, DREQ0_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) PINMUX_IPSR_GPSR(IP6_13_12, RX2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) PINMUX_IPSR_GPSR(IP6_15_14, DACK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) PINMUX_IPSR_GPSR(IP6_15_14, SCK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) PINMUX_IPSR_GPSR(IP6_16, TX3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) PINMUX_IPSR_GPSR(IP6_18_17, DREQ1_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) PINMUX_IPSR_GPSR(IP6_18_17, RX3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /* IPSR7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) PINMUX_IPSR_GPSR(IP7_1_0, PWM0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) PINMUX_IPSR_GPSR(IP7_1_0, TCLK1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) PINMUX_IPSR_GPSR(IP7_1_0, FSO_CFE_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) PINMUX_IPSR_GPSR(IP7_3_2, PWM1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) PINMUX_IPSR_GPSR(IP7_3_2, TCLK2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) PINMUX_IPSR_GPSR(IP7_3_2, FSO_CFE_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) PINMUX_IPSR_GPSR(IP7_5_4, PWM2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) PINMUX_IPSR_GPSR(IP7_5_4, TCLK3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) PINMUX_IPSR_GPSR(IP7_5_4, FSO_TOE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) PINMUX_IPSR_GPSR(IP7_6, PWM3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) PINMUX_IPSR_GPSR(IP7_7, PWM4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) PINMUX_IPSR_GPSR(IP7_9_8, SSI_SCK34),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) PINMUX_IPSR_GPSR(IP7_9_8, TPU0TO0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) PINMUX_IPSR_GPSR(IP7_11_10, SSI_WS34),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) PINMUX_IPSR_GPSR(IP7_11_10, TPU0TO1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) PINMUX_IPSR_GPSR(IP7_13_12, SSI_SDATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) PINMUX_IPSR_GPSR(IP7_13_12, TPU0TO2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) PINMUX_IPSR_GPSR(IP7_15_14, SSI_SCK4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) PINMUX_IPSR_GPSR(IP7_15_14, TPU0TO3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) PINMUX_IPSR_GPSR(IP7_16, SSI_WS4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) PINMUX_IPSR_GPSR(IP7_17, SSI_SDATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) PINMUX_IPSR_GPSR(IP7_18, AUDIO_CLKOUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) PINMUX_IPSR_GPSR(IP7_19, AUDIO_CLKA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) PINMUX_IPSR_GPSR(IP7_20, AUDIO_CLKB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const struct sh_pfc_pin pinmux_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) PINMUX_GPIO_GP_ALL(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /* - AVB -------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) static const unsigned int avb_link_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) RCAR_GP_PIN(7, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const unsigned int avb_link_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) AVB_LINK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) static const unsigned int avb_magic_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) RCAR_GP_PIN(7, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) static const unsigned int avb_magic_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) AVB_MAGIC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static const unsigned int avb_phy_int_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) RCAR_GP_PIN(7, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) static const unsigned int avb_phy_int_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) AVB_PHY_INT_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) static const unsigned int avb_mdio_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) RCAR_GP_PIN(7, 7), RCAR_GP_PIN(7, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) static const unsigned int avb_mdio_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) AVB_MDC_MARK, AVB_MDIO_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static const unsigned int avb_mii_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) RCAR_GP_PIN(6, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3), RCAR_GP_PIN(6, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) RCAR_GP_PIN(6, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) RCAR_GP_PIN(7, 12), RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) RCAR_GP_PIN(7, 0), RCAR_GP_PIN(6, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) static const unsigned int avb_mii_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) AVB_TXD3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) AVB_RXD3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) AVB_TX_CLK_MARK, AVB_COL_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) static const unsigned int avb_gmii_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) RCAR_GP_PIN(6, 12), RCAR_GP_PIN(7, 1), RCAR_GP_PIN(7, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) RCAR_GP_PIN(7, 3), RCAR_GP_PIN(7, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3), RCAR_GP_PIN(6, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6), RCAR_GP_PIN(6, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) RCAR_GP_PIN(7, 12), RCAR_GP_PIN(7, 6), RCAR_GP_PIN(7, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) RCAR_GP_PIN(6, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) static const unsigned int avb_gmii_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) AVB_TXD3_MARK, AVB_TXD4_MARK, AVB_TXD5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) AVB_TXD6_MARK, AVB_TXD7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) AVB_RXD6_MARK, AVB_RXD7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) AVB_CRS_MARK, AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) AVB_COL_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static const unsigned int avb_avtp_match_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) RCAR_GP_PIN(7, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) static const unsigned int avb_avtp_match_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) AVB_AVTP_MATCH_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) /* - CAN -------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) static const unsigned int can0_data_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) /* TX, RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) RCAR_GP_PIN(10, 27), RCAR_GP_PIN(10, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) static const unsigned int can0_data_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) CAN0_TX_MARK, CAN0_RX_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) static const unsigned int can1_data_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /* TX, RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) RCAR_GP_PIN(10, 30), RCAR_GP_PIN(10, 31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) static const unsigned int can1_data_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) CAN1_TX_MARK, CAN1_RX_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) static const unsigned int can_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /* CAN_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) RCAR_GP_PIN(10, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) static const unsigned int can_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) CAN_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) /* - DU --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) static const unsigned int du0_rgb666_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) /* R[7:2], G[7:2], B[7:2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 3), RCAR_GP_PIN(0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) RCAR_GP_PIN(0, 23), RCAR_GP_PIN(0, 22), RCAR_GP_PIN(0, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static const unsigned int du0_rgb666_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) DU0_DR7_Y9_DATA7_MARK, DU0_DR6_Y8_DATA6_MARK, DU0_DR5_Y7_DATA5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) DU0_DR4_Y6_DATA4_MARK, DU0_DR3_Y5_DATA3_MARK, DU0_DR2_Y4_DATA2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) DU0_DG7_Y3_DATA15_MARK, DU0_DG6_Y2_DATA14_MARK, DU0_DG5_Y1_DATA13_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) DU0_DG4_Y0_DATA12_MARK, DU0_DG3_C7_DATA11_MARK, DU0_DG2_C6_DATA10_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) DU0_DB7_C5_MARK, DU0_DB6_C4_MARK, DU0_DB5_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) DU0_DB4_C2_MARK, DU0_DB3_C1_MARK, DU0_DB2_C0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) static const unsigned int du0_rgb888_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) /* R[7:0], G[7:0], B[7:0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 3), RCAR_GP_PIN(0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) RCAR_GP_PIN(0, 1), RCAR_GP_PIN(0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) RCAR_GP_PIN(0, 23), RCAR_GP_PIN(0, 22), RCAR_GP_PIN(0, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) RCAR_GP_PIN(0, 17), RCAR_GP_PIN(0, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static const unsigned int du0_rgb888_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) DU0_DR7_Y9_DATA7_MARK, DU0_DR6_Y8_DATA6_MARK, DU0_DR5_Y7_DATA5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) DU0_DR4_Y6_DATA4_MARK, DU0_DR3_Y5_DATA3_MARK, DU0_DR2_Y4_DATA2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) DU0_DR1_DATA1_MARK, DU0_DR0_DATA0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) DU0_DG7_Y3_DATA15_MARK, DU0_DG6_Y2_DATA14_MARK, DU0_DG5_Y1_DATA13_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) DU0_DG4_Y0_DATA12_MARK, DU0_DG3_C7_DATA11_MARK, DU0_DG2_C6_DATA10_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) DU0_DG1_DATA9_MARK, DU0_DG0_DATA8_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) DU0_DB7_C5_MARK, DU0_DB6_C4_MARK, DU0_DB5_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) DU0_DB4_C2_MARK, DU0_DB3_C1_MARK, DU0_DB2_C0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) DU0_DB1_MARK, DU0_DB0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) static const unsigned int du0_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) RCAR_GP_PIN(0, 25), RCAR_GP_PIN(0, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) static const unsigned int du0_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) DU0_EXVSYNC_DU0_VSYNC_MARK, DU0_EXHSYNC_DU0_HSYNC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) static const unsigned int du0_oddf_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) /* EXODDF/ODDF/DISP/CDE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) RCAR_GP_PIN(0, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static const unsigned int du0_oddf_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) static const unsigned int du0_disp_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) /* DISP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) RCAR_GP_PIN(0, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) static const unsigned int du0_disp_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) DU0_DISP_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) static const unsigned int du0_cde_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) /* CDE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) RCAR_GP_PIN(0, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) static const unsigned int du0_cde_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) DU0_CDE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) static const unsigned int du1_rgb666_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) /* R[7:2], G[7:2], B[7:2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) static const unsigned int du1_rgb666_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) DU1_DR7_DATA5_MARK, DU1_DR6_DATA4_MARK, DU1_DR5_Y7_DATA3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) DU1_DR4_Y6_DATA2_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR2_Y4_DATA0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) DU1_DG7_Y3_DATA11_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG5_Y1_DATA9_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) DU1_DG4_Y0_DATA8_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG2_C6_DATA6_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) DU1_DB7_C5_MARK, DU1_DB6_C4_MARK, DU1_DB5_C3_DATA15_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) DU1_DB4_C2_DATA14_MARK, DU1_DB3_C1_DATA13_MARK, DU1_DB2_C0_DATA12_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) static const unsigned int du1_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) static const unsigned int du1_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) static const unsigned int du1_oddf_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) /* EXODDF/ODDF/DISP/CDE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) RCAR_GP_PIN(1, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) static const unsigned int du1_oddf_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) static const unsigned int du1_disp_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) /* DISP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) RCAR_GP_PIN(1, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) static const unsigned int du1_disp_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) DU1_DISP_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) static const unsigned int du1_cde_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) /* CDE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) RCAR_GP_PIN(1, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) static const unsigned int du1_cde_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) DU1_CDE_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) /* - INTC ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) static const unsigned int intc_irq0_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) /* IRQ0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) RCAR_GP_PIN(3, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static const unsigned int intc_irq0_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) IRQ0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) static const unsigned int intc_irq1_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) /* IRQ1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) RCAR_GP_PIN(3, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) static const unsigned int intc_irq1_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) IRQ1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static const unsigned int intc_irq2_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) /* IRQ2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) RCAR_GP_PIN(3, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) static const unsigned int intc_irq2_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) IRQ2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) static const unsigned int intc_irq3_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) /* IRQ3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) RCAR_GP_PIN(3, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) static const unsigned int intc_irq3_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) IRQ3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) /* - LBSC ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) static const unsigned int lbsc_cs0_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) /* CS0# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) RCAR_GP_PIN(3, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) static const unsigned int lbsc_cs0_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) CS0_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) static const unsigned int lbsc_cs1_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) /* CS1#_A26 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) RCAR_GP_PIN(3, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) static const unsigned int lbsc_cs1_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) CS1_N_A26_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static const unsigned int lbsc_ex_cs0_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) /* EX_CS0# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) RCAR_GP_PIN(3, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) static const unsigned int lbsc_ex_cs0_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) EX_CS0_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) static const unsigned int lbsc_ex_cs1_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) /* EX_CS1# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) RCAR_GP_PIN(3, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) static const unsigned int lbsc_ex_cs1_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) EX_CS1_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) static const unsigned int lbsc_ex_cs2_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) /* EX_CS2# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) RCAR_GP_PIN(3, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) static const unsigned int lbsc_ex_cs2_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) EX_CS2_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) static const unsigned int lbsc_ex_cs3_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) /* EX_CS3# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) RCAR_GP_PIN(3, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) static const unsigned int lbsc_ex_cs3_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) EX_CS3_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) static const unsigned int lbsc_ex_cs4_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) /* EX_CS4# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) RCAR_GP_PIN(3, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) static const unsigned int lbsc_ex_cs4_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) EX_CS4_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) static const unsigned int lbsc_ex_cs5_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) /* EX_CS5# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) RCAR_GP_PIN(3, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) static const unsigned int lbsc_ex_cs5_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) EX_CS5_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) /* - MSIOF0 ----------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) static const unsigned int msiof0_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) RCAR_GP_PIN(10, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) static const unsigned int msiof0_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) MSIOF0_SCK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) static const unsigned int msiof0_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) /* SYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) RCAR_GP_PIN(10, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) static const unsigned int msiof0_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) MSIOF0_SYNC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) static const unsigned int msiof0_rx_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) /* RXD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) RCAR_GP_PIN(10, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) static const unsigned int msiof0_rx_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) MSIOF0_RXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) static const unsigned int msiof0_tx_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) /* TXD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) RCAR_GP_PIN(10, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) static const unsigned int msiof0_tx_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) MSIOF0_TXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) /* - MSIOF1 ----------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) static const unsigned int msiof1_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) RCAR_GP_PIN(10, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) static const unsigned int msiof1_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) MSIOF1_SCK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) static const unsigned int msiof1_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) /* SYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) RCAR_GP_PIN(10, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) static const unsigned int msiof1_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) MSIOF1_SYNC_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) static const unsigned int msiof1_rx_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) /* RXD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) RCAR_GP_PIN(10, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) static const unsigned int msiof1_rx_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) MSIOF1_RXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) static const unsigned int msiof1_tx_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) /* TXD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) RCAR_GP_PIN(10, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) static const unsigned int msiof1_tx_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) MSIOF1_TXD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) /* - QSPI ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) static const unsigned int qspi_ctrl_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) /* SPCLK, SSL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) RCAR_GP_PIN(3, 25), RCAR_GP_PIN(3, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) static const unsigned int qspi_ctrl_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) SPCLK_MARK, SSL_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) static const unsigned int qspi_data2_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) /* MOSI_IO0, MISO_IO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) static const unsigned int qspi_data2_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) MOSI_IO0_MARK, MISO_IO1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) static const unsigned int qspi_data4_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) /* MOSI_IO0, MISO_IO1, IO2, IO3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) RCAR_GP_PIN(3, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) static const unsigned int qspi_data4_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) /* - SCIF0 ------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static const unsigned int scif0_data_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) /* RX, TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) RCAR_GP_PIN(10, 14), RCAR_GP_PIN(10, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) static const unsigned int scif0_data_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) RX0_MARK, TX0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) static const unsigned int scif0_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) RCAR_GP_PIN(10, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) static const unsigned int scif0_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) SCK0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) static const unsigned int scif0_ctrl_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) /* RTS, CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) RCAR_GP_PIN(10, 12), RCAR_GP_PIN(10, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) static const unsigned int scif0_ctrl_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) RTS0_N_MARK, CTS0_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) /* - SCIF1 ------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) static const unsigned int scif1_data_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) /* RX, TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) RCAR_GP_PIN(10, 19), RCAR_GP_PIN(10, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) static const unsigned int scif1_data_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) RX1_MARK, TX1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) static const unsigned int scif1_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) RCAR_GP_PIN(10, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) static const unsigned int scif1_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) SCK1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) static const unsigned int scif1_ctrl_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) /* RTS, CTS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) RCAR_GP_PIN(10, 17), RCAR_GP_PIN(10, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) static const unsigned int scif1_ctrl_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) RTS1_N_MARK, CTS1_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) /* - SCIF2 ------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) static const unsigned int scif2_data_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) /* RX, TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) RCAR_GP_PIN(10, 22), RCAR_GP_PIN(10, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) static const unsigned int scif2_data_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) RX2_MARK, TX2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static const unsigned int scif2_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) RCAR_GP_PIN(10, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) static const unsigned int scif2_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) SCK2_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) /* - SCIF3 ------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) static const unsigned int scif3_data_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) /* RX, TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) RCAR_GP_PIN(10, 25), RCAR_GP_PIN(10, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) static const unsigned int scif3_data_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) RX3_MARK, TX3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) static const unsigned int scif3_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) /* SCK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) RCAR_GP_PIN(10, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) static const unsigned int scif3_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) SCK3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) /* - SDHI0 ------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) static const unsigned int sdhi0_data1_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) /* DAT0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) RCAR_GP_PIN(11, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) static const unsigned int sdhi0_data1_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) SD0_DAT0_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) static const unsigned int sdhi0_data4_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) /* DAT[0-3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) RCAR_GP_PIN(11, 7), RCAR_GP_PIN(11, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) RCAR_GP_PIN(11, 9), RCAR_GP_PIN(11, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) static const unsigned int sdhi0_data4_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) static const unsigned int sdhi0_ctrl_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) /* CLK, CMD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) RCAR_GP_PIN(11, 5), RCAR_GP_PIN(11, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) static const unsigned int sdhi0_ctrl_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) SD0_CLK_MARK, SD0_CMD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) static const unsigned int sdhi0_cd_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) /* CD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) RCAR_GP_PIN(11, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) static const unsigned int sdhi0_cd_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) SD0_CD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) static const unsigned int sdhi0_wp_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) /* WP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) RCAR_GP_PIN(11, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) static const unsigned int sdhi0_wp_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) SD0_WP_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) /* - VIN0 ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) static const union vin_data vin0_data_pins = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) .data24 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) RCAR_GP_PIN(4, 6), RCAR_GP_PIN(4, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) RCAR_GP_PIN(4, 8), RCAR_GP_PIN(4, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) RCAR_GP_PIN(4, 12), RCAR_GP_PIN(4, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) RCAR_GP_PIN(8, 1), RCAR_GP_PIN(8, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) RCAR_GP_PIN(8, 3), RCAR_GP_PIN(8, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) RCAR_GP_PIN(8, 5), RCAR_GP_PIN(8, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) RCAR_GP_PIN(8, 7), RCAR_GP_PIN(8, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) RCAR_GP_PIN(8, 9), RCAR_GP_PIN(8, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) RCAR_GP_PIN(8, 11), RCAR_GP_PIN(8, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) static const union vin_data vin0_data_mux = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) .data24 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) VI0_D12_G4_Y4_MARK, VI0_D13_G5_Y5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) VI0_D14_G6_Y6_MARK, VI0_D15_G7_Y7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) VI0_D16_R0_MARK, VI0_D17_R1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) VI0_D18_R2_MARK, VI0_D19_R3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) VI0_D20_R4_MARK, VI0_D21_R5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) VI0_D22_R6_MARK, VI0_D23_R7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) static const unsigned int vin0_data18_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) RCAR_GP_PIN(4, 6), RCAR_GP_PIN(4, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) RCAR_GP_PIN(4, 8), RCAR_GP_PIN(4, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) RCAR_GP_PIN(8, 1), RCAR_GP_PIN(8, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) RCAR_GP_PIN(8, 3), RCAR_GP_PIN(8, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) RCAR_GP_PIN(8, 7), RCAR_GP_PIN(8, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) RCAR_GP_PIN(8, 9), RCAR_GP_PIN(8, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) RCAR_GP_PIN(8, 11), RCAR_GP_PIN(8, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) static const unsigned int vin0_data18_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) VI0_D12_G4_Y4_MARK, VI0_D13_G5_Y5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) VI0_D14_G6_Y6_MARK, VI0_D15_G7_Y7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) VI0_D18_R2_MARK, VI0_D19_R3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) VI0_D20_R4_MARK, VI0_D21_R5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) VI0_D22_R6_MARK, VI0_D23_R7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) static const unsigned int vin0_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) /* HSYNC#, VSYNC# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) static const unsigned int vin0_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) VI0_HSYNC_N_MARK, VI0_VSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) static const unsigned int vin0_field_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) RCAR_GP_PIN(4, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) static const unsigned int vin0_field_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) VI0_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) static const unsigned int vin0_clkenb_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) RCAR_GP_PIN(4, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) static const unsigned int vin0_clkenb_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) VI0_CLKENB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) static const unsigned int vin0_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) RCAR_GP_PIN(4, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) static const unsigned int vin0_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) VI0_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) /* - VIN1 ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) static const union vin_data vin1_data_pins = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) .data24 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) RCAR_GP_PIN(8, 5), RCAR_GP_PIN(8, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) RCAR_GP_PIN(8, 7), RCAR_GP_PIN(8, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) RCAR_GP_PIN(9, 5), RCAR_GP_PIN(9, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) RCAR_GP_PIN(9, 7), RCAR_GP_PIN(9, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) RCAR_GP_PIN(9, 9), RCAR_GP_PIN(9, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) RCAR_GP_PIN(9, 11), RCAR_GP_PIN(9, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) static const union vin_data vin1_data_mux = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) .data24 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) VI1_D4_B4_C4_MARK, VI1_D5_B5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) VI1_D10_G2_Y2_MARK, VI1_D11_G3_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) VI1_D12_G4_Y4_MARK, VI1_D13_G5_Y5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) VI1_D14_G6_Y6_MARK, VI1_D15_G7_Y7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) VI1_D16_R0_MARK, VI1_D17_R1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) VI1_D18_R2_MARK, VI1_D19_R3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) VI1_D20_R4_MARK, VI1_D21_R5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) VI1_D22_R6_MARK, VI1_D23_R7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) static const unsigned int vin1_data18_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) RCAR_GP_PIN(8, 5), RCAR_GP_PIN(8, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) RCAR_GP_PIN(8, 7), RCAR_GP_PIN(8, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) RCAR_GP_PIN(9, 7), RCAR_GP_PIN(9, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) RCAR_GP_PIN(9, 9), RCAR_GP_PIN(9, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) RCAR_GP_PIN(9, 11), RCAR_GP_PIN(9, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) static const unsigned int vin1_data18_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) VI1_D4_B4_C4_MARK, VI1_D5_B5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) VI1_D10_G2_Y2_MARK, VI1_D11_G3_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) VI1_D12_G4_Y4_MARK, VI1_D13_G5_Y5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) VI1_D14_G6_Y6_MARK, VI1_D15_G7_Y7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) VI1_D18_R2_MARK, VI1_D19_R3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) VI1_D20_R4_MARK, VI1_D21_R5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) VI1_D22_R6_MARK, VI1_D23_R7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) static const union vin_data vin1_data_b_pins = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) .data24 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) RCAR_GP_PIN(9, 1), RCAR_GP_PIN(9, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) RCAR_GP_PIN(9, 3), RCAR_GP_PIN(9, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) RCAR_GP_PIN(9, 5), RCAR_GP_PIN(9, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) RCAR_GP_PIN(9, 7), RCAR_GP_PIN(9, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) RCAR_GP_PIN(9, 9), RCAR_GP_PIN(9, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) RCAR_GP_PIN(9, 11), RCAR_GP_PIN(9, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) static const union vin_data vin1_data_b_mux = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) .data24 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) VI1_D4_B4_C4_MARK, VI1_D5_B5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) VI1_D10_G2_Y2_MARK, VI1_D11_G3_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) VI1_D12_G4_Y4_B_MARK, VI1_D13_G5_Y5_B_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) VI1_D14_G6_Y6_B_MARK, VI1_D15_G7_Y7_B_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) VI1_D16_R0_MARK, VI1_D17_R1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) VI1_D18_R2_MARK, VI1_D19_R3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) VI1_D20_R4_MARK, VI1_D21_R5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) VI1_D22_R6_MARK, VI1_D23_R7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) static const unsigned int vin1_data18_b_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) RCAR_GP_PIN(9, 1), RCAR_GP_PIN(9, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) RCAR_GP_PIN(9, 3), RCAR_GP_PIN(9, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) RCAR_GP_PIN(9, 7), RCAR_GP_PIN(9, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) RCAR_GP_PIN(9, 9), RCAR_GP_PIN(9, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) RCAR_GP_PIN(9, 11), RCAR_GP_PIN(9, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) static const unsigned int vin1_data18_b_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) /* B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) VI1_D4_B4_C4_MARK, VI1_D5_B5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) /* G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) VI1_D10_G2_Y2_MARK, VI1_D11_G3_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) VI1_D12_G4_Y4_B_MARK, VI1_D13_G5_Y5_B_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) VI1_D14_G6_Y6_B_MARK, VI1_D15_G7_Y7_B_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) /* R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) VI1_D18_R2_MARK, VI1_D19_R3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) VI1_D20_R4_MARK, VI1_D21_R5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) VI1_D22_R6_MARK, VI1_D23_R7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) static const unsigned int vin1_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) /* HSYNC#, VSYNC# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) RCAR_GP_PIN(5, 2), RCAR_GP_PIN(5, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) static const unsigned int vin1_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) VI1_HSYNC_N_MARK, VI1_VSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) static const unsigned int vin1_field_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) RCAR_GP_PIN(5, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) static const unsigned int vin1_field_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) VI1_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) static const unsigned int vin1_clkenb_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) RCAR_GP_PIN(5, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) static const unsigned int vin1_clkenb_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) VI1_CLKENB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) static const unsigned int vin1_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) RCAR_GP_PIN(5, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) static const unsigned int vin1_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) VI1_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) /* - VIN2 ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) static const union vin_data16 vin2_data_pins = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) .data16 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) RCAR_GP_PIN(6, 6), RCAR_GP_PIN(6, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) RCAR_GP_PIN(6, 12), RCAR_GP_PIN(6, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) RCAR_GP_PIN(8, 9), RCAR_GP_PIN(8, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) RCAR_GP_PIN(8, 11), RCAR_GP_PIN(8, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) static const union vin_data16 vin2_data_mux = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) .data16 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) VI2_D0_C0_MARK, VI2_D1_C1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) VI2_D2_C2_MARK, VI2_D3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) VI2_D4_C4_MARK, VI2_D5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) VI2_D6_C6_MARK, VI2_D7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) VI2_D8_Y0_MARK, VI2_D9_Y1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) VI2_D10_Y2_MARK, VI2_D11_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) VI2_D12_Y4_MARK, VI2_D13_Y5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) VI2_D14_Y6_MARK, VI2_D15_Y7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) static const unsigned int vin2_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) /* HSYNC#, VSYNC# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) static const unsigned int vin2_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) VI2_HSYNC_N_MARK, VI2_VSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) static const unsigned int vin2_field_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) RCAR_GP_PIN(6, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) static const unsigned int vin2_field_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) VI2_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) static const unsigned int vin2_clkenb_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) RCAR_GP_PIN(6, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) static const unsigned int vin2_clkenb_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) VI2_CLKENB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) static const unsigned int vin2_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) RCAR_GP_PIN(6, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) static const unsigned int vin2_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) VI2_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) /* - VIN3 ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) static const union vin_data16 vin3_data_pins = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) .data16 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) RCAR_GP_PIN(7, 4), RCAR_GP_PIN(7, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) RCAR_GP_PIN(7, 6), RCAR_GP_PIN(7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) RCAR_GP_PIN(7, 8), RCAR_GP_PIN(7, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) RCAR_GP_PIN(7, 10), RCAR_GP_PIN(7, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) RCAR_GP_PIN(7, 12), RCAR_GP_PIN(7, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) RCAR_GP_PIN(7, 14), RCAR_GP_PIN(7, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) RCAR_GP_PIN(8, 13), RCAR_GP_PIN(8, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) RCAR_GP_PIN(8, 15), RCAR_GP_PIN(8, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) static const union vin_data16 vin3_data_mux = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) .data16 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) VI3_D0_C0_MARK, VI3_D1_C1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) VI3_D2_C2_MARK, VI3_D3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) VI3_D4_C4_MARK, VI3_D5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) VI3_D6_C6_MARK, VI3_D7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) VI3_D8_Y0_MARK, VI3_D9_Y1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) VI3_D10_Y2_MARK, VI3_D11_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) VI3_D12_Y4_MARK, VI3_D13_Y5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) VI3_D14_Y6_MARK, VI3_D15_Y7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) static const unsigned int vin3_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) /* HSYNC#, VSYNC# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) RCAR_GP_PIN(7, 2), RCAR_GP_PIN(7, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) static const unsigned int vin3_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) VI3_HSYNC_N_MARK, VI3_VSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) static const unsigned int vin3_field_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) RCAR_GP_PIN(7, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) static const unsigned int vin3_field_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) VI3_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) static const unsigned int vin3_clkenb_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) RCAR_GP_PIN(7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) static const unsigned int vin3_clkenb_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) VI3_CLKENB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) static const unsigned int vin3_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) RCAR_GP_PIN(7, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) static const unsigned int vin3_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) VI3_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) /* - VIN4 ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) static const union vin_data12 vin4_data_pins = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) .data12 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) RCAR_GP_PIN(8, 4), RCAR_GP_PIN(8, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) RCAR_GP_PIN(8, 6), RCAR_GP_PIN(8, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) RCAR_GP_PIN(8, 8), RCAR_GP_PIN(8, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) RCAR_GP_PIN(8, 10), RCAR_GP_PIN(8, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) RCAR_GP_PIN(8, 12), RCAR_GP_PIN(8, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) RCAR_GP_PIN(8, 14), RCAR_GP_PIN(8, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) static const union vin_data12 vin4_data_mux = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) .data12 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) VI4_D0_C0_MARK, VI4_D1_C1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) VI4_D2_C2_MARK, VI4_D3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) VI4_D4_C4_MARK, VI4_D5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) VI4_D6_C6_MARK, VI4_D7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) VI4_D8_Y0_MARK, VI4_D9_Y1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) VI4_D10_Y2_MARK, VI4_D11_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) static const unsigned int vin4_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) /* HSYNC#, VSYNC# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) RCAR_GP_PIN(8, 2), RCAR_GP_PIN(8, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) static const unsigned int vin4_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) VI4_HSYNC_N_MARK, VI4_VSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) static const unsigned int vin4_field_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) RCAR_GP_PIN(8, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) static const unsigned int vin4_field_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) VI4_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) static const unsigned int vin4_clkenb_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) RCAR_GP_PIN(8, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) static const unsigned int vin4_clkenb_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) VI4_CLKENB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) static const unsigned int vin4_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) RCAR_GP_PIN(8, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) static const unsigned int vin4_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) VI4_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) /* - VIN5 ------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) static const union vin_data12 vin5_data_pins = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) .data12 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) RCAR_GP_PIN(9, 4), RCAR_GP_PIN(9, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) RCAR_GP_PIN(9, 6), RCAR_GP_PIN(9, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) RCAR_GP_PIN(9, 8), RCAR_GP_PIN(9, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) RCAR_GP_PIN(9, 10), RCAR_GP_PIN(9, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) RCAR_GP_PIN(9, 12), RCAR_GP_PIN(9, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) RCAR_GP_PIN(9, 14), RCAR_GP_PIN(9, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) static const union vin_data12 vin5_data_mux = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) .data12 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) VI5_D0_C0_MARK, VI5_D1_C1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) VI5_D2_C2_MARK, VI5_D3_C3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) VI5_D4_C4_MARK, VI5_D5_C5_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) VI5_D6_C6_MARK, VI5_D7_C7_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) VI5_D8_Y0_MARK, VI5_D9_Y1_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) VI5_D10_Y2_MARK, VI5_D11_Y3_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) static const unsigned int vin5_sync_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) /* HSYNC#, VSYNC# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) RCAR_GP_PIN(9, 2), RCAR_GP_PIN(9, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) static const unsigned int vin5_sync_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) VI5_HSYNC_N_MARK, VI5_VSYNC_N_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) static const unsigned int vin5_field_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) RCAR_GP_PIN(9, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) static const unsigned int vin5_field_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) VI5_FIELD_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) static const unsigned int vin5_clkenb_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) RCAR_GP_PIN(9, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) static const unsigned int vin5_clkenb_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) VI5_CLKENB_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) static const unsigned int vin5_clk_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) RCAR_GP_PIN(9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) static const unsigned int vin5_clk_mux[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) VI5_CLK_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) static const struct sh_pfc_pin_group pinmux_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) SH_PFC_PIN_GROUP(avb_link),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) SH_PFC_PIN_GROUP(avb_magic),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) SH_PFC_PIN_GROUP(avb_phy_int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) SH_PFC_PIN_GROUP(avb_mdio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) SH_PFC_PIN_GROUP(avb_mii),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) SH_PFC_PIN_GROUP(avb_gmii),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) SH_PFC_PIN_GROUP(avb_avtp_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) SH_PFC_PIN_GROUP(can0_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) SH_PFC_PIN_GROUP(can1_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) SH_PFC_PIN_GROUP(can_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) SH_PFC_PIN_GROUP(du0_rgb666),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) SH_PFC_PIN_GROUP(du0_rgb888),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) SH_PFC_PIN_GROUP(du0_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) SH_PFC_PIN_GROUP(du0_oddf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) SH_PFC_PIN_GROUP(du0_disp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) SH_PFC_PIN_GROUP(du0_cde),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) SH_PFC_PIN_GROUP(du1_rgb666),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) SH_PFC_PIN_GROUP(du1_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) SH_PFC_PIN_GROUP(du1_oddf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) SH_PFC_PIN_GROUP(du1_disp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) SH_PFC_PIN_GROUP(du1_cde),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) SH_PFC_PIN_GROUP(intc_irq0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) SH_PFC_PIN_GROUP(intc_irq1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) SH_PFC_PIN_GROUP(intc_irq2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) SH_PFC_PIN_GROUP(intc_irq3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) SH_PFC_PIN_GROUP(lbsc_cs0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) SH_PFC_PIN_GROUP(lbsc_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) SH_PFC_PIN_GROUP(lbsc_ex_cs0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) SH_PFC_PIN_GROUP(lbsc_ex_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) SH_PFC_PIN_GROUP(lbsc_ex_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) SH_PFC_PIN_GROUP(lbsc_ex_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) SH_PFC_PIN_GROUP(lbsc_ex_cs4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) SH_PFC_PIN_GROUP(lbsc_ex_cs5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) SH_PFC_PIN_GROUP(msiof0_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) SH_PFC_PIN_GROUP(msiof0_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) SH_PFC_PIN_GROUP(msiof0_rx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) SH_PFC_PIN_GROUP(msiof0_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) SH_PFC_PIN_GROUP(msiof1_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) SH_PFC_PIN_GROUP(msiof1_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) SH_PFC_PIN_GROUP(msiof1_rx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) SH_PFC_PIN_GROUP(msiof1_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) SH_PFC_PIN_GROUP(qspi_ctrl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) SH_PFC_PIN_GROUP(qspi_data2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) SH_PFC_PIN_GROUP(qspi_data4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) SH_PFC_PIN_GROUP(scif0_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) SH_PFC_PIN_GROUP(scif0_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) SH_PFC_PIN_GROUP(scif0_ctrl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) SH_PFC_PIN_GROUP(scif1_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) SH_PFC_PIN_GROUP(scif1_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) SH_PFC_PIN_GROUP(scif1_ctrl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) SH_PFC_PIN_GROUP(scif2_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) SH_PFC_PIN_GROUP(scif2_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) SH_PFC_PIN_GROUP(scif3_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) SH_PFC_PIN_GROUP(scif3_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) SH_PFC_PIN_GROUP(sdhi0_data1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) SH_PFC_PIN_GROUP(sdhi0_data4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) SH_PFC_PIN_GROUP(sdhi0_ctrl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) SH_PFC_PIN_GROUP(sdhi0_cd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) SH_PFC_PIN_GROUP(sdhi0_wp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) VIN_DATA_PIN_GROUP(vin0_data, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) VIN_DATA_PIN_GROUP(vin0_data, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) SH_PFC_PIN_GROUP(vin0_data18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) VIN_DATA_PIN_GROUP(vin0_data, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) VIN_DATA_PIN_GROUP(vin0_data, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) VIN_DATA_PIN_GROUP(vin0_data, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) VIN_DATA_PIN_GROUP(vin0_data, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) SH_PFC_PIN_GROUP(vin0_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) SH_PFC_PIN_GROUP(vin0_field),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) SH_PFC_PIN_GROUP(vin0_clkenb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) SH_PFC_PIN_GROUP(vin0_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) VIN_DATA_PIN_GROUP(vin1_data, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) VIN_DATA_PIN_GROUP(vin1_data, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) SH_PFC_PIN_GROUP(vin1_data18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) VIN_DATA_PIN_GROUP(vin1_data, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) VIN_DATA_PIN_GROUP(vin1_data, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) VIN_DATA_PIN_GROUP(vin1_data, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) VIN_DATA_PIN_GROUP(vin1_data, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) VIN_DATA_PIN_GROUP(vin1_data, 24, _b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) VIN_DATA_PIN_GROUP(vin1_data, 20, _b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) SH_PFC_PIN_GROUP(vin1_data18_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) VIN_DATA_PIN_GROUP(vin1_data, 16, _b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) SH_PFC_PIN_GROUP(vin1_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) SH_PFC_PIN_GROUP(vin1_field),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) SH_PFC_PIN_GROUP(vin1_clkenb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) SH_PFC_PIN_GROUP(vin1_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) VIN_DATA_PIN_GROUP(vin2_data, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) VIN_DATA_PIN_GROUP(vin2_data, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) VIN_DATA_PIN_GROUP(vin2_data, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) VIN_DATA_PIN_GROUP(vin2_data, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) SH_PFC_PIN_GROUP(vin2_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) SH_PFC_PIN_GROUP(vin2_field),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) SH_PFC_PIN_GROUP(vin2_clkenb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) SH_PFC_PIN_GROUP(vin2_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) VIN_DATA_PIN_GROUP(vin3_data, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) VIN_DATA_PIN_GROUP(vin3_data, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) VIN_DATA_PIN_GROUP(vin3_data, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) VIN_DATA_PIN_GROUP(vin3_data, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) SH_PFC_PIN_GROUP(vin3_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) SH_PFC_PIN_GROUP(vin3_field),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) SH_PFC_PIN_GROUP(vin3_clkenb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) SH_PFC_PIN_GROUP(vin3_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) VIN_DATA_PIN_GROUP(vin4_data, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) VIN_DATA_PIN_GROUP(vin4_data, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) VIN_DATA_PIN_GROUP(vin4_data, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) SH_PFC_PIN_GROUP(vin4_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) SH_PFC_PIN_GROUP(vin4_field),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) SH_PFC_PIN_GROUP(vin4_clkenb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) SH_PFC_PIN_GROUP(vin4_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) VIN_DATA_PIN_GROUP(vin5_data, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) VIN_DATA_PIN_GROUP(vin5_data, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) VIN_DATA_PIN_GROUP(vin5_data, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) SH_PFC_PIN_GROUP(vin5_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) SH_PFC_PIN_GROUP(vin5_field),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) SH_PFC_PIN_GROUP(vin5_clkenb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) SH_PFC_PIN_GROUP(vin5_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) static const char * const avb_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) "avb_link",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) "avb_magic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) "avb_phy_int",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) "avb_mdio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) "avb_mii",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) "avb_gmii",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) "avb_avtp_match",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) static const char * const can0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) "can0_data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) "can_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) static const char * const can1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) "can1_data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) "can_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) static const char * const du0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) "du0_rgb666",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) "du0_rgb888",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) "du0_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) "du0_oddf",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) "du0_disp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) "du0_cde",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) static const char * const du1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) "du1_rgb666",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) "du1_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) "du1_oddf",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) "du1_disp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) "du1_cde",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) static const char * const intc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) "intc_irq0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) "intc_irq1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) "intc_irq2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) "intc_irq3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) static const char * const lbsc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) "lbsc_cs0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) "lbsc_cs1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) "lbsc_ex_cs0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) "lbsc_ex_cs1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) "lbsc_ex_cs2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) "lbsc_ex_cs3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) "lbsc_ex_cs4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) "lbsc_ex_cs5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) static const char * const msiof0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) "msiof0_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) "msiof0_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) "msiof0_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) "msiof0_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) static const char * const msiof1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) "msiof1_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) "msiof1_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) "msiof1_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) "msiof1_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) static const char * const qspi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) "qspi_ctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) "qspi_data2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) "qspi_data4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) static const char * const scif0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) "scif0_data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) "scif0_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) "scif0_ctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) static const char * const scif1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) "scif1_data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) "scif1_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) "scif1_ctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) static const char * const scif2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) "scif2_data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) "scif2_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) static const char * const scif3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) "scif3_data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) "scif3_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) static const char * const sdhi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) "sdhi0_data1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) "sdhi0_data4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) "sdhi0_ctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) "sdhi0_cd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) "sdhi0_wp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) static const char * const vin0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) "vin0_data24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) "vin0_data20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) "vin0_data18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) "vin0_data16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) "vin0_data12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) "vin0_data10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) "vin0_data8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) "vin0_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) "vin0_field",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) "vin0_clkenb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) "vin0_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) static const char * const vin1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) "vin1_data24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) "vin1_data20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) "vin1_data18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) "vin1_data16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) "vin1_data12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) "vin1_data10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) "vin1_data8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) "vin1_data24_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) "vin1_data20_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) "vin1_data18_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) "vin1_data16_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) "vin1_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) "vin1_field",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) "vin1_clkenb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) "vin1_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) static const char * const vin2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) "vin2_data16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) "vin2_data12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) "vin2_data10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) "vin2_data8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) "vin2_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) "vin2_field",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) "vin2_clkenb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) "vin2_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) static const char * const vin3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) "vin3_data16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) "vin3_data12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) "vin3_data10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) "vin3_data8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) "vin3_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) "vin3_field",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) "vin3_clkenb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) "vin3_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) static const char * const vin4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) "vin4_data12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) "vin4_data10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) "vin4_data8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) "vin4_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) "vin4_field",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) "vin4_clkenb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) "vin4_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) static const char * const vin5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) "vin5_data12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) "vin5_data10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) "vin5_data8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) "vin5_sync",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) "vin5_field",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) "vin5_clkenb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) "vin5_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) static const struct sh_pfc_function pinmux_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) SH_PFC_FUNCTION(avb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) SH_PFC_FUNCTION(can0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) SH_PFC_FUNCTION(can1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) SH_PFC_FUNCTION(du0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) SH_PFC_FUNCTION(du1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) SH_PFC_FUNCTION(intc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) SH_PFC_FUNCTION(lbsc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) SH_PFC_FUNCTION(msiof0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) SH_PFC_FUNCTION(msiof1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) SH_PFC_FUNCTION(qspi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) SH_PFC_FUNCTION(scif0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) SH_PFC_FUNCTION(scif1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) SH_PFC_FUNCTION(scif2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) SH_PFC_FUNCTION(scif3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) SH_PFC_FUNCTION(sdhi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) SH_PFC_FUNCTION(vin0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) SH_PFC_FUNCTION(vin1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) SH_PFC_FUNCTION(vin2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) SH_PFC_FUNCTION(vin3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) SH_PFC_FUNCTION(vin4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) SH_PFC_FUNCTION(vin5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) static const struct pinmux_cfg_reg pinmux_config_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) GP_0_28_FN, FN_IP1_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) GP_0_27_FN, FN_IP1_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) GP_0_26_FN, FN_IP1_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) GP_0_25_FN, FN_IP1_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) GP_0_24_FN, FN_IP1_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) GP_0_23_FN, FN_IP0_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) GP_0_22_FN, FN_IP0_22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) GP_0_21_FN, FN_IP0_21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) GP_0_20_FN, FN_IP0_20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) GP_0_19_FN, FN_IP0_19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) GP_0_18_FN, FN_IP0_18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) GP_0_17_FN, FN_IP0_17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) GP_0_16_FN, FN_IP0_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) GP_0_15_FN, FN_IP0_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) GP_0_14_FN, FN_IP0_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) GP_0_13_FN, FN_IP0_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) GP_0_12_FN, FN_IP0_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) GP_0_11_FN, FN_IP0_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) GP_0_10_FN, FN_IP0_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) GP_0_9_FN, FN_IP0_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) GP_0_8_FN, FN_IP0_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) GP_0_7_FN, FN_IP0_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) GP_0_6_FN, FN_IP0_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) GP_0_5_FN, FN_IP0_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) GP_0_4_FN, FN_IP0_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) GP_0_3_FN, FN_IP0_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) GP_0_2_FN, FN_IP0_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) GP_0_1_FN, FN_IP0_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) GP_0_0_FN, FN_IP0_0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) GP_1_22_FN, FN_DU1_CDE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) GP_1_21_FN, FN_DU1_DISP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) GP_1_20_FN, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) GP_1_19_FN, FN_DU1_EXVSYNC_DU1_VSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) GP_1_18_FN, FN_DU1_EXHSYNC_DU1_HSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) GP_1_17_FN, FN_DU1_DB7_C5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) GP_1_16_FN, FN_DU1_DB6_C4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) GP_1_15_FN, FN_DU1_DB5_C3_DATA15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) GP_1_14_FN, FN_DU1_DB4_C2_DATA14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) GP_1_13_FN, FN_DU1_DB3_C1_DATA13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) GP_1_12_FN, FN_DU1_DB2_C0_DATA12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) GP_1_11_FN, FN_IP1_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) GP_1_10_FN, FN_IP1_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) GP_1_9_FN, FN_IP1_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) GP_1_8_FN, FN_IP1_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) GP_1_7_FN, FN_IP1_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) GP_1_6_FN, FN_IP1_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) GP_1_5_FN, FN_IP1_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) GP_1_4_FN, FN_IP1_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) GP_1_3_FN, FN_IP1_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) GP_1_2_FN, FN_IP1_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) GP_1_1_FN, FN_IP1_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) GP_1_0_FN, FN_IP1_5, ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) GP_2_31_FN, FN_A15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) GP_2_30_FN, FN_A14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) GP_2_29_FN, FN_A13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) GP_2_28_FN, FN_A12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) GP_2_27_FN, FN_A11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) GP_2_26_FN, FN_A10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) GP_2_25_FN, FN_A9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) GP_2_24_FN, FN_A8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) GP_2_23_FN, FN_A7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) GP_2_22_FN, FN_A6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) GP_2_21_FN, FN_A5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) GP_2_20_FN, FN_A4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) GP_2_19_FN, FN_A3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) GP_2_18_FN, FN_A2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) GP_2_17_FN, FN_A1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) GP_2_16_FN, FN_A0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) GP_2_15_FN, FN_D15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) GP_2_14_FN, FN_D14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) GP_2_13_FN, FN_D13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) GP_2_12_FN, FN_D12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) GP_2_11_FN, FN_D11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) GP_2_10_FN, FN_D10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) GP_2_9_FN, FN_D9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) GP_2_8_FN, FN_D8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) GP_2_7_FN, FN_D7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) GP_2_6_FN, FN_D6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) GP_2_5_FN, FN_D5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) GP_2_4_FN, FN_D4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) GP_2_3_FN, FN_D3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) GP_2_2_FN, FN_D2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) GP_2_1_FN, FN_D1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) GP_2_0_FN, FN_D0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) GP_3_27_FN, FN_CS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) GP_3_26_FN, FN_IP1_22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) GP_3_25_FN, FN_IP1_21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) GP_3_24_FN, FN_IP1_20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) GP_3_23_FN, FN_IP1_19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) GP_3_22_FN, FN_IRQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) GP_3_21_FN, FN_IRQ2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) GP_3_20_FN, FN_IRQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) GP_3_19_FN, FN_IRQ0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) GP_3_18_FN, FN_EX_WAIT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) GP_3_17_FN, FN_WE1_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) GP_3_16_FN, FN_WE0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) GP_3_15_FN, FN_RD_WR_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) GP_3_14_FN, FN_RD_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) GP_3_13_FN, FN_BS_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) GP_3_12_FN, FN_EX_CS5_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) GP_3_11_FN, FN_EX_CS4_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) GP_3_10_FN, FN_EX_CS3_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) GP_3_9_FN, FN_EX_CS2_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) GP_3_8_FN, FN_EX_CS1_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) GP_3_7_FN, FN_EX_CS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) GP_3_6_FN, FN_CS1_N_A26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) GP_3_5_FN, FN_IP1_18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) GP_3_4_FN, FN_IP1_17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) GP_3_3_FN, FN_A19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) GP_3_2_FN, FN_A18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) GP_3_1_FN, FN_A17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) GP_3_0_FN, FN_A16 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) GP_4_16_FN, FN_VI0_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) GP_4_15_FN, FN_VI0_D11_G3_Y3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) GP_4_14_FN, FN_VI0_D10_G2_Y2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) GP_4_13_FN, FN_VI0_D9_G1_Y1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) GP_4_12_FN, FN_VI0_D8_G0_Y0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) GP_4_11_FN, FN_VI0_D7_B7_C7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) GP_4_10_FN, FN_VI0_D6_B6_C6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) GP_4_9_FN, FN_VI0_D5_B5_C5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) GP_4_8_FN, FN_VI0_D4_B4_C4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) GP_4_7_FN, FN_VI0_D3_B3_C3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) GP_4_6_FN, FN_VI0_D2_B2_C2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) GP_4_5_FN, FN_VI0_D1_B1_C1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) GP_4_4_FN, FN_VI0_D0_B0_C0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) GP_4_3_FN, FN_VI0_VSYNC_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) GP_4_2_FN, FN_VI0_HSYNC_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) GP_4_1_FN, FN_VI0_CLKENB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) GP_4_0_FN, FN_VI0_CLK ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) GP_5_16_FN, FN_VI1_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) GP_5_15_FN, FN_VI1_D11_G3_Y3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) GP_5_14_FN, FN_VI1_D10_G2_Y2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) GP_5_13_FN, FN_VI1_D9_G1_Y1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) GP_5_12_FN, FN_VI1_D8_G0_Y0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) GP_5_11_FN, FN_VI1_D7_B7_C7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) GP_5_10_FN, FN_VI1_D6_B6_C6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) GP_5_9_FN, FN_VI1_D5_B5_C5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) GP_5_8_FN, FN_VI1_D4_B4_C4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) GP_5_7_FN, FN_VI1_D3_B3_C3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) GP_5_6_FN, FN_VI1_D2_B2_C2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) GP_5_5_FN, FN_VI1_D1_B1_C1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) GP_5_4_FN, FN_VI1_D0_B0_C0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) GP_5_3_FN, FN_VI1_VSYNC_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) GP_5_2_FN, FN_VI1_HSYNC_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) GP_5_1_FN, FN_VI1_CLKENB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) GP_5_0_FN, FN_VI1_CLK ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) GP_6_16_FN, FN_IP2_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) GP_6_15_FN, FN_IP2_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) GP_6_14_FN, FN_IP2_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) GP_6_13_FN, FN_IP2_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) GP_6_12_FN, FN_IP2_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) GP_6_11_FN, FN_IP2_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) GP_6_10_FN, FN_IP2_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) GP_6_9_FN, FN_IP2_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) GP_6_8_FN, FN_IP2_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) GP_6_7_FN, FN_IP2_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) GP_6_6_FN, FN_IP2_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) GP_6_5_FN, FN_IP2_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) GP_6_4_FN, FN_IP2_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) GP_6_3_FN, FN_IP2_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) GP_6_2_FN, FN_IP2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) GP_6_1_FN, FN_IP2_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) GP_6_0_FN, FN_IP2_0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) GP_7_16_FN, FN_VI3_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) GP_7_15_FN, FN_IP3_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) GP_7_14_FN, FN_VI3_D10_Y2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) GP_7_13_FN, FN_IP3_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) GP_7_12_FN, FN_IP3_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) GP_7_11_FN, FN_IP3_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) GP_7_10_FN, FN_IP3_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) GP_7_9_FN, FN_IP3_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) GP_7_8_FN, FN_IP3_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) GP_7_7_FN, FN_IP3_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) GP_7_6_FN, FN_IP3_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) GP_7_5_FN, FN_IP3_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) GP_7_4_FN, FN_IP3_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) GP_7_3_FN, FN_IP3_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) GP_7_2_FN, FN_IP3_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) GP_7_1_FN, FN_IP3_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) GP_7_0_FN, FN_IP3_0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) GP_8_16_FN, FN_IP4_24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) GP_8_15_FN, FN_IP4_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) GP_8_14_FN, FN_IP4_22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) GP_8_13_FN, FN_IP4_21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) GP_8_12_FN, FN_IP4_20_19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) GP_8_11_FN, FN_IP4_18_17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) GP_8_10_FN, FN_IP4_16_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) GP_8_9_FN, FN_IP4_14_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) GP_8_8_FN, FN_IP4_12_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) GP_8_7_FN, FN_IP4_10_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) GP_8_6_FN, FN_IP4_8_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) GP_8_5_FN, FN_IP4_6_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) GP_8_4_FN, FN_IP4_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) GP_8_3_FN, FN_IP4_3_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) GP_8_2_FN, FN_IP4_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) GP_8_1_FN, FN_IP4_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) GP_8_0_FN, FN_VI4_CLK ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) GP_9_16_FN, FN_VI5_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) GP_9_15_FN, FN_VI5_D11_Y3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) GP_9_14_FN, FN_VI5_D10_Y2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) GP_9_13_FN, FN_VI5_D9_Y1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) GP_9_12_FN, FN_IP5_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) GP_9_11_FN, FN_IP5_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) GP_9_10_FN, FN_IP5_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) GP_9_9_FN, FN_IP5_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) GP_9_8_FN, FN_IP5_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) GP_9_7_FN, FN_IP5_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) GP_9_6_FN, FN_IP5_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) GP_9_5_FN, FN_IP5_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) GP_9_4_FN, FN_IP5_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) GP_9_3_FN, FN_IP5_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) GP_9_2_FN, FN_IP5_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) GP_9_1_FN, FN_IP5_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) GP_9_0_FN, FN_VI5_CLK ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) { PINMUX_CFG_REG("GPSR10", 0xE606002C, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) GP_10_31_FN, FN_CAN1_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) GP_10_30_FN, FN_CAN1_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) GP_10_29_FN, FN_CAN_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) GP_10_28_FN, FN_CAN0_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) GP_10_27_FN, FN_CAN0_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) GP_10_26_FN, FN_SCIF_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) GP_10_25_FN, FN_IP6_18_17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) GP_10_24_FN, FN_IP6_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) GP_10_23_FN, FN_IP6_15_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) GP_10_22_FN, FN_IP6_13_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) GP_10_21_FN, FN_IP6_11_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) GP_10_20_FN, FN_IP6_9_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) GP_10_19_FN, FN_RX1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) GP_10_18_FN, FN_TX1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) GP_10_17_FN, FN_RTS1_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) GP_10_16_FN, FN_CTS1_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) GP_10_15_FN, FN_SCK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) GP_10_14_FN, FN_RX0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) GP_10_13_FN, FN_TX0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) GP_10_12_FN, FN_RTS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) GP_10_11_FN, FN_CTS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) GP_10_10_FN, FN_SCK0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) GP_10_9_FN, FN_IP6_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) GP_10_8_FN, FN_IP6_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) GP_10_7_FN, FN_HCTS1_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) GP_10_6_FN, FN_IP6_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) GP_10_5_FN, FN_IP6_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) GP_10_4_FN, FN_IP6_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) GP_10_3_FN, FN_IP6_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) GP_10_2_FN, FN_HRTS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) GP_10_1_FN, FN_IP6_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) GP_10_0_FN, FN_IP6_0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) { PINMUX_CFG_REG("GPSR11", 0xE6060030, 32, 1, GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) GP_11_29_FN, FN_AVS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) GP_11_28_FN, FN_AVS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) GP_11_27_FN, FN_ADICHS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) GP_11_26_FN, FN_ADICHS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) GP_11_25_FN, FN_ADICHS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) GP_11_24_FN, FN_ADIDATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) GP_11_23_FN, FN_ADICS_SAMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) GP_11_22_FN, FN_ADICLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) GP_11_21_FN, FN_IP7_20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) GP_11_20_FN, FN_IP7_19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) GP_11_19_FN, FN_IP7_18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) GP_11_18_FN, FN_IP7_17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) GP_11_17_FN, FN_IP7_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) GP_11_16_FN, FN_IP7_15_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) GP_11_15_FN, FN_IP7_13_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) GP_11_14_FN, FN_IP7_11_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) GP_11_13_FN, FN_IP7_9_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) GP_11_12_FN, FN_SD0_WP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) GP_11_11_FN, FN_SD0_CD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) GP_11_10_FN, FN_SD0_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) GP_11_9_FN, FN_SD0_DAT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) GP_11_8_FN, FN_SD0_DAT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) GP_11_7_FN, FN_SD0_DAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) GP_11_6_FN, FN_SD0_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) GP_11_5_FN, FN_SD0_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) GP_11_4_FN, FN_IP7_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) GP_11_3_FN, FN_IP7_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) GP_11_2_FN, FN_IP7_5_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) GP_11_1_FN, FN_IP7_3_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) GP_11_0_FN, FN_IP7_1_0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060040, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) GROUP(4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) 1, 1, 1, 1, 1, 1, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) 1, 1, 1, 1, 1, 1, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) 1, 1, 1, 1, 1, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) /* IP0_31_28 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) /* IP0_27_24 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) /* IP0_23 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) FN_DU0_DB7_C5, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) /* IP0_22 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) FN_DU0_DB6_C4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) /* IP0_21 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) FN_DU0_DB5_C3, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) /* IP0_20 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) FN_DU0_DB4_C2, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) /* IP0_19 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) FN_DU0_DB3_C1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) /* IP0_18 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) FN_DU0_DB2_C0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) /* IP0_17 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) FN_DU0_DB1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) /* IP0_16 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) FN_DU0_DB0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) /* IP0_15 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) FN_DU0_DG7_Y3_DATA15, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) /* IP0_14 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) FN_DU0_DG6_Y2_DATA14, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) /* IP0_13 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) FN_DU0_DG5_Y1_DATA13, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) /* IP0_12 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) FN_DU0_DG4_Y0_DATA12, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) /* IP0_11 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) FN_DU0_DG3_C7_DATA11, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) /* IP0_10 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) FN_DU0_DG2_C6_DATA10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) /* IP0_9 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) FN_DU0_DG1_DATA9, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) /* IP0_8 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) FN_DU0_DG0_DATA8, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) /* IP0_7 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) FN_DU0_DR7_Y9_DATA7, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) /* IP0_6 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) FN_DU0_DR6_Y8_DATA6, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) /* IP0_5 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) FN_DU0_DR5_Y7_DATA5, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) /* IP0_4 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) FN_DU0_DR4_Y6_DATA4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) /* IP0_3 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) FN_DU0_DR3_Y5_DATA3, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) /* IP0_2 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) FN_DU0_DR2_Y4_DATA2, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) /* IP0_1 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) FN_DU0_DR1_DATA1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) /* IP0_0 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) FN_DU0_DR0_DATA0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060044, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) GROUP(4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) 1, 1, 1, 1, 1, 1, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) 1, 1, 1, 1, 1, 1, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) 1, 1, 1, 1, 1, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) /* IP1_31_28 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) /* IP1_27_24 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) /* IP1_23 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) /* IP1_22 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) FN_A25, FN_SSL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) /* IP1_21 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) FN_A24, FN_SPCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) /* IP1_20 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) FN_A23, FN_IO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) /* IP1_19 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) FN_A22, FN_IO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) /* IP1_18 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) FN_A21, FN_MISO_IO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) /* IP1_17 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) FN_A20, FN_MOSI_IO0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) /* IP1_16 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) FN_DU1_DG7_Y3_DATA11, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) /* IP1_15 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) FN_DU1_DG6_Y2_DATA10, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) /* IP1_14 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) FN_DU1_DG5_Y1_DATA9, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) /* IP1_13 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) FN_DU1_DG4_Y0_DATA8, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) /* IP1_12 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) FN_DU1_DG3_C7_DATA7, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) /* IP1_11 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) FN_DU1_DG2_C6_DATA6, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) /* IP1_10 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) FN_DU1_DR7_DATA5, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) /* IP1_9 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) FN_DU1_DR6_DATA4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) /* IP1_8 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) FN_DU1_DR5_Y7_DATA3, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) /* IP1_7 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) FN_DU1_DR4_Y6_DATA2, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) /* IP1_6 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) FN_DU1_DR3_Y5_DATA1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) /* IP1_5 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) FN_DU1_DR2_Y4_DATA0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) /* IP1_4 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) FN_DU0_CDE, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) /* IP1_3 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) FN_DU0_DISP, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) /* IP1_2 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) /* IP1_1 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) FN_DU0_EXVSYNC_DU0_VSYNC, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) /* IP1_0 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) FN_DU0_EXHSYNC_DU0_HSYNC, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060048, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) GROUP(4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) 4, 3, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) 1, 1, 1, 1, 1, 1, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) 1, 1, 1, 1, 1, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) /* IP2_31_28 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) /* IP2_27_24 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) /* IP2_23_20 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) /* IP2_19_17 [3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) /* IP2_16 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) FN_VI2_FIELD, FN_AVB_TXD2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) /* IP2_15 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) FN_VI2_D11_Y3, FN_AVB_TXD1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) /* IP2_14 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) FN_VI2_D10_Y2, FN_AVB_TXD0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) /* IP2_13 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) FN_VI2_D9_Y1, FN_AVB_TX_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) /* IP2_12 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) FN_VI2_D8_Y0, FN_AVB_TXD3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) /* IP2_11 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) FN_VI2_D7_C7, FN_AVB_COL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) /* IP2_10 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) FN_VI2_D6_C6, FN_AVB_RX_ER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) /* IP2_9 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) FN_VI2_D5_C5, FN_AVB_RXD7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) /* IP2_8 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) FN_VI2_D4_C4, FN_AVB_RXD6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) /* IP2_7 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) FN_VI2_D3_C3, FN_AVB_RXD5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) /* IP2_6 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) FN_VI2_D2_C2, FN_AVB_RXD4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) /* IP2_5 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) FN_VI2_D1_C1, FN_AVB_RXD3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) /* IP2_4 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) FN_VI2_D0_C0, FN_AVB_RXD2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) /* IP2_3 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) FN_VI2_VSYNC_N, FN_AVB_RXD1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) /* IP2_2 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) FN_VI2_HSYNC_N, FN_AVB_RXD0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) /* IP2_1 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) FN_VI2_CLKENB, FN_AVB_RX_DV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) /* IP2_0 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) FN_VI2_CLK, FN_AVB_RX_CLK ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) { PINMUX_CFG_REG_VAR("IPSR3", 0xE606004C, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) GROUP(4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) 4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) 1, 1, 1, 1, 1, 1, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) 1, 1, 1, 1, 1, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) /* IP3_31_28 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) /* IP3_27_24 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) /* IP3_23_20 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) /* IP3_19_16 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) /* IP3_15 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) /* IP3_14 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) FN_VI3_D11_Y3, FN_AVB_AVTP_MATCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) /* IP3_13 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) /* IP3_12 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) FN_VI3_D8_Y0, FN_AVB_CRS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) /* IP3_11 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) FN_VI3_D7_C7, FN_AVB_PHY_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) /* IP3_10 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) FN_VI3_D6_C6, FN_AVB_MAGIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) /* IP3_9 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) FN_VI3_D5_C5, FN_AVB_LINK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) /* IP3_8 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) FN_VI3_D4_C4, FN_AVB_MDIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) /* IP3_7 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) FN_VI3_D3_C3, FN_AVB_MDC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) /* IP3_6 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) FN_VI3_D2_C2, FN_AVB_GTX_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) /* IP3_5 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) FN_VI3_D1_C1, FN_AVB_TX_ER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) /* IP3_4 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) FN_VI3_D0_C0, FN_AVB_TXD7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) /* IP3_3 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) FN_VI3_VSYNC_N, FN_AVB_TXD6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) /* IP3_2 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) FN_VI3_HSYNC_N, FN_AVB_TXD5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) /* IP3_1 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) FN_VI3_CLKENB, FN_AVB_TXD4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) /* IP3_0 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) FN_VI3_CLK, FN_AVB_TX_CLK ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060050, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) GROUP(4, 3, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) 1, 1, 1, 2, 2, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) 2, 2, 2, 2, 2, 1, 2, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) /* IP4_31_28 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) /* IP4_27_25 [3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) /* IP4_24 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) FN_VI4_FIELD, FN_VI3_D15_Y7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) /* IP4_23 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) FN_VI4_D11_Y3, FN_VI3_D14_Y6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) /* IP4_22 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) FN_VI4_D10_Y2, FN_VI3_D13_Y5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) /* IP4_21 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) FN_VI4_D9_Y1, FN_VI3_D12_Y4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) /* IP4_20_19 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) /* IP4_18_17 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) /* IP4_16_15 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) /* IP4_14_13 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) /* IP4_12_11 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) /* IP4_10_9 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) /* IP4_8_7 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) FN_VI4_D2_C2, 0, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) /* IP4_6_5 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) /* IP4_4 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) /* IP4_3_2 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) FN_VI4_VSYNC_N, FN_VI0_D14_G6_Y6, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) /* IP4_1 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) FN_VI4_HSYNC_N, FN_VI0_D13_G5_Y5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) /* IP4_0 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) FN_VI4_CLKENB, FN_VI0_D12_G4_Y4 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060054, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) GROUP(4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) 4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) 4, 1, 1, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) 1, 1, 1, 1, 1, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) /* IP5_31_28 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) /* IP5_27_24 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) /* IP5_23_20 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) /* IP5_19_16 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) /* IP5_15_12 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) /* IP5_11 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) FN_VI5_D8_Y0, FN_VI1_D23_R7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) /* IP5_10 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) FN_VI5_D7_C7, FN_VI1_D22_R6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) /* IP5_9 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) FN_VI5_D6_C6, FN_VI1_D21_R5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) /* IP5_8 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) FN_VI5_D5_C5, FN_VI1_D20_R4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) /* IP5_7 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) FN_VI5_D4_C4, FN_VI1_D19_R3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) /* IP5_6 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) FN_VI5_D3_C3, FN_VI1_D18_R2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) /* IP5_5 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) FN_VI5_D2_C2, FN_VI1_D17_R1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) /* IP5_4 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) FN_VI5_D1_C1, FN_VI1_D16_R0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) /* IP5_3 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) /* IP5_2 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) FN_VI5_VSYNC_N, FN_VI1_D14_G6_Y6_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) /* IP5_1 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) FN_VI5_HSYNC_N, FN_VI1_D13_G5_Y5_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) /* IP5_0 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_B ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060058, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) GROUP(4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) 4, 1, 2, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) 2, 2, 2, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) 1, 1, 1, 1, 1, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) /* IP6_31_28 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) /* IP6_27_24 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) /* IP6_23_20 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) /* IP6_19 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) /* IP6_18_17 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) FN_DREQ1_N, FN_RX3, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) /* IP6_16 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) FN_TX3, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) /* IP6_15_14 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) FN_DACK1, FN_SCK3, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) /* IP6_13_12 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) FN_DREQ0_N, FN_RX2, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) /* IP6_11_10 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) FN_DACK0, FN_TX2, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) /* IP6_9_8 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) FN_DRACK0, FN_SCK2, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) /* IP6_7 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) FN_MSIOF1_RXD, FN_HRX1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) /* IP6_6 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) FN_MSIOF1_TXD, FN_HTX1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) /* IP6_5 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) FN_MSIOF1_SYNC, FN_HRTS1_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) /* IP6_4 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) FN_MSIOF1_SCK, FN_HSCK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) /* IP6_3 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) FN_MSIOF0_RXD, FN_HRX0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) /* IP6_2 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) FN_MSIOF0_TXD, FN_HTX0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) /* IP6_1 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) FN_MSIOF0_SYNC, FN_HCTS0_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) /* IP6_0 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) FN_MSIOF0_SCK, FN_HSCK0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) { PINMUX_CFG_REG_VAR("IPSR7", 0xE606005C, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) GROUP(4, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) 3, 1, 1, 1, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) 2, 2, 2, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) 1, 1, 2, 2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) GROUP(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) /* IP7_31_28 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) /* IP7_27_24 [4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) /* IP7_23_21 [3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) /* IP7_20 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) FN_AUDIO_CLKB, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) /* IP7_19 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) FN_AUDIO_CLKA, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) /* IP7_18 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) FN_AUDIO_CLKOUT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) /* IP7_17 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) FN_SSI_SDATA4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) /* IP7_16 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) FN_SSI_WS4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) /* IP7_15_14 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) FN_SSI_SCK4, FN_TPU0TO3, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) /* IP7_13_12 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) FN_SSI_SDATA3, FN_TPU0TO2, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) /* IP7_11_10 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) FN_SSI_WS34, FN_TPU0TO1, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) /* IP7_9_8 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) FN_SSI_SCK34, FN_TPU0TO0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) /* IP7_7 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) FN_PWM4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) /* IP7_6 [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) FN_PWM3, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) /* IP7_5_4 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) FN_PWM2, FN_TCLK3, FN_FSO_TOE, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) /* IP7_3_2 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) FN_PWM1, FN_TCLK2, FN_FSO_CFE_1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) /* IP7_1_0 [2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, 0 ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) const struct sh_pfc_soc_info r8a7792_pinmux_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) .name = "r8a77920_pfc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) .unlock_reg = 0xe6060000, /* PMMR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) .pins = pinmux_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) .nr_pins = ARRAY_SIZE(pinmux_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) .groups = pinmux_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) .nr_groups = ARRAY_SIZE(pinmux_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) .functions = pinmux_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) .nr_functions = ARRAY_SIZE(pinmux_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) .cfg_regs = pinmux_config_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) .pinmux_data = pinmux_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) .pinmux_data_size = ARRAY_SIZE(pinmux_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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