^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2018, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const char * const qcs404_tiles[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) "north",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) "south",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) "east"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) NORTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SOUTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) EAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) [msm_mux_##fname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .name = "gpio" #id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .pins = gpio##id##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .funcs = (int[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) msm_mux_gpio, /* gpio mode */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) msm_mux_##f1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) msm_mux_##f2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) msm_mux_##f3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) msm_mux_##f4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) msm_mux_##f5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) msm_mux_##f6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) msm_mux_##f7, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) msm_mux_##f8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) msm_mux_##f9 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .nfuncs = 10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .ctl_reg = 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .io_reg = 0x1000 * id + 0x4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .intr_cfg_reg = 0x1000 * id + 0x8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .intr_status_reg = 0x1000 * id + 0xc, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .intr_target_reg = 0x1000 * id + 0x8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .tile = _tile, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .mux_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .pull_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .drv_bit = 6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .oe_bit = 9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .in_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .out_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .intr_enable_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .intr_status_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .intr_target_bit = 5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .intr_target_kpss_val = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .intr_raw_status_bit = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .intr_polarity_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .intr_detection_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .intr_detection_width = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .name = #pg_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .pins = pg_name##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .ctl_reg = ctl, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .io_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .intr_cfg_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .intr_status_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .intr_target_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .tile = SOUTH, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .mux_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .pull_bit = pull, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .drv_bit = drv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .oe_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .in_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .out_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .intr_enable_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .intr_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .intr_target_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .intr_raw_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .intr_polarity_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .intr_detection_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .intr_detection_width = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static const struct pinctrl_pin_desc qcs404_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) PINCTRL_PIN(70, "GPIO_70"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) PINCTRL_PIN(71, "GPIO_71"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) PINCTRL_PIN(72, "GPIO_72"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PINCTRL_PIN(73, "GPIO_73"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) PINCTRL_PIN(74, "GPIO_74"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PINCTRL_PIN(75, "GPIO_75"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PINCTRL_PIN(76, "GPIO_76"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) PINCTRL_PIN(77, "GPIO_77"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) PINCTRL_PIN(78, "GPIO_78"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PINCTRL_PIN(79, "GPIO_79"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PINCTRL_PIN(80, "GPIO_80"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PINCTRL_PIN(81, "GPIO_81"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PINCTRL_PIN(82, "GPIO_82"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PINCTRL_PIN(83, "GPIO_83"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PINCTRL_PIN(84, "GPIO_84"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PINCTRL_PIN(85, "GPIO_85"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PINCTRL_PIN(86, "GPIO_86"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINCTRL_PIN(87, "GPIO_87"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PINCTRL_PIN(88, "GPIO_88"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) PINCTRL_PIN(89, "GPIO_89"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PINCTRL_PIN(90, "GPIO_90"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PINCTRL_PIN(91, "GPIO_91"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PINCTRL_PIN(92, "GPIO_92"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PINCTRL_PIN(93, "GPIO_93"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PINCTRL_PIN(94, "GPIO_94"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) PINCTRL_PIN(95, "GPIO_95"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PINCTRL_PIN(96, "GPIO_96"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PINCTRL_PIN(97, "GPIO_97"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PINCTRL_PIN(98, "GPIO_98"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PINCTRL_PIN(99, "GPIO_99"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PINCTRL_PIN(100, "GPIO_100"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PINCTRL_PIN(101, "GPIO_101"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PINCTRL_PIN(102, "GPIO_102"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PINCTRL_PIN(103, "GPIO_103"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PINCTRL_PIN(104, "GPIO_104"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINCTRL_PIN(105, "GPIO_105"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) PINCTRL_PIN(106, "GPIO_106"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PINCTRL_PIN(107, "GPIO_107"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PINCTRL_PIN(108, "GPIO_108"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) PINCTRL_PIN(109, "GPIO_109"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PINCTRL_PIN(110, "GPIO_110"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PINCTRL_PIN(111, "GPIO_111"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PINCTRL_PIN(112, "GPIO_112"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PINCTRL_PIN(113, "GPIO_113"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) PINCTRL_PIN(114, "GPIO_114"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PINCTRL_PIN(115, "GPIO_115"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) PINCTRL_PIN(116, "GPIO_116"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PINCTRL_PIN(117, "GPIO_117"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PINCTRL_PIN(118, "GPIO_118"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PINCTRL_PIN(119, "GPIO_119"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PINCTRL_PIN(120, "SDC1_RCLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) PINCTRL_PIN(121, "SDC1_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PINCTRL_PIN(122, "SDC1_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) PINCTRL_PIN(123, "SDC1_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PINCTRL_PIN(124, "SDC2_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) PINCTRL_PIN(125, "SDC2_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) PINCTRL_PIN(126, "SDC2_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define DECLARE_MSM_GPIO_PINS(pin) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) DECLARE_MSM_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) DECLARE_MSM_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) DECLARE_MSM_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) DECLARE_MSM_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) DECLARE_MSM_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) DECLARE_MSM_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) DECLARE_MSM_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) DECLARE_MSM_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) DECLARE_MSM_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) DECLARE_MSM_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) DECLARE_MSM_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) DECLARE_MSM_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) DECLARE_MSM_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) DECLARE_MSM_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) DECLARE_MSM_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) DECLARE_MSM_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) DECLARE_MSM_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) DECLARE_MSM_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) DECLARE_MSM_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) DECLARE_MSM_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) DECLARE_MSM_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) DECLARE_MSM_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) DECLARE_MSM_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) DECLARE_MSM_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) DECLARE_MSM_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) DECLARE_MSM_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) DECLARE_MSM_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DECLARE_MSM_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) DECLARE_MSM_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) DECLARE_MSM_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) DECLARE_MSM_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) DECLARE_MSM_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) DECLARE_MSM_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) DECLARE_MSM_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) DECLARE_MSM_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) DECLARE_MSM_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) DECLARE_MSM_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) DECLARE_MSM_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) DECLARE_MSM_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) DECLARE_MSM_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) DECLARE_MSM_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) DECLARE_MSM_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) DECLARE_MSM_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) DECLARE_MSM_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) DECLARE_MSM_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) DECLARE_MSM_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) DECLARE_MSM_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) DECLARE_MSM_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) DECLARE_MSM_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) DECLARE_MSM_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) DECLARE_MSM_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) DECLARE_MSM_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) DECLARE_MSM_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) DECLARE_MSM_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) DECLARE_MSM_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) DECLARE_MSM_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) DECLARE_MSM_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) DECLARE_MSM_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) DECLARE_MSM_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) DECLARE_MSM_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) DECLARE_MSM_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) DECLARE_MSM_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) DECLARE_MSM_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) DECLARE_MSM_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) DECLARE_MSM_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) DECLARE_MSM_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) DECLARE_MSM_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) DECLARE_MSM_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) DECLARE_MSM_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) DECLARE_MSM_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) DECLARE_MSM_GPIO_PINS(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) DECLARE_MSM_GPIO_PINS(71);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) DECLARE_MSM_GPIO_PINS(72);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) DECLARE_MSM_GPIO_PINS(73);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) DECLARE_MSM_GPIO_PINS(74);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) DECLARE_MSM_GPIO_PINS(75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) DECLARE_MSM_GPIO_PINS(76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) DECLARE_MSM_GPIO_PINS(77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) DECLARE_MSM_GPIO_PINS(78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) DECLARE_MSM_GPIO_PINS(79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) DECLARE_MSM_GPIO_PINS(80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) DECLARE_MSM_GPIO_PINS(81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) DECLARE_MSM_GPIO_PINS(82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) DECLARE_MSM_GPIO_PINS(83);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) DECLARE_MSM_GPIO_PINS(84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) DECLARE_MSM_GPIO_PINS(85);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) DECLARE_MSM_GPIO_PINS(86);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) DECLARE_MSM_GPIO_PINS(87);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) DECLARE_MSM_GPIO_PINS(88);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) DECLARE_MSM_GPIO_PINS(89);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) DECLARE_MSM_GPIO_PINS(90);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) DECLARE_MSM_GPIO_PINS(91);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) DECLARE_MSM_GPIO_PINS(92);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) DECLARE_MSM_GPIO_PINS(93);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) DECLARE_MSM_GPIO_PINS(94);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) DECLARE_MSM_GPIO_PINS(95);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) DECLARE_MSM_GPIO_PINS(96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) DECLARE_MSM_GPIO_PINS(97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) DECLARE_MSM_GPIO_PINS(98);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) DECLARE_MSM_GPIO_PINS(99);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) DECLARE_MSM_GPIO_PINS(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) DECLARE_MSM_GPIO_PINS(101);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) DECLARE_MSM_GPIO_PINS(102);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) DECLARE_MSM_GPIO_PINS(103);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) DECLARE_MSM_GPIO_PINS(104);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) DECLARE_MSM_GPIO_PINS(105);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) DECLARE_MSM_GPIO_PINS(106);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) DECLARE_MSM_GPIO_PINS(107);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) DECLARE_MSM_GPIO_PINS(108);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) DECLARE_MSM_GPIO_PINS(109);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) DECLARE_MSM_GPIO_PINS(110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) DECLARE_MSM_GPIO_PINS(111);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) DECLARE_MSM_GPIO_PINS(112);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) DECLARE_MSM_GPIO_PINS(113);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) DECLARE_MSM_GPIO_PINS(114);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) DECLARE_MSM_GPIO_PINS(115);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) DECLARE_MSM_GPIO_PINS(116);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) DECLARE_MSM_GPIO_PINS(117);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) DECLARE_MSM_GPIO_PINS(118);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) DECLARE_MSM_GPIO_PINS(119);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static const unsigned int sdc1_rclk_pins[] = { 120 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static const unsigned int sdc1_clk_pins[] = { 121 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static const unsigned int sdc1_cmd_pins[] = { 122 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static const unsigned int sdc1_data_pins[] = { 123 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static const unsigned int sdc2_clk_pins[] = { 124 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static const unsigned int sdc2_cmd_pins[] = { 125 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static const unsigned int sdc2_data_pins[] = { 126 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) enum qcs404_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) msm_mux_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) msm_mux_hdmi_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) msm_mux_hdmi_ddc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) msm_mux_blsp_uart_tx_a2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) msm_mux_blsp_spi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) msm_mux_m_voc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) msm_mux_qdss_cti_trig_in_a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) msm_mux_blsp_uart_rx_a2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) msm_mux_qdss_tracectl_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) msm_mux_blsp_uart2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) msm_mux_aud_cdc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) msm_mux_blsp_i2c_sda_a2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) msm_mux_qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) msm_mux_blsp_i2c_scl_a2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) msm_mux_qdss_tracectl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) msm_mux_qdss_cti_trig_in_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) msm_mux_blsp_uart1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) msm_mux_blsp_spi_mosi_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) msm_mux_blsp_spi_miso_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) msm_mux_qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) msm_mux_blsp_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) msm_mux_blsp_spi_cs_n_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) msm_mux_gcc_plltest,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) msm_mux_blsp_spi_clk_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) msm_mux_rgb_data0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) msm_mux_blsp_uart5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) msm_mux_blsp_spi5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) msm_mux_adsp_ext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) msm_mux_rgb_data1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) msm_mux_prng_rosc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) msm_mux_rgb_data2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) msm_mux_blsp_i2c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) msm_mux_gcc_gp1_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) msm_mux_rgb_data3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) msm_mux_gcc_gp2_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) msm_mux_blsp_spi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) msm_mux_blsp_uart0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) msm_mux_gcc_gp3_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) msm_mux_blsp_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) msm_mux_qdss_traceclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) msm_mux_pcie_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) msm_mux_nfc_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) msm_mux_blsp_spi4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) msm_mux_nfc_dwl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) msm_mux_audio_ts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) msm_mux_rgb_data4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) msm_mux_spi_lcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) msm_mux_blsp_uart_tx_b2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) msm_mux_gcc_gp3_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) msm_mux_rgb_data5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) msm_mux_blsp_uart_rx_b2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) msm_mux_blsp_i2c_sda_b2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) msm_mux_blsp_i2c_scl_b2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) msm_mux_pwm_led11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) msm_mux_i2s_3_data0_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) msm_mux_ebi2_lcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) msm_mux_i2s_3_data1_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) msm_mux_i2s_3_data2_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) msm_mux_atest_char,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) msm_mux_pwm_led3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) msm_mux_i2s_3_data3_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) msm_mux_pwm_led4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) msm_mux_i2s_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) msm_mux_ebi2_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) msm_mux_dsd_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) msm_mux_pwm_led5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) msm_mux_pwm_led6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) msm_mux_pwm_led7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) msm_mux_pwm_led8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) msm_mux_pwm_led24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) msm_mux_spkr_dac0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) msm_mux_blsp_i2c4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) msm_mux_pwm_led9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) msm_mux_pwm_led10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) msm_mux_spdifrx_opt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) msm_mux_pwm_led12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) msm_mux_pwm_led13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) msm_mux_pwm_led14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) msm_mux_wlan1_adc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) msm_mux_rgb_data_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) msm_mux_pwm_led15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) msm_mux_blsp_spi_mosi_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) msm_mux_wlan1_adc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) msm_mux_rgb_data_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) msm_mux_pwm_led16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) msm_mux_blsp_spi_miso_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) msm_mux_qdss_cti_trig_out_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) msm_mux_wlan2_adc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) msm_mux_rgb_data_b2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) msm_mux_pwm_led17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) msm_mux_blsp_spi_cs_n_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) msm_mux_wlan2_adc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) msm_mux_rgb_data_b3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) msm_mux_pwm_led18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) msm_mux_blsp_spi_clk_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) msm_mux_rgb_data_b4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) msm_mux_pwm_led19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) msm_mux_ext_mclk1_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) msm_mux_qdss_traceclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) msm_mux_rgb_data_b5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) msm_mux_pwm_led20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) msm_mux_atest_char3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) msm_mux_i2s_3_sck_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) msm_mux_ldo_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) msm_mux_bimc_dte0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) msm_mux_rgb_hsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) msm_mux_pwm_led21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) msm_mux_i2s_3_ws_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) msm_mux_dbg_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) msm_mux_rgb_vsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) msm_mux_i2s_3_data0_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) msm_mux_ldo_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) msm_mux_hdmi_dtest,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) msm_mux_rgb_de,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) msm_mux_i2s_3_data1_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) msm_mux_hdmi_lbk9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) msm_mux_rgb_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) msm_mux_atest_char1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) msm_mux_i2s_3_data2_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) msm_mux_ebi_cdc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) msm_mux_hdmi_lbk8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) msm_mux_rgb_mdp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) msm_mux_atest_char0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) msm_mux_i2s_3_data3_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) msm_mux_hdmi_lbk7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) msm_mux_rgb_data_b6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) msm_mux_rgb_data_b7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) msm_mux_hdmi_lbk6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) msm_mux_rgmii_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) msm_mux_cri_trng1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) msm_mux_rgmii_wol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) msm_mux_cri_trng0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) msm_mux_gcc_tlmm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) msm_mux_rgmii_ck,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) msm_mux_rgmii_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) msm_mux_hdmi_lbk5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) msm_mux_hdmi_pixel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) msm_mux_hdmi_rcv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) msm_mux_hdmi_lbk4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) msm_mux_rgmii_ctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) msm_mux_ext_lpass,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) msm_mux_rgmii_rx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) msm_mux_cri_trng,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) msm_mux_hdmi_lbk3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) msm_mux_hdmi_lbk2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) msm_mux_qdss_cti_trig_out_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) msm_mux_rgmii_mdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) msm_mux_hdmi_lbk1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) msm_mux_rgmii_mdc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) msm_mux_hdmi_lbk0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) msm_mux_ir_in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) msm_mux_wsa_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) msm_mux_rgb_data6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) msm_mux_rgb_data7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) msm_mux_atest_char2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) msm_mux_ebi_ch0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) msm_mux_blsp_uart3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) msm_mux_blsp_spi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) msm_mux_sd_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) msm_mux_blsp_i2c3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) msm_mux_gcc_gp1_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) msm_mux_qdss_cti_trig_in_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) msm_mux_gcc_gp2_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) msm_mux_ext_mclk0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) msm_mux_mclk_in1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) msm_mux_i2s_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) msm_mux_dsd_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) msm_mux_qdss_cti_trig_in_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) msm_mux_rgmi_dll1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) msm_mux_pwm_led22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) msm_mux_pwm_led23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) msm_mux_qdss_cti_trig_out_a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) msm_mux_rgmi_dll2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) msm_mux_pwm_led1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) msm_mux_qdss_cti_trig_out_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) msm_mux_pwm_led2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) msm_mux_i2s_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) msm_mux_pll_bist,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) msm_mux_ext_mclk1_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) msm_mux_mclk_in2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) msm_mux_bimc_dte1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) msm_mux_i2s_3_sck_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) msm_mux_i2s_3_ws_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) msm_mux__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) "gpio21", "gpio21", "gpio22", "gpio22", "gpio23", "gpio23", "gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) "gpio32", "gpio33", "gpio34", "gpio35", "gpio36", "gpio36", "gpio36",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) "gpio36", "gpio37", "gpio37", "gpio37", "gpio38", "gpio38", "gpio38",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) "gpio39", "gpio39", "gpio40", "gpio40", "gpio41", "gpio41", "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) "gpio56", "gpio57", "gpio58", "gpio59", "gpio59", "gpio60", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) "gpio62", "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) "gpio69", "gpio70", "gpio71", "gpio72", "gpio73", "gpio74", "gpio75",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) "gpio76", "gpio77", "gpio77", "gpio78", "gpio78", "gpio78", "gpio79",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) "gpio79", "gpio79", "gpio80", "gpio81", "gpio81", "gpio82", "gpio83",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) "gpio98", "gpio99", "gpio100", "gpio101", "gpio102", "gpio103",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio108",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) "gpio108", "gpio109", "gpio109", "gpio110", "gpio111", "gpio112",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) "gpio113", "gpio114", "gpio115", "gpio116", "gpio117", "gpio118",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) "gpio119",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static const char * const hdmi_tx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static const char * const hdmi_ddc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) "gpio15", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static const char * const blsp_uart_tx_a2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) "gpio17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static const char * const blsp_spi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) "gpio17", "gpio18", "gpio19", "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) static const char * const m_voc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) "gpio17", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static const char * const qdss_cti_trig_in_a0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) "gpio17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) static const char * const blsp_uart_rx_a2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) "gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static const char * const qdss_tracectl_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) "gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) static const char * const blsp_uart2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) "gpio19", "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) static const char * const aud_cdc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) "gpio19", "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static const char * const blsp_i2c_sda_a2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static const char * const qdss_tracedata_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) "gpio19", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) "gpio31", "gpio32", "gpio36", "gpio38", "gpio39", "gpio42", "gpio43",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) "gpio82", "gpio83",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) static const char * const blsp_i2c_scl_a2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) static const char * const qdss_tracectl_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static const char * const qdss_cti_trig_in_b0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static const char * const blsp_uart1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) "gpio22", "gpio23", "gpio24", "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static const char * const blsp_spi_mosi_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) "gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static const char * const blsp_spi_miso_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) "gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static const char * const qdss_tracedata_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) "gpio23", "gpio35", "gpio40", "gpio41", "gpio44", "gpio45", "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) "gpio47", "gpio49", "gpio50", "gpio55", "gpio61", "gpio62", "gpio85",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) "gpio89", "gpio93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static const char * const blsp_i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) "gpio24", "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static const char * const blsp_spi_cs_n_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) "gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static const char * const gcc_plltest_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) "gpio24", "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static const char * const blsp_spi_clk_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static const char * const rgb_data0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) "gpio26", "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) static const char * const blsp_uart5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) "gpio26", "gpio27", "gpio28", "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static const char * const blsp_spi5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) "gpio26", "gpio27", "gpio28", "gpio29", "gpio44", "gpio45", "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static const char * const adsp_ext_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) "gpio26",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) static const char * const rgb_data1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) "gpio27", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) static const char * const prng_rosc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) "gpio27",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static const char * const rgb_data2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) "gpio28", "gpio43",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) static const char * const blsp_i2c5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) "gpio28", "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) static const char * const gcc_gp1_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) static const char * const rgb_data3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) "gpio29", "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static const char * const gcc_gp2_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) static const char * const blsp_spi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) "gpio30", "gpio31", "gpio32", "gpio33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static const char * const blsp_uart0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) "gpio30", "gpio31", "gpio32", "gpio33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) static const char * const gcc_gp3_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) "gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static const char * const blsp_i2c0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) "gpio32", "gpio33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const char * const qdss_traceclk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) "gpio34",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) static const char * const pcie_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const char * const nfc_irq_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) "gpio37",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static const char * const blsp_spi4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) "gpio37", "gpio38", "gpio117", "gpio118",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static const char * const nfc_dwl_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) "gpio38",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) static const char * const audio_ts_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) "gpio38",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static const char * const rgb_data4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) "gpio39", "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static const char * const spi_lcd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) "gpio39", "gpio40",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) static const char * const blsp_uart_tx_b2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) "gpio39",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) static const char * const gcc_gp3_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) "gpio39",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) static const char * const rgb_data5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) "gpio40", "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static const char * const blsp_uart_rx_b2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) "gpio40",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static const char * const blsp_i2c_sda_b2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) static const char * const blsp_i2c_scl_b2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static const char * const pwm_led11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) "gpio43",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) static const char * const i2s_3_data0_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) "gpio106",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) static const char * const ebi2_lcd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) "gpio106", "gpio107", "gpio108", "gpio109",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) static const char * const i2s_3_data1_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) "gpio107",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) static const char * const i2s_3_data2_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) "gpio108",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) static const char * const atest_char_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) "gpio108",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) static const char * const pwm_led3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) "gpio108",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) static const char * const i2s_3_data3_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) "gpio109",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) static const char * const pwm_led4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) "gpio109",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) static const char * const i2s_4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) "gpio110", "gpio111", "gpio111", "gpio112", "gpio112", "gpio113",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) "gpio113", "gpio114", "gpio114", "gpio115", "gpio115", "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) static const char * const ebi2_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) "gpio110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) static const char * const dsd_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) "gpio110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static const char * const pwm_led5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) "gpio110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) static const char * const pwm_led6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) "gpio111",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) static const char * const pwm_led7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) "gpio112",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static const char * const pwm_led8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) "gpio113",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) static const char * const pwm_led24_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) "gpio114",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) static const char * const spkr_dac0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static const char * const blsp_i2c4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) "gpio117", "gpio118",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) static const char * const pwm_led9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) "gpio117",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static const char * const pwm_led10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) "gpio118",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) static const char * const spdifrx_opt_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) "gpio119",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) static const char * const pwm_led12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) static const char * const pwm_led13_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) static const char * const pwm_led14_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) static const char * const wlan1_adc1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) static const char * const rgb_data_b0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) static const char * const pwm_led15_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) static const char * const blsp_spi_mosi_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) static const char * const wlan1_adc0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) static const char * const rgb_data_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) static const char * const pwm_led16_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) static const char * const blsp_spi_miso_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) static const char * const qdss_cti_trig_out_b0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) static const char * const wlan2_adc1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) static const char * const rgb_data_b2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) static const char * const pwm_led17_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) static const char * const blsp_spi_cs_n_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) static const char * const wlan2_adc0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) static const char * const rgb_data_b3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) static const char * const pwm_led18_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) static const char * const blsp_spi_clk_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) static const char * const rgb_data_b4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) static const char * const pwm_led19_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) static const char * const ext_mclk1_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) static const char * const qdss_traceclk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) static const char * const rgb_data_b5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) static const char * const pwm_led20_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) static const char * const atest_char3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) static const char * const i2s_3_sck_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) static const char * const ldo_update_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) static const char * const bimc_dte0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) "gpio52", "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static const char * const rgb_hsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) static const char * const pwm_led21_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) static const char * const i2s_3_ws_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) static const char * const dbg_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) static const char * const rgb_vsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) static const char * const i2s_3_data0_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) static const char * const ldo_en_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) static const char * const hdmi_dtest_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) static const char * const rgb_de_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) static const char * const i2s_3_data1_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) static const char * const hdmi_lbk9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) static const char * const rgb_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) static const char * const atest_char1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) static const char * const i2s_3_data2_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) static const char * const ebi_cdc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) "gpio56", "gpio58", "gpio106", "gpio107", "gpio108", "gpio111",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) static const char * const hdmi_lbk8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) static const char * const rgb_mdp_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) static const char * const atest_char0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) static const char * const i2s_3_data3_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) static const char * const hdmi_lbk7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) static const char * const rgb_data_b6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) static const char * const rgb_data_b7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) "gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) static const char * const hdmi_lbk6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) "gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) static const char * const rgmii_int_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) static const char * const cri_trng1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) static const char * const rgmii_wol_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) static const char * const cri_trng0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) static const char * const gcc_tlmm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) static const char * const rgmii_ck_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) "gpio63", "gpio69",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) static const char * const rgmii_tx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) "gpio64", "gpio65", "gpio66", "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) static const char * const hdmi_lbk5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) "gpio64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static const char * const hdmi_pixel_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) "gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) static const char * const hdmi_rcv_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) static const char * const hdmi_lbk4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) static const char * const rgmii_ctl_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) "gpio68", "gpio74",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) static const char * const ext_lpass_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) "gpio69",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) static const char * const rgmii_rx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) "gpio70", "gpio71", "gpio72", "gpio73",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) static const char * const cri_trng_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) static const char * const hdmi_lbk3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) "gpio71",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) static const char * const hdmi_lbk2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) "gpio72",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) static const char * const qdss_cti_trig_out_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) "gpio73",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) static const char * const rgmii_mdio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) "gpio75",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) static const char * const hdmi_lbk1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) "gpio75",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) static const char * const rgmii_mdc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) "gpio76",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) static const char * const hdmi_lbk0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) "gpio76",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) static const char * const ir_in_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) static const char * const wsa_en_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) static const char * const rgb_data6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) "gpio78", "gpio80",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) static const char * const rgb_data7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) "gpio79", "gpio81",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) static const char * const atest_char2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) "gpio80",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) static const char * const ebi_ch0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) "gpio81",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) static const char * const blsp_uart3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) "gpio82", "gpio83", "gpio84", "gpio85",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) static const char * const blsp_spi3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) "gpio82", "gpio83", "gpio84", "gpio85",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) static const char * const sd_write_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) "gpio82",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) static const char * const blsp_i2c3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) "gpio84", "gpio85",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) static const char * const gcc_gp1_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) static const char * const qdss_cti_trig_in_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) static const char * const gcc_gp2_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) "gpio85",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) static const char * const ext_mclk0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) "gpio86",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) static const char * const mclk_in1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) "gpio86",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) static const char * const i2s_1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) "gpio87", "gpio88", "gpio88", "gpio89", "gpio89", "gpio90", "gpio90",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) "gpio91", "gpio91", "gpio92", "gpio92", "gpio93", "gpio93", "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) "gpio94", "gpio95", "gpio95", "gpio96",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) static const char * const dsd_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) "gpio87",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) static const char * const qdss_cti_trig_in_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) "gpio92",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) static const char * const rgmi_dll1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) "gpio92",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) static const char * const pwm_led22_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) "gpio93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) static const char * const pwm_led23_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) static const char * const qdss_cti_trig_out_a0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) static const char * const rgmi_dll2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) static const char * const pwm_led1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) "gpio95",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) static const char * const qdss_cti_trig_out_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) "gpio95",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) static const char * const pwm_led2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) "gpio96",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) static const char * const i2s_2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) "gpio97", "gpio98", "gpio99", "gpio100", "gpio101", "gpio102",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) static const char * const pll_bist_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) "gpio100",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) static const char * const ext_mclk1_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) "gpio103",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) static const char * const mclk_in2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) "gpio103",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) static const char * const bimc_dte1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) "gpio103", "gpio109",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) static const char * const i2s_3_sck_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) "gpio104",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) static const char * const i2s_3_ws_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) "gpio105",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) static const struct msm_function qcs404_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) FUNCTION(hdmi_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) FUNCTION(hdmi_ddc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) FUNCTION(blsp_uart_tx_a2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) FUNCTION(blsp_spi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) FUNCTION(m_voc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) FUNCTION(qdss_cti_trig_in_a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) FUNCTION(blsp_uart_rx_a2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) FUNCTION(qdss_tracectl_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) FUNCTION(blsp_uart2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) FUNCTION(aud_cdc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) FUNCTION(blsp_i2c_sda_a2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) FUNCTION(qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) FUNCTION(blsp_i2c_scl_a2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) FUNCTION(qdss_tracectl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) FUNCTION(qdss_cti_trig_in_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) FUNCTION(blsp_uart1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) FUNCTION(blsp_spi_mosi_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) FUNCTION(blsp_spi_miso_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) FUNCTION(qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) FUNCTION(blsp_i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) FUNCTION(blsp_spi_cs_n_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) FUNCTION(gcc_plltest),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) FUNCTION(blsp_spi_clk_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) FUNCTION(rgb_data0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) FUNCTION(blsp_uart5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) FUNCTION(blsp_spi5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) FUNCTION(adsp_ext),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) FUNCTION(rgb_data1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) FUNCTION(prng_rosc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) FUNCTION(rgb_data2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) FUNCTION(blsp_i2c5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) FUNCTION(gcc_gp1_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) FUNCTION(rgb_data3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) FUNCTION(gcc_gp2_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) FUNCTION(blsp_spi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) FUNCTION(blsp_uart0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) FUNCTION(gcc_gp3_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) FUNCTION(blsp_i2c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) FUNCTION(qdss_traceclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) FUNCTION(pcie_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) FUNCTION(nfc_irq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) FUNCTION(blsp_spi4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) FUNCTION(nfc_dwl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) FUNCTION(audio_ts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) FUNCTION(rgb_data4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) FUNCTION(spi_lcd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) FUNCTION(blsp_uart_tx_b2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) FUNCTION(gcc_gp3_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) FUNCTION(rgb_data5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) FUNCTION(blsp_uart_rx_b2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) FUNCTION(blsp_i2c_sda_b2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) FUNCTION(blsp_i2c_scl_b2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) FUNCTION(pwm_led11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) FUNCTION(i2s_3_data0_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) FUNCTION(ebi2_lcd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) FUNCTION(i2s_3_data1_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) FUNCTION(i2s_3_data2_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) FUNCTION(atest_char),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) FUNCTION(pwm_led3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) FUNCTION(i2s_3_data3_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) FUNCTION(pwm_led4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) FUNCTION(i2s_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) FUNCTION(ebi2_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) FUNCTION(dsd_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) FUNCTION(pwm_led5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) FUNCTION(pwm_led6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) FUNCTION(pwm_led7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) FUNCTION(pwm_led8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) FUNCTION(pwm_led24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) FUNCTION(spkr_dac0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) FUNCTION(blsp_i2c4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) FUNCTION(pwm_led9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) FUNCTION(pwm_led10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) FUNCTION(spdifrx_opt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) FUNCTION(pwm_led12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) FUNCTION(pwm_led13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) FUNCTION(pwm_led14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) FUNCTION(wlan1_adc1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) FUNCTION(rgb_data_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) FUNCTION(pwm_led15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) FUNCTION(blsp_spi_mosi_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) FUNCTION(wlan1_adc0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) FUNCTION(rgb_data_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) FUNCTION(pwm_led16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) FUNCTION(blsp_spi_miso_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) FUNCTION(qdss_cti_trig_out_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) FUNCTION(wlan2_adc1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) FUNCTION(rgb_data_b2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) FUNCTION(pwm_led17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) FUNCTION(blsp_spi_cs_n_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) FUNCTION(wlan2_adc0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) FUNCTION(rgb_data_b3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) FUNCTION(pwm_led18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) FUNCTION(blsp_spi_clk_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) FUNCTION(rgb_data_b4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) FUNCTION(pwm_led19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) FUNCTION(ext_mclk1_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) FUNCTION(qdss_traceclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) FUNCTION(rgb_data_b5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) FUNCTION(pwm_led20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) FUNCTION(atest_char3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) FUNCTION(i2s_3_sck_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) FUNCTION(ldo_update),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) FUNCTION(bimc_dte0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) FUNCTION(rgb_hsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) FUNCTION(pwm_led21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) FUNCTION(i2s_3_ws_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) FUNCTION(dbg_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) FUNCTION(rgb_vsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) FUNCTION(i2s_3_data0_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) FUNCTION(ldo_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) FUNCTION(hdmi_dtest),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) FUNCTION(rgb_de),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) FUNCTION(i2s_3_data1_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) FUNCTION(hdmi_lbk9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) FUNCTION(rgb_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) FUNCTION(atest_char1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) FUNCTION(i2s_3_data2_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) FUNCTION(ebi_cdc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) FUNCTION(hdmi_lbk8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) FUNCTION(rgb_mdp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) FUNCTION(atest_char0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) FUNCTION(i2s_3_data3_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) FUNCTION(hdmi_lbk7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) FUNCTION(rgb_data_b6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) FUNCTION(rgb_data_b7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) FUNCTION(hdmi_lbk6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) FUNCTION(rgmii_int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) FUNCTION(cri_trng1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) FUNCTION(rgmii_wol),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) FUNCTION(cri_trng0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) FUNCTION(gcc_tlmm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) FUNCTION(rgmii_ck),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) FUNCTION(rgmii_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) FUNCTION(hdmi_lbk5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) FUNCTION(hdmi_pixel),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) FUNCTION(hdmi_rcv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) FUNCTION(hdmi_lbk4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) FUNCTION(rgmii_ctl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) FUNCTION(ext_lpass),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) FUNCTION(rgmii_rx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) FUNCTION(cri_trng),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) FUNCTION(hdmi_lbk3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) FUNCTION(hdmi_lbk2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) FUNCTION(qdss_cti_trig_out_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) FUNCTION(rgmii_mdio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) FUNCTION(hdmi_lbk1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) FUNCTION(rgmii_mdc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) FUNCTION(hdmi_lbk0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) FUNCTION(ir_in),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) FUNCTION(wsa_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) FUNCTION(rgb_data6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) FUNCTION(rgb_data7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) FUNCTION(atest_char2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) FUNCTION(ebi_ch0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) FUNCTION(blsp_uart3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) FUNCTION(blsp_spi3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) FUNCTION(sd_write),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) FUNCTION(blsp_i2c3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) FUNCTION(gcc_gp1_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) FUNCTION(qdss_cti_trig_in_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) FUNCTION(gcc_gp2_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) FUNCTION(ext_mclk0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) FUNCTION(mclk_in1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) FUNCTION(i2s_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) FUNCTION(dsd_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) FUNCTION(qdss_cti_trig_in_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) FUNCTION(rgmi_dll1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) FUNCTION(pwm_led22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) FUNCTION(pwm_led23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) FUNCTION(qdss_cti_trig_out_a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) FUNCTION(rgmi_dll2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) FUNCTION(pwm_led1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) FUNCTION(qdss_cti_trig_out_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) FUNCTION(pwm_led2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) FUNCTION(i2s_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) FUNCTION(pll_bist),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) FUNCTION(ext_mclk1_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) FUNCTION(mclk_in2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) FUNCTION(bimc_dte1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) FUNCTION(i2s_3_sck_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) FUNCTION(i2s_3_ws_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) /* Every pin is maintained as a single group, and missing or non-existing pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) * would be maintained as dummy group to synchronize pin group index with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) * pin descriptor registered with pinctrl core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) * Clients would not be able to request these dummy pin groups.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) static const struct msm_pingroup qcs404_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) [0] = PINGROUP(0, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) [1] = PINGROUP(1, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) [2] = PINGROUP(2, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) [3] = PINGROUP(3, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) [4] = PINGROUP(4, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) [5] = PINGROUP(5, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) [6] = PINGROUP(6, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) [7] = PINGROUP(7, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) [8] = PINGROUP(8, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) [9] = PINGROUP(9, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) [10] = PINGROUP(10, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) [11] = PINGROUP(11, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) [12] = PINGROUP(12, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) [13] = PINGROUP(13, SOUTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) [14] = PINGROUP(14, SOUTH, hdmi_tx, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) [15] = PINGROUP(15, SOUTH, hdmi_ddc, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) [16] = PINGROUP(16, SOUTH, hdmi_ddc, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) [17] = PINGROUP(17, NORTH, blsp_uart_tx_a2, blsp_spi2, m_voc, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) [18] = PINGROUP(18, NORTH, blsp_uart_rx_a2, blsp_spi2, _, _, _, _, _, qdss_tracectl_a, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) [19] = PINGROUP(19, NORTH, blsp_uart2, aud_cdc, blsp_i2c_sda_a2, blsp_spi2, _, qdss_tracedata_a, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) [20] = PINGROUP(20, NORTH, blsp_uart2, aud_cdc, blsp_i2c_scl_a2, blsp_spi2, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) [21] = PINGROUP(21, SOUTH, m_voc, _, _, _, _, _, _, _, qdss_cti_trig_in_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) [22] = PINGROUP(22, NORTH, blsp_uart1, blsp_spi_mosi_a1, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) [23] = PINGROUP(23, NORTH, blsp_uart1, blsp_spi_miso_a1, _, _, _, _, _, qdss_tracedata_b, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) [24] = PINGROUP(24, NORTH, blsp_uart1, blsp_i2c1, blsp_spi_cs_n_a1, gcc_plltest, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) [25] = PINGROUP(25, NORTH, blsp_uart1, blsp_i2c1, blsp_spi_clk_a1, gcc_plltest, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) [26] = PINGROUP(26, EAST, rgb_data0, blsp_uart5, blsp_spi5, adsp_ext, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) [27] = PINGROUP(27, EAST, rgb_data1, blsp_uart5, blsp_spi5, prng_rosc, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) [28] = PINGROUP(28, EAST, rgb_data2, blsp_uart5, blsp_i2c5, blsp_spi5, gcc_gp1_clk_b, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) [29] = PINGROUP(29, EAST, rgb_data3, blsp_uart5, blsp_i2c5, blsp_spi5, gcc_gp2_clk_b, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) [30] = PINGROUP(30, NORTH, blsp_spi0, blsp_uart0, gcc_gp3_clk_b, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) [31] = PINGROUP(31, NORTH, blsp_spi0, blsp_uart0, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) [32] = PINGROUP(32, NORTH, blsp_spi0, blsp_uart0, blsp_i2c0, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) [33] = PINGROUP(33, NORTH, blsp_spi0, blsp_uart0, blsp_i2c0, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) [34] = PINGROUP(34, SOUTH, _, qdss_traceclk_b, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) [35] = PINGROUP(35, SOUTH, pcie_clk, _, qdss_tracedata_b, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) [36] = PINGROUP(36, NORTH, _, _, _, _, _, _, qdss_tracedata_a, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) [37] = PINGROUP(37, NORTH, nfc_irq, blsp_spi4, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) [38] = PINGROUP(38, NORTH, nfc_dwl, blsp_spi4, audio_ts, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) [39] = PINGROUP(39, EAST, rgb_data4, spi_lcd, blsp_uart_tx_b2, gcc_gp3_clk_a, qdss_tracedata_a, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) [40] = PINGROUP(40, EAST, rgb_data5, spi_lcd, blsp_uart_rx_b2, _, qdss_tracedata_b, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) [41] = PINGROUP(41, EAST, rgb_data0, blsp_i2c_sda_b2, _, qdss_tracedata_b, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) [42] = PINGROUP(42, EAST, rgb_data1, blsp_i2c_scl_b2, _, _, _, _, _, qdss_tracedata_a, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) [43] = PINGROUP(43, EAST, rgb_data2, pwm_led11, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) [44] = PINGROUP(44, EAST, rgb_data3, pwm_led12, blsp_spi5, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) [45] = PINGROUP(45, EAST, rgb_data4, pwm_led13, blsp_spi5, qdss_tracedata_b, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) [46] = PINGROUP(46, EAST, rgb_data5, pwm_led14, blsp_spi5, qdss_tracedata_b, _, wlan1_adc1, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) [47] = PINGROUP(47, EAST, rgb_data_b0, pwm_led15, blsp_spi_mosi_b1, qdss_tracedata_b, _, wlan1_adc0, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) [48] = PINGROUP(48, EAST, rgb_data_b1, pwm_led16, blsp_spi_miso_b1, _, qdss_cti_trig_out_b0, _, wlan2_adc1, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) [49] = PINGROUP(49, EAST, rgb_data_b2, pwm_led17, blsp_spi_cs_n_b1, _, qdss_tracedata_b, _, wlan2_adc0, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) [50] = PINGROUP(50, EAST, rgb_data_b3, pwm_led18, blsp_spi_clk_b1, qdss_tracedata_b, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) [51] = PINGROUP(51, EAST, rgb_data_b4, pwm_led19, ext_mclk1_b, qdss_traceclk_a, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) [52] = PINGROUP(52, EAST, rgb_data_b5, pwm_led20, atest_char3, i2s_3_sck_b, ldo_update, bimc_dte0, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) [53] = PINGROUP(53, EAST, rgb_hsync, pwm_led21, i2s_3_ws_b, dbg_out, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) [54] = PINGROUP(54, EAST, rgb_vsync, i2s_3_data0_b, ldo_en, bimc_dte0, _, hdmi_dtest, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) [55] = PINGROUP(55, EAST, rgb_de, i2s_3_data1_b, _, qdss_tracedata_b, _, hdmi_lbk9, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) [56] = PINGROUP(56, EAST, rgb_clk, atest_char1, i2s_3_data2_b, ebi_cdc, _, hdmi_lbk8, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) [57] = PINGROUP(57, EAST, rgb_mdp, atest_char0, i2s_3_data3_b, _, hdmi_lbk7, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) [58] = PINGROUP(58, EAST, rgb_data_b6, _, ebi_cdc, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) [59] = PINGROUP(59, EAST, rgb_data_b7, _, hdmi_lbk6, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) [60] = PINGROUP(60, NORTH, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) [61] = PINGROUP(61, NORTH, rgmii_int, cri_trng1, qdss_tracedata_b, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) [62] = PINGROUP(62, NORTH, rgmii_wol, cri_trng0, qdss_tracedata_b, gcc_tlmm, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) [63] = PINGROUP(63, NORTH, rgmii_ck, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) [64] = PINGROUP(64, NORTH, rgmii_tx, _, hdmi_lbk5, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) [65] = PINGROUP(65, NORTH, rgmii_tx, _, hdmi_pixel, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) [66] = PINGROUP(66, NORTH, rgmii_tx, _, hdmi_rcv, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) [67] = PINGROUP(67, NORTH, rgmii_tx, _, hdmi_lbk4, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) [68] = PINGROUP(68, NORTH, rgmii_ctl, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) [69] = PINGROUP(69, NORTH, rgmii_ck, ext_lpass, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) [70] = PINGROUP(70, NORTH, rgmii_rx, cri_trng, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) [71] = PINGROUP(71, NORTH, rgmii_rx, _, hdmi_lbk3, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) [72] = PINGROUP(72, NORTH, rgmii_rx, _, hdmi_lbk2, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) [73] = PINGROUP(73, NORTH, rgmii_rx, _, _, _, _, qdss_cti_trig_out_b1, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) [74] = PINGROUP(74, NORTH, rgmii_ctl, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) [75] = PINGROUP(75, NORTH, rgmii_mdio, _, hdmi_lbk1, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) [76] = PINGROUP(76, NORTH, rgmii_mdc, _, _, _, _, _, hdmi_lbk0, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) [77] = PINGROUP(77, NORTH, ir_in, wsa_en, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) [78] = PINGROUP(78, EAST, rgb_data6, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) [79] = PINGROUP(79, EAST, rgb_data7, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) [80] = PINGROUP(80, EAST, rgb_data6, atest_char2, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) [81] = PINGROUP(81, EAST, rgb_data7, ebi_ch0, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) [82] = PINGROUP(82, NORTH, blsp_uart3, blsp_spi3, sd_write, _, _, _, _, _, qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) [83] = PINGROUP(83, NORTH, blsp_uart3, blsp_spi3, _, _, _, _, qdss_tracedata_a, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) [84] = PINGROUP(84, NORTH, blsp_uart3, blsp_i2c3, blsp_spi3, gcc_gp1_clk_a, qdss_cti_trig_in_b1, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) [85] = PINGROUP(85, NORTH, blsp_uart3, blsp_i2c3, blsp_spi3, gcc_gp2_clk_a, qdss_tracedata_b, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) [86] = PINGROUP(86, EAST, ext_mclk0, mclk_in1, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) [87] = PINGROUP(87, EAST, i2s_1, dsd_clk_a, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) [88] = PINGROUP(88, EAST, i2s_1, i2s_1, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) [89] = PINGROUP(89, EAST, i2s_1, i2s_1, _, _, _, _, _, _, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) [90] = PINGROUP(90, EAST, i2s_1, i2s_1, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) [91] = PINGROUP(91, EAST, i2s_1, i2s_1, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) [92] = PINGROUP(92, EAST, i2s_1, i2s_1, _, _, _, _, _, qdss_cti_trig_in_a1, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) [93] = PINGROUP(93, EAST, i2s_1, pwm_led22, i2s_1, _, _, _, _, _, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) [94] = PINGROUP(94, EAST, i2s_1, pwm_led23, i2s_1, _, qdss_cti_trig_out_a0, _, rgmi_dll2, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) [95] = PINGROUP(95, EAST, i2s_1, pwm_led1, i2s_1, _, qdss_cti_trig_out_a1, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) [96] = PINGROUP(96, EAST, i2s_1, pwm_led2, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) [97] = PINGROUP(97, EAST, i2s_2, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) [98] = PINGROUP(98, EAST, i2s_2, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) [99] = PINGROUP(99, EAST, i2s_2, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) [100] = PINGROUP(100, EAST, i2s_2, pll_bist, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) [101] = PINGROUP(101, EAST, i2s_2, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) [102] = PINGROUP(102, EAST, i2s_2, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) [103] = PINGROUP(103, EAST, ext_mclk1_a, mclk_in2, bimc_dte1, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) [104] = PINGROUP(104, EAST, i2s_3_sck_a, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) [105] = PINGROUP(105, EAST, i2s_3_ws_a, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) [106] = PINGROUP(106, EAST, i2s_3_data0_a, ebi2_lcd, _, _, ebi_cdc, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) [107] = PINGROUP(107, EAST, i2s_3_data1_a, ebi2_lcd, _, _, ebi_cdc, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) [108] = PINGROUP(108, EAST, i2s_3_data2_a, ebi2_lcd, atest_char, pwm_led3, ebi_cdc, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) [109] = PINGROUP(109, EAST, i2s_3_data3_a, ebi2_lcd, pwm_led4, bimc_dte1, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) [110] = PINGROUP(110, EAST, i2s_4, ebi2_a, dsd_clk_b, pwm_led5, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) [111] = PINGROUP(111, EAST, i2s_4, i2s_4, pwm_led6, ebi_cdc, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) [112] = PINGROUP(112, EAST, i2s_4, i2s_4, pwm_led7, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) [113] = PINGROUP(113, EAST, i2s_4, i2s_4, pwm_led8, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) [114] = PINGROUP(114, EAST, i2s_4, i2s_4, pwm_led24, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) [115] = PINGROUP(115, EAST, i2s_4, i2s_4, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) [116] = PINGROUP(116, EAST, i2s_4, spkr_dac0, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) [117] = PINGROUP(117, NORTH, blsp_i2c4, blsp_spi4, pwm_led9, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) [118] = PINGROUP(118, NORTH, blsp_i2c4, blsp_spi4, pwm_led10, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) [119] = PINGROUP(119, EAST, spdifrx_opt, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) [120] = SDC_QDSD_PINGROUP(sdc1_rclk, 0xc2000, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) [121] = SDC_QDSD_PINGROUP(sdc1_clk, 0xc2000, 13, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) [122] = SDC_QDSD_PINGROUP(sdc1_cmd, 0xc2000, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) [123] = SDC_QDSD_PINGROUP(sdc1_data, 0xc2000, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) [124] = SDC_QDSD_PINGROUP(sdc2_clk, 0xc3000, 14, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) [125] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xc3000, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) [126] = SDC_QDSD_PINGROUP(sdc2_data, 0xc3000, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) static const struct msm_pinctrl_soc_data qcs404_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) .pins = qcs404_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) .npins = ARRAY_SIZE(qcs404_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) .functions = qcs404_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) .nfunctions = ARRAY_SIZE(qcs404_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) .groups = qcs404_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) .ngroups = ARRAY_SIZE(qcs404_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) .ngpios = 120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) .tiles = qcs404_tiles,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) .ntiles = ARRAY_SIZE(qcs404_tiles),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) static int qcs404_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) return msm_pinctrl_probe(pdev, &qcs404_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) static const struct of_device_id qcs404_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) { .compatible = "qcom,qcs404-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) static struct platform_driver qcs404_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) .name = "qcs404-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) .of_match_table = qcs404_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) .probe = qcs404_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) .remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) static int __init qcs404_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) return platform_driver_register(&qcs404_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) arch_initcall(qcs404_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) static void __exit qcs404_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) platform_driver_unregister(&qcs404_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) module_exit(qcs404_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) MODULE_DESCRIPTION("Qualcomm QCS404 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) MODULE_DEVICE_TABLE(of, qcs404_pinctrl_of_match);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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