^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) [msm_mux_##fname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define REG_BASE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define REG_SIZE 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .name = "gpio" #id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .pins = gpio##id##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .npins = (unsigned)ARRAY_SIZE(gpio##id##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .funcs = (int[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) msm_mux_gpio, /* gpio mode */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) msm_mux_##f1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) msm_mux_##f2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) msm_mux_##f3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) msm_mux_##f4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) msm_mux_##f5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) msm_mux_##f6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) msm_mux_##f7, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) msm_mux_##f8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) msm_mux_##f9 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .nfuncs = 10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .ctl_reg = REG_BASE + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .mux_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .pull_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .drv_bit = 6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .oe_bit = 9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .in_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .out_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .intr_enable_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .intr_status_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .intr_target_bit = 5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .intr_target_kpss_val = 3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .intr_raw_status_bit = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .intr_polarity_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .intr_detection_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .intr_detection_width = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .name = #pg_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .pins = pg_name##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .npins = (unsigned)ARRAY_SIZE(pg_name##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .ctl_reg = ctl, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .io_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .intr_cfg_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .intr_status_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .intr_target_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .mux_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .pull_bit = pull, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .drv_bit = drv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .oe_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .in_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .out_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .intr_enable_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .intr_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .intr_target_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .intr_raw_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .intr_polarity_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .intr_detection_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .intr_detection_width = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static const struct pinctrl_pin_desc msm8996_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) PINCTRL_PIN(70, "GPIO_70"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) PINCTRL_PIN(71, "GPIO_71"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) PINCTRL_PIN(72, "GPIO_72"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) PINCTRL_PIN(73, "GPIO_73"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) PINCTRL_PIN(74, "GPIO_74"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) PINCTRL_PIN(75, "GPIO_75"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PINCTRL_PIN(76, "GPIO_76"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) PINCTRL_PIN(77, "GPIO_77"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) PINCTRL_PIN(78, "GPIO_78"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PINCTRL_PIN(79, "GPIO_79"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PINCTRL_PIN(80, "GPIO_80"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) PINCTRL_PIN(81, "GPIO_81"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) PINCTRL_PIN(82, "GPIO_82"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) PINCTRL_PIN(83, "GPIO_83"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) PINCTRL_PIN(84, "GPIO_84"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) PINCTRL_PIN(85, "GPIO_85"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PINCTRL_PIN(86, "GPIO_86"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) PINCTRL_PIN(87, "GPIO_87"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PINCTRL_PIN(88, "GPIO_88"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PINCTRL_PIN(89, "GPIO_89"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) PINCTRL_PIN(90, "GPIO_90"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) PINCTRL_PIN(91, "GPIO_91"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PINCTRL_PIN(92, "GPIO_92"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PINCTRL_PIN(93, "GPIO_93"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PINCTRL_PIN(94, "GPIO_94"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PINCTRL_PIN(95, "GPIO_95"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PINCTRL_PIN(96, "GPIO_96"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PINCTRL_PIN(97, "GPIO_97"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PINCTRL_PIN(98, "GPIO_98"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PINCTRL_PIN(99, "GPIO_99"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINCTRL_PIN(100, "GPIO_100"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PINCTRL_PIN(101, "GPIO_101"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) PINCTRL_PIN(102, "GPIO_102"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PINCTRL_PIN(103, "GPIO_103"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PINCTRL_PIN(104, "GPIO_104"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PINCTRL_PIN(105, "GPIO_105"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PINCTRL_PIN(106, "GPIO_106"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PINCTRL_PIN(107, "GPIO_107"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) PINCTRL_PIN(108, "GPIO_108"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PINCTRL_PIN(109, "GPIO_109"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PINCTRL_PIN(110, "GPIO_110"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PINCTRL_PIN(111, "GPIO_111"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PINCTRL_PIN(112, "GPIO_112"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PINCTRL_PIN(113, "GPIO_113"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PINCTRL_PIN(114, "GPIO_114"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PINCTRL_PIN(115, "GPIO_115"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PINCTRL_PIN(116, "GPIO_116"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PINCTRL_PIN(117, "GPIO_117"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINCTRL_PIN(118, "GPIO_118"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) PINCTRL_PIN(119, "GPIO_119"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PINCTRL_PIN(120, "GPIO_120"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PINCTRL_PIN(121, "GPIO_121"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) PINCTRL_PIN(122, "GPIO_122"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PINCTRL_PIN(123, "GPIO_123"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PINCTRL_PIN(124, "GPIO_124"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PINCTRL_PIN(125, "GPIO_125"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PINCTRL_PIN(126, "GPIO_126"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) PINCTRL_PIN(127, "GPIO_127"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PINCTRL_PIN(128, "GPIO_128"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) PINCTRL_PIN(129, "GPIO_129"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PINCTRL_PIN(130, "GPIO_130"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PINCTRL_PIN(131, "GPIO_131"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PINCTRL_PIN(132, "GPIO_132"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PINCTRL_PIN(133, "GPIO_133"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) PINCTRL_PIN(134, "GPIO_134"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PINCTRL_PIN(135, "GPIO_135"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) PINCTRL_PIN(136, "GPIO_136"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PINCTRL_PIN(137, "GPIO_137"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) PINCTRL_PIN(138, "GPIO_138"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) PINCTRL_PIN(139, "GPIO_139"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) PINCTRL_PIN(140, "GPIO_140"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) PINCTRL_PIN(141, "GPIO_141"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) PINCTRL_PIN(142, "GPIO_142"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) PINCTRL_PIN(143, "GPIO_143"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) PINCTRL_PIN(144, "GPIO_144"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) PINCTRL_PIN(145, "GPIO_145"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) PINCTRL_PIN(146, "GPIO_146"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) PINCTRL_PIN(147, "GPIO_147"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) PINCTRL_PIN(148, "GPIO_148"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) PINCTRL_PIN(149, "GPIO_149"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) PINCTRL_PIN(150, "SDC1_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) PINCTRL_PIN(151, "SDC1_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) PINCTRL_PIN(152, "SDC1_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) PINCTRL_PIN(153, "SDC2_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) PINCTRL_PIN(154, "SDC2_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) PINCTRL_PIN(155, "SDC2_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) PINCTRL_PIN(156, "SDC1_RCLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define DECLARE_MSM_GPIO_PINS(pin) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) DECLARE_MSM_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) DECLARE_MSM_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) DECLARE_MSM_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) DECLARE_MSM_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) DECLARE_MSM_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) DECLARE_MSM_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) DECLARE_MSM_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) DECLARE_MSM_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) DECLARE_MSM_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) DECLARE_MSM_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DECLARE_MSM_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) DECLARE_MSM_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) DECLARE_MSM_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) DECLARE_MSM_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) DECLARE_MSM_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) DECLARE_MSM_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) DECLARE_MSM_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) DECLARE_MSM_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) DECLARE_MSM_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) DECLARE_MSM_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) DECLARE_MSM_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) DECLARE_MSM_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) DECLARE_MSM_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) DECLARE_MSM_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) DECLARE_MSM_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) DECLARE_MSM_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) DECLARE_MSM_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) DECLARE_MSM_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) DECLARE_MSM_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) DECLARE_MSM_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) DECLARE_MSM_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) DECLARE_MSM_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) DECLARE_MSM_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) DECLARE_MSM_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) DECLARE_MSM_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) DECLARE_MSM_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) DECLARE_MSM_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) DECLARE_MSM_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) DECLARE_MSM_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) DECLARE_MSM_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) DECLARE_MSM_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) DECLARE_MSM_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) DECLARE_MSM_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) DECLARE_MSM_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) DECLARE_MSM_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) DECLARE_MSM_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) DECLARE_MSM_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) DECLARE_MSM_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) DECLARE_MSM_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) DECLARE_MSM_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) DECLARE_MSM_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) DECLARE_MSM_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) DECLARE_MSM_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) DECLARE_MSM_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) DECLARE_MSM_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) DECLARE_MSM_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) DECLARE_MSM_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) DECLARE_MSM_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) DECLARE_MSM_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) DECLARE_MSM_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) DECLARE_MSM_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) DECLARE_MSM_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) DECLARE_MSM_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) DECLARE_MSM_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) DECLARE_MSM_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) DECLARE_MSM_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) DECLARE_MSM_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) DECLARE_MSM_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) DECLARE_MSM_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) DECLARE_MSM_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) DECLARE_MSM_GPIO_PINS(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) DECLARE_MSM_GPIO_PINS(71);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) DECLARE_MSM_GPIO_PINS(72);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) DECLARE_MSM_GPIO_PINS(73);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) DECLARE_MSM_GPIO_PINS(74);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) DECLARE_MSM_GPIO_PINS(75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) DECLARE_MSM_GPIO_PINS(76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) DECLARE_MSM_GPIO_PINS(77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) DECLARE_MSM_GPIO_PINS(78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) DECLARE_MSM_GPIO_PINS(79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) DECLARE_MSM_GPIO_PINS(80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) DECLARE_MSM_GPIO_PINS(81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) DECLARE_MSM_GPIO_PINS(82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) DECLARE_MSM_GPIO_PINS(83);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) DECLARE_MSM_GPIO_PINS(84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) DECLARE_MSM_GPIO_PINS(85);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) DECLARE_MSM_GPIO_PINS(86);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) DECLARE_MSM_GPIO_PINS(87);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) DECLARE_MSM_GPIO_PINS(88);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) DECLARE_MSM_GPIO_PINS(89);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) DECLARE_MSM_GPIO_PINS(90);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) DECLARE_MSM_GPIO_PINS(91);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) DECLARE_MSM_GPIO_PINS(92);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) DECLARE_MSM_GPIO_PINS(93);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) DECLARE_MSM_GPIO_PINS(94);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) DECLARE_MSM_GPIO_PINS(95);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) DECLARE_MSM_GPIO_PINS(96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) DECLARE_MSM_GPIO_PINS(97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) DECLARE_MSM_GPIO_PINS(98);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) DECLARE_MSM_GPIO_PINS(99);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) DECLARE_MSM_GPIO_PINS(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) DECLARE_MSM_GPIO_PINS(101);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) DECLARE_MSM_GPIO_PINS(102);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) DECLARE_MSM_GPIO_PINS(103);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) DECLARE_MSM_GPIO_PINS(104);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) DECLARE_MSM_GPIO_PINS(105);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) DECLARE_MSM_GPIO_PINS(106);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) DECLARE_MSM_GPIO_PINS(107);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) DECLARE_MSM_GPIO_PINS(108);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) DECLARE_MSM_GPIO_PINS(109);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) DECLARE_MSM_GPIO_PINS(110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) DECLARE_MSM_GPIO_PINS(111);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) DECLARE_MSM_GPIO_PINS(112);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) DECLARE_MSM_GPIO_PINS(113);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) DECLARE_MSM_GPIO_PINS(114);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) DECLARE_MSM_GPIO_PINS(115);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) DECLARE_MSM_GPIO_PINS(116);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) DECLARE_MSM_GPIO_PINS(117);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) DECLARE_MSM_GPIO_PINS(118);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) DECLARE_MSM_GPIO_PINS(119);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) DECLARE_MSM_GPIO_PINS(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) DECLARE_MSM_GPIO_PINS(121);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) DECLARE_MSM_GPIO_PINS(122);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) DECLARE_MSM_GPIO_PINS(123);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) DECLARE_MSM_GPIO_PINS(124);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) DECLARE_MSM_GPIO_PINS(125);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) DECLARE_MSM_GPIO_PINS(126);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) DECLARE_MSM_GPIO_PINS(127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) DECLARE_MSM_GPIO_PINS(128);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) DECLARE_MSM_GPIO_PINS(129);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) DECLARE_MSM_GPIO_PINS(130);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) DECLARE_MSM_GPIO_PINS(131);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) DECLARE_MSM_GPIO_PINS(132);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) DECLARE_MSM_GPIO_PINS(133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) DECLARE_MSM_GPIO_PINS(134);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) DECLARE_MSM_GPIO_PINS(135);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) DECLARE_MSM_GPIO_PINS(136);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) DECLARE_MSM_GPIO_PINS(137);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) DECLARE_MSM_GPIO_PINS(138);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) DECLARE_MSM_GPIO_PINS(139);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) DECLARE_MSM_GPIO_PINS(140);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) DECLARE_MSM_GPIO_PINS(141);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) DECLARE_MSM_GPIO_PINS(142);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) DECLARE_MSM_GPIO_PINS(143);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) DECLARE_MSM_GPIO_PINS(144);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) DECLARE_MSM_GPIO_PINS(145);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) DECLARE_MSM_GPIO_PINS(146);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) DECLARE_MSM_GPIO_PINS(147);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) DECLARE_MSM_GPIO_PINS(148);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) DECLARE_MSM_GPIO_PINS(149);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static const unsigned int sdc1_clk_pins[] = { 150 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static const unsigned int sdc1_cmd_pins[] = { 151 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static const unsigned int sdc1_data_pins[] = { 152 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static const unsigned int sdc2_clk_pins[] = { 153 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static const unsigned int sdc2_cmd_pins[] = { 154 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static const unsigned int sdc2_data_pins[] = { 155 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static const unsigned int sdc1_rclk_pins[] = { 156 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) enum msm8996_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) msm_mux_adsp_ext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) msm_mux_atest_bbrx0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) msm_mux_atest_bbrx1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) msm_mux_atest_char,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) msm_mux_atest_char0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) msm_mux_atest_char1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) msm_mux_atest_char2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) msm_mux_atest_char3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) msm_mux_atest_gpsadc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) msm_mux_atest_gpsadc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) msm_mux_atest_tsens,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) msm_mux_atest_tsens2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) msm_mux_atest_usb1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) msm_mux_atest_usb10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) msm_mux_atest_usb11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) msm_mux_atest_usb12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) msm_mux_atest_usb13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) msm_mux_atest_usb2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) msm_mux_atest_usb20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) msm_mux_atest_usb21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) msm_mux_atest_usb22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) msm_mux_atest_usb23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) msm_mux_audio_ref,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) msm_mux_bimc_dte0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) msm_mux_bimc_dte1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) msm_mux_blsp10_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) msm_mux_blsp11_i2c_scl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) msm_mux_blsp11_i2c_sda_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) msm_mux_blsp11_uart_rx_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) msm_mux_blsp11_uart_tx_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) msm_mux_blsp1_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) msm_mux_blsp2_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) msm_mux_blsp_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) msm_mux_blsp_i2c10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) msm_mux_blsp_i2c11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) msm_mux_blsp_i2c12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) msm_mux_blsp_i2c2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) msm_mux_blsp_i2c3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) msm_mux_blsp_i2c4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) msm_mux_blsp_i2c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) msm_mux_blsp_i2c6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) msm_mux_blsp_i2c7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) msm_mux_blsp_i2c8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) msm_mux_blsp_i2c9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) msm_mux_blsp_spi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) msm_mux_blsp_spi10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) msm_mux_blsp_spi11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) msm_mux_blsp_spi12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) msm_mux_blsp_spi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) msm_mux_blsp_spi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) msm_mux_blsp_spi4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) msm_mux_blsp_spi5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) msm_mux_blsp_spi6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) msm_mux_blsp_spi7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) msm_mux_blsp_spi8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) msm_mux_blsp_spi9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) msm_mux_blsp_uart1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) msm_mux_blsp_uart10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) msm_mux_blsp_uart11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) msm_mux_blsp_uart12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) msm_mux_blsp_uart2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) msm_mux_blsp_uart3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) msm_mux_blsp_uart4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) msm_mux_blsp_uart5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) msm_mux_blsp_uart6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) msm_mux_blsp_uart7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) msm_mux_blsp_uart8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) msm_mux_blsp_uart9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) msm_mux_blsp_uim1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) msm_mux_blsp_uim10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) msm_mux_blsp_uim11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) msm_mux_blsp_uim12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) msm_mux_blsp_uim2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) msm_mux_blsp_uim3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) msm_mux_blsp_uim4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) msm_mux_blsp_uim5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) msm_mux_blsp_uim6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) msm_mux_blsp_uim7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) msm_mux_blsp_uim8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) msm_mux_blsp_uim9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) msm_mux_btfm_slimbus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) msm_mux_cam_mclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) msm_mux_cci_async,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) msm_mux_cci_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) msm_mux_cci_timer0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) msm_mux_cci_timer1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) msm_mux_cci_timer2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) msm_mux_cci_timer3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) msm_mux_cci_timer4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) msm_mux_cri_trng,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) msm_mux_cri_trng0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) msm_mux_cri_trng1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) msm_mux_dac_calib0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) msm_mux_dac_calib1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) msm_mux_dac_calib10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) msm_mux_dac_calib11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) msm_mux_dac_calib12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) msm_mux_dac_calib13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) msm_mux_dac_calib14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) msm_mux_dac_calib15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) msm_mux_dac_calib16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) msm_mux_dac_calib17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) msm_mux_dac_calib18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) msm_mux_dac_calib19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) msm_mux_dac_calib2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) msm_mux_dac_calib20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) msm_mux_dac_calib21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) msm_mux_dac_calib22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) msm_mux_dac_calib23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) msm_mux_dac_calib24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) msm_mux_dac_calib25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) msm_mux_dac_calib26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) msm_mux_dac_calib3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) msm_mux_dac_calib4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) msm_mux_dac_calib5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) msm_mux_dac_calib6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) msm_mux_dac_calib7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) msm_mux_dac_calib8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) msm_mux_dac_calib9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) msm_mux_dac_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) msm_mux_dbg_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) msm_mux_ddr_bist,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) msm_mux_edp_hot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) msm_mux_edp_lcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) msm_mux_gcc_gp1_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) msm_mux_gcc_gp1_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) msm_mux_gcc_gp2_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) msm_mux_gcc_gp2_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) msm_mux_gcc_gp3_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) msm_mux_gcc_gp3_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) msm_mux_gsm_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) msm_mux_hdmi_cec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) msm_mux_hdmi_ddc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) msm_mux_hdmi_hot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) msm_mux_hdmi_rcv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) msm_mux_isense_dbg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) msm_mux_ldo_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) msm_mux_ldo_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) msm_mux_lpass_slimbus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) msm_mux_m_voc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) msm_mux_mdp_vsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) msm_mux_mdp_vsync_p_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) msm_mux_mdp_vsync_s_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) msm_mux_modem_tsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) msm_mux_mss_lte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) msm_mux_nav_dr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) msm_mux_nav_pps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) msm_mux_pa_indicator,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) msm_mux_pci_e0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) msm_mux_pci_e1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) msm_mux_pci_e2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) msm_mux_pll_bypassnl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) msm_mux_pll_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) msm_mux_pri_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) msm_mux_prng_rosc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) msm_mux_pwr_crypto,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) msm_mux_pwr_modem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) msm_mux_pwr_nav,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) msm_mux_qdss_cti,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) msm_mux_qdss_cti_trig_in_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) msm_mux_qdss_cti_trig_in_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) msm_mux_qdss_cti_trig_out_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) msm_mux_qdss_cti_trig_out_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) msm_mux_qdss_stm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) msm_mux_qdss_stm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) msm_mux_qdss_stm10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) msm_mux_qdss_stm11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) msm_mux_qdss_stm12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) msm_mux_qdss_stm13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) msm_mux_qdss_stm14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) msm_mux_qdss_stm15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) msm_mux_qdss_stm16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) msm_mux_qdss_stm17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) msm_mux_qdss_stm18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) msm_mux_qdss_stm19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) msm_mux_qdss_stm2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) msm_mux_qdss_stm20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) msm_mux_qdss_stm21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) msm_mux_qdss_stm22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) msm_mux_qdss_stm23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) msm_mux_qdss_stm24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) msm_mux_qdss_stm25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) msm_mux_qdss_stm26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) msm_mux_qdss_stm27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) msm_mux_qdss_stm28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) msm_mux_qdss_stm29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) msm_mux_qdss_stm3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) msm_mux_qdss_stm30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) msm_mux_qdss_stm31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) msm_mux_qdss_stm4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) msm_mux_qdss_stm5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) msm_mux_qdss_stm6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) msm_mux_qdss_stm7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) msm_mux_qdss_stm8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) msm_mux_qdss_stm9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) msm_mux_qdss_traceclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) msm_mux_qdss_traceclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) msm_mux_qdss_tracectl_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) msm_mux_qdss_tracectl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) msm_mux_qdss_tracedata_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) msm_mux_qdss_tracedata_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) msm_mux_qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) msm_mux_qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) msm_mux_qspi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) msm_mux_qspi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) msm_mux_qspi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) msm_mux_qspi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) msm_mux_qspi_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) msm_mux_qspi_cs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) msm_mux_qua_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) msm_mux_sd_card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) msm_mux_sd_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) msm_mux_sdc40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) msm_mux_sdc41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) msm_mux_sdc42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) msm_mux_sdc43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) msm_mux_sdc4_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) msm_mux_sdc4_cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) msm_mux_sec_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) msm_mux_spkr_i2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) msm_mux_ssbi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) msm_mux_ssbi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) msm_mux_ssc_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) msm_mux_ter_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) msm_mux_tsense_pwm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) msm_mux_tsense_pwm2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) msm_mux_tsif1_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) msm_mux_tsif1_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) msm_mux_tsif1_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) msm_mux_tsif1_error,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) msm_mux_tsif1_sync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) msm_mux_tsif2_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) msm_mux_tsif2_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) msm_mux_tsif2_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) msm_mux_tsif2_error,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) msm_mux_tsif2_sync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) msm_mux_uim1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) msm_mux_uim2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) msm_mux_uim3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) msm_mux_uim4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) msm_mux_uim_batt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) msm_mux_vfr_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) msm_mux_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) msm_mux_NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) "gpio147", "gpio148", "gpio149"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static const char * const blsp_uart1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) "gpio0", "gpio1", "gpio2", "gpio3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) static const char * const blsp_spi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) "gpio0", "gpio1", "gpio2", "gpio3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) static const char * const blsp_i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) "gpio2", "gpio3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) static const char * const blsp_uim1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) "gpio0", "gpio1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) static const char * const atest_tsens_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) "gpio3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) static const char * const bimc_dte1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) "gpio3", "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) static const char * const blsp_spi8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) static const char * const blsp_uart8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) static const char * const blsp_uim8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) "gpio4", "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static const char * const qdss_cti_trig_out_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) "gpio4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) static const char * const dac_calib0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) "gpio4", "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) static const char * const bimc_dte0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) "gpio4", "gpio6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static const char * const qdss_cti_trig_in_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) static const char * const dac_calib1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) "gpio5", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) static const char * const dac_calib2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) "gpio6", "gpio43",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) static const char * const atest_tsens2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) static const char * const blsp_spi10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) "gpio8", "gpio9", "gpio10", "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) static const char * const blsp_uart10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) "gpio8", "gpio9", "gpio10", "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) static const char * const blsp_uim10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) "gpio8", "gpio9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) static const char * const atest_bbrx1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) "gpio8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) static const char * const atest_usb12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) "gpio9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static const char * const mdp_vsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) "gpio10", "gpio11", "gpio12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) static const char * const edp_lcd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) "gpio10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) static const char * const blsp_i2c10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) "gpio10", "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) static const char * const atest_usb11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) "gpio10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static const char * const atest_gpsadc0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) static const char * const edp_hot_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) static const char * const atest_usb10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) static const char * const m_voc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) "gpio12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) static const char * const dac_gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) "gpio12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) static const char * const atest_char_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) "gpio12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) static const char * const cam_mclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) "gpio13", "gpio14", "gpio15", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) static const char * const pll_bypassnl_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) "gpio13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) static const char * const qdss_stm7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) "gpio13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) static const char * const blsp_i2c8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) static const char * const atest_usb1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) static const char * const atest_usb13_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) "gpio8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) static const char * const atest_bbrx0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) "gpio9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static const char * const atest_gpsadc1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) "gpio10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) static const char * const qdss_tracedata_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) "gpio21", "gpio22", "gpio23", "gpio26", "gpio29", "gpio57", "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) "gpio92", "gpio93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) static const char * const pll_reset_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) static const char * const qdss_stm6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static const char * const qdss_stm5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) "gpio15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) static const char * const qdss_stm4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) static const char * const atest_usb2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) static const char * const dac_calib3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) "gpio17", "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) static const char * const cci_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) "gpio17", "gpio18", "gpio19", "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) static const char * const qdss_stm3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) "gpio17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static const char * const atest_usb23_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) "gpio17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static const char * const atest_char3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) "gpio17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static const char * const dac_calib4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) "gpio18", "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) static const char * const qdss_stm2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) "gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static const char * const atest_usb22_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) "gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) static const char * const atest_char2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) "gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static const char * const dac_calib5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) "gpio19", "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) static const char * const qdss_stm1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static const char * const atest_usb21_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) static const char * const atest_char1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static const char * const dac_calib6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) "gpio20", "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) static const char * const dbg_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) static const char * const qdss_stm0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) static const char * const atest_usb20_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) static const char * const atest_char0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) static const char * const dac_calib7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) "gpio21", "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) static const char * const cci_timer0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) static const char * const qdss_stm13_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) static const char * const dac_calib8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) "gpio22", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) static const char * const cci_timer1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) "gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static const char * const qdss_stm12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) "gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) static const char * const dac_calib9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) "gpio23", "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) static const char * const cci_timer2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) "gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) static const char * const qdss_stm11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) "gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) static const char * const dac_calib10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) "gpio24", "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) static const char * const cci_timer3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) "gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) static const char * const cci_async_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) "gpio24", "gpio25", "gpio26",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) static const char * const blsp1_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) "gpio24", "gpio27", "gpio28", "gpio90",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) static const char * const qdss_stm10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) "gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) static const char * const qdss_cti_trig_in_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) "gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) static const char * const dac_calib11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) "gpio25", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static const char * const cci_timer4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) static const char * const blsp_spi6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) static const char * const blsp_uart6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) static const char * const blsp_uim6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) "gpio25", "gpio26",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) static const char * const blsp2_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) "gpio25", "gpio29", "gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) static const char * const qdss_stm9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) static const char * const qdss_cti_trig_out_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) static const char * const dac_calib12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) "gpio26", "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) static const char * const qdss_stm8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) "gpio26",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) static const char * const dac_calib13_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) "gpio27", "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) static const char * const blsp_i2c6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) static const char * const qdss_tracectl_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) "gpio27",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) static const char * const dac_calib14_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) "gpio28", "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) static const char * const qdss_traceclk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) static const char * const dac_calib15_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) "gpio29", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) static const char * const dac_calib16_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) "gpio30", "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) static const char * const hdmi_rcv_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) "gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) static const char * const dac_calib17_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) "gpio31", "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) static const char * const pwr_modem_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) "gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) static const char * const hdmi_cec_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) "gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) static const char * const pwr_nav_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) "gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) static const char * const dac_calib18_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) "gpio32", "gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) static const char * const hdmi_ddc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) "gpio32", "gpio33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) static const char * const pwr_crypto_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) "gpio33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) static const char * const dac_calib19_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) "gpio33", "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) static const char * const dac_calib20_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) "gpio34", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) static const char * const hdmi_hot_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) "gpio34",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) static const char * const dac_calib21_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) "gpio35", "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) static const char * const pci_e0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) "gpio35", "gpio36",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) static const char * const dac_calib22_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) "gpio36", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) static const char * const dac_calib23_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) "gpio37", "gpio64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) static const char * const blsp_i2c2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) "gpio43", "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) static const char * const blsp_spi3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) "gpio45", "gpio46", "gpio47", "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) static const char * const blsp_uart3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) "gpio45", "gpio46", "gpio47", "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) static const char * const blsp_uim3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) "gpio45", "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) static const char * const blsp_i2c3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) "gpio47", "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) static const char * const dac_calib24_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) "gpio38", "gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) static const char * const dac_calib25_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) "gpio39", "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) static const char * const tsif1_sync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) "gpio39",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) static const char * const sd_write_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) "gpio40",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) static const char * const tsif1_error_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) "gpio40",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) static const char * const blsp_spi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) "gpio41", "gpio42", "gpio43", "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) static const char * const blsp_uart2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) "gpio41", "gpio42", "gpio43", "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) static const char * const blsp_uim2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) static const char * const qdss_cti_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) "gpio41", "gpio42", "gpio100", "gpio101",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) static const char * const uim3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) "gpio49", "gpio50", "gpio51", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) static const char * const blsp_spi9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) "gpio49", "gpio50", "gpio51", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) static const char * const blsp_uart9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) "gpio49", "gpio50", "gpio51", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) static const char * const blsp_uim9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) "gpio49", "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) static const char * const blsp10_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) "gpio49", "gpio50", "gpio51", "gpio52", "gpio88",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) static const char * const blsp_i2c9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) "gpio51", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) static const char * const blsp_spi7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) static const char * const blsp_uart7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) static const char * const blsp_uim7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) "gpio53", "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) static const char * const qdss_tracedata_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) "gpio53", "gpio54", "gpio63", "gpio64", "gpio65", "gpio66", "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) "gpio74", "gpio75", "gpio76", "gpio77", "gpio85", "gpio86", "gpio87",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) "gpio89", "gpio90",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) static const char * const blsp_i2c7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) static const char * const qua_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) static const char * const gcc_gp1_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) static const char * const uim4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) "gpio58", "gpio59", "gpio60", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) static const char * const blsp_spi11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) "gpio58", "gpio59", "gpio60", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) static const char * const blsp_uart11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) "gpio58", "gpio59", "gpio60", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) static const char * const blsp_uim11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) "gpio58", "gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) static const char * const gcc_gp2_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) static const char * const gcc_gp3_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) "gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) static const char * const blsp_i2c11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) "gpio60", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static const char * const cri_trng0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) static const char * const cri_trng1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) static const char * const cri_trng_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) static const char * const qdss_stm18_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) static const char * const pri_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) static const char * const qdss_stm17_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) "gpio64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) static const char * const blsp_spi4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) "gpio65", "gpio66", "gpio67", "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) static const char * const blsp_uart4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) "gpio65", "gpio66", "gpio67", "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) static const char * const blsp_uim4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) "gpio65", "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) static const char * const qdss_stm16_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) "gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) static const char * const qdss_stm15_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) static const char * const dac_calib26_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) static const char * const blsp_i2c4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) "gpio67", "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) static const char * const qdss_stm14_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) static const char * const spkr_i2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) "gpio69", "gpio70", "gpio71", "gpio72",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) static const char * const audio_ref_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) "gpio69",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) static const char * const lpass_slimbus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) "gpio70", "gpio71", "gpio72",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static const char * const isense_dbg_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) static const char * const tsense_pwm1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) "gpio71",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) static const char * const tsense_pwm2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) "gpio71",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) static const char * const btfm_slimbus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) "gpio73", "gpio74",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) static const char * const ter_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) "gpio74", "gpio75", "gpio76", "gpio77", "gpio78",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) static const char * const qdss_stm22_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) "gpio74",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) static const char * const qdss_stm21_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) "gpio75",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) static const char * const qdss_stm20_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) "gpio76",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) static const char * const qdss_stm19_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) static const char * const ssc_irq_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) "gpio78", "gpio79", "gpio80", "gpio117", "gpio118", "gpio119",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) "gpio120", "gpio121", "gpio122", "gpio123", "gpio124", "gpio125",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) static const char * const gcc_gp1_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) "gpio78",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) static const char * const sec_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) "gpio79", "gpio80", "gpio81", "gpio82", "gpio83",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) static const char * const blsp_spi5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) "gpio81", "gpio82", "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) static const char * const blsp_uart5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) "gpio81", "gpio82", "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) static const char * const blsp_uim5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) "gpio81", "gpio82",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) static const char * const gcc_gp2_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) "gpio81",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) static const char * const gcc_gp3_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) "gpio82",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) static const char * const blsp_i2c5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) static const char * const blsp_spi12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) "gpio85", "gpio86", "gpio87", "gpio88",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) static const char * const blsp_uart12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) "gpio85", "gpio86", "gpio87", "gpio88",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) static const char * const blsp_uim12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) "gpio85", "gpio86",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) static const char * const qdss_stm25_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) "gpio85",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) static const char * const qdss_stm31_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) "gpio86",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) static const char * const blsp_i2c12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) "gpio87", "gpio88",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) static const char * const qdss_stm30_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) "gpio87",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) static const char * const qdss_stm29_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) "gpio88",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) static const char * const tsif1_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) "gpio89",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) static const char * const qdss_stm28_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) "gpio89",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) static const char * const tsif1_en_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) "gpio90",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) static const char * const tsif1_data_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) static const char * const sdc4_cmd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) static const char * const qdss_stm27_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) static const char * const qdss_traceclk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) static const char * const tsif2_error_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) "gpio92",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) static const char * const sdc43_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) "gpio92",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) static const char * const vfr_1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) "gpio92",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) static const char * const qdss_stm26_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) "gpio92",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) static const char * const tsif2_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) "gpio93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) static const char * const sdc4_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) "gpio93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) static const char * const qdss_stm24_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) "gpio93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) static const char * const tsif2_en_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) static const char * const sdc42_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) static const char * const qdss_stm23_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) static const char * const qdss_tracectl_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) static const char * const sd_card_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) "gpio95",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) static const char * const tsif2_data_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) "gpio95",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) static const char * const sdc41_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) "gpio95",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) static const char * const tsif2_sync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) "gpio96",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) static const char * const sdc40_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) "gpio96",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) static const char * const mdp_vsync_p_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) "gpio97",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) static const char * const ldo_en_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) "gpio97",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) static const char * const mdp_vsync_s_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) static const char * const ldo_update_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) static const char * const blsp11_uart_tx_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) "gpio100",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) static const char * const blsp11_uart_rx_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) "gpio101",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) static const char * const blsp11_i2c_sda_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) "gpio102",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) static const char * const prng_rosc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) "gpio102",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) static const char * const blsp11_i2c_scl_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) "gpio103",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) static const char * const uim2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) "gpio105", "gpio106", "gpio107", "gpio108",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) static const char * const uim1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) "gpio109", "gpio110", "gpio111", "gpio112",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) static const char * const uim_batt_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) "gpio113",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) static const char * const pci_e2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) "gpio114", "gpio115", "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) static const char * const pa_indicator_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) static const char * const adsp_ext_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) "gpio118",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) static const char * const ddr_bist_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) "gpio121", "gpio122", "gpio123", "gpio124",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) static const char * const qdss_tracedata_11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) "gpio123",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) static const char * const qdss_tracedata_12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) "gpio124",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) static const char * const modem_tsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) "gpio128",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) static const char * const nav_dr_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) "gpio128",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) static const char * const nav_pps_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) "gpio128",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) static const char * const pci_e1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) "gpio130", "gpio131", "gpio132",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) static const char * const gsm_tx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) "gpio134", "gpio135",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) static const char * const qspi_cs_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) "gpio138", "gpio141",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) static const char * const ssbi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) "gpio139",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) static const char * const ssbi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) "gpio140",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) static const char * const mss_lte_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) "gpio144", "gpio145",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) static const char * const qspi_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) "gpio145",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) static const char * const qspi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) "gpio146",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) static const char * const qspi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) "gpio147",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) static const char * const qspi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) "gpio148",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) static const char * const qspi3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) "gpio149",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) static const struct msm_function msm8996_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) FUNCTION(adsp_ext),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) FUNCTION(atest_bbrx0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) FUNCTION(atest_bbrx1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) FUNCTION(atest_char),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) FUNCTION(atest_char0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) FUNCTION(atest_char1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) FUNCTION(atest_char2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) FUNCTION(atest_char3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) FUNCTION(atest_gpsadc0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) FUNCTION(atest_gpsadc1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) FUNCTION(atest_tsens),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) FUNCTION(atest_tsens2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) FUNCTION(atest_usb1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) FUNCTION(atest_usb10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) FUNCTION(atest_usb11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) FUNCTION(atest_usb12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) FUNCTION(atest_usb13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) FUNCTION(atest_usb2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) FUNCTION(atest_usb20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) FUNCTION(atest_usb21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) FUNCTION(atest_usb22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) FUNCTION(atest_usb23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) FUNCTION(audio_ref),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) FUNCTION(bimc_dte0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) FUNCTION(bimc_dte1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) FUNCTION(blsp10_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) FUNCTION(blsp11_i2c_scl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) FUNCTION(blsp11_i2c_sda_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) FUNCTION(blsp11_uart_rx_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) FUNCTION(blsp11_uart_tx_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) FUNCTION(blsp1_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) FUNCTION(blsp2_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) FUNCTION(blsp_i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) FUNCTION(blsp_i2c10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) FUNCTION(blsp_i2c11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) FUNCTION(blsp_i2c12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) FUNCTION(blsp_i2c2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) FUNCTION(blsp_i2c3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) FUNCTION(blsp_i2c4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) FUNCTION(blsp_i2c5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) FUNCTION(blsp_i2c6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) FUNCTION(blsp_i2c7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) FUNCTION(blsp_i2c8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) FUNCTION(blsp_i2c9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) FUNCTION(blsp_spi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) FUNCTION(blsp_spi10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) FUNCTION(blsp_spi11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) FUNCTION(blsp_spi12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) FUNCTION(blsp_spi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) FUNCTION(blsp_spi3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) FUNCTION(blsp_spi4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) FUNCTION(blsp_spi5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) FUNCTION(blsp_spi6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) FUNCTION(blsp_spi7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) FUNCTION(blsp_spi8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) FUNCTION(blsp_spi9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) FUNCTION(blsp_uart1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) FUNCTION(blsp_uart10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) FUNCTION(blsp_uart11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) FUNCTION(blsp_uart12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) FUNCTION(blsp_uart2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) FUNCTION(blsp_uart3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) FUNCTION(blsp_uart4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) FUNCTION(blsp_uart5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) FUNCTION(blsp_uart6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) FUNCTION(blsp_uart7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) FUNCTION(blsp_uart8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) FUNCTION(blsp_uart9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) FUNCTION(blsp_uim1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) FUNCTION(blsp_uim10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) FUNCTION(blsp_uim11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) FUNCTION(blsp_uim12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) FUNCTION(blsp_uim2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) FUNCTION(blsp_uim3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) FUNCTION(blsp_uim4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) FUNCTION(blsp_uim5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) FUNCTION(blsp_uim6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) FUNCTION(blsp_uim7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) FUNCTION(blsp_uim8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) FUNCTION(blsp_uim9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) FUNCTION(btfm_slimbus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) FUNCTION(cam_mclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) FUNCTION(cci_async),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) FUNCTION(cci_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) FUNCTION(cci_timer0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) FUNCTION(cci_timer1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) FUNCTION(cci_timer2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) FUNCTION(cci_timer3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) FUNCTION(cci_timer4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) FUNCTION(cri_trng),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) FUNCTION(cri_trng0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) FUNCTION(cri_trng1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) FUNCTION(dac_calib0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) FUNCTION(dac_calib1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) FUNCTION(dac_calib10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) FUNCTION(dac_calib11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) FUNCTION(dac_calib12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) FUNCTION(dac_calib13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) FUNCTION(dac_calib14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) FUNCTION(dac_calib15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) FUNCTION(dac_calib16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) FUNCTION(dac_calib17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) FUNCTION(dac_calib18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) FUNCTION(dac_calib19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) FUNCTION(dac_calib2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) FUNCTION(dac_calib20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) FUNCTION(dac_calib21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) FUNCTION(dac_calib22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) FUNCTION(dac_calib23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) FUNCTION(dac_calib24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) FUNCTION(dac_calib25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) FUNCTION(dac_calib26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) FUNCTION(dac_calib3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) FUNCTION(dac_calib4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) FUNCTION(dac_calib5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) FUNCTION(dac_calib6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) FUNCTION(dac_calib7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) FUNCTION(dac_calib8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) FUNCTION(dac_calib9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) FUNCTION(dac_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) FUNCTION(dbg_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) FUNCTION(ddr_bist),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) FUNCTION(edp_hot),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) FUNCTION(edp_lcd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) FUNCTION(gcc_gp1_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) FUNCTION(gcc_gp1_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) FUNCTION(gcc_gp2_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) FUNCTION(gcc_gp2_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) FUNCTION(gcc_gp3_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) FUNCTION(gcc_gp3_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) FUNCTION(gsm_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) FUNCTION(hdmi_cec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) FUNCTION(hdmi_ddc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) FUNCTION(hdmi_hot),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) FUNCTION(hdmi_rcv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) FUNCTION(isense_dbg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) FUNCTION(ldo_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) FUNCTION(ldo_update),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) FUNCTION(lpass_slimbus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) FUNCTION(m_voc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) FUNCTION(mdp_vsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) FUNCTION(mdp_vsync_p_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) FUNCTION(mdp_vsync_s_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) FUNCTION(modem_tsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) FUNCTION(mss_lte),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) FUNCTION(nav_dr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) FUNCTION(nav_pps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) FUNCTION(pa_indicator),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) FUNCTION(pci_e0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) FUNCTION(pci_e1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) FUNCTION(pci_e2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) FUNCTION(pll_bypassnl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) FUNCTION(pll_reset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) FUNCTION(pri_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) FUNCTION(prng_rosc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) FUNCTION(pwr_crypto),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) FUNCTION(pwr_modem),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) FUNCTION(pwr_nav),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) FUNCTION(qdss_cti),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) FUNCTION(qdss_cti_trig_in_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) FUNCTION(qdss_cti_trig_in_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) FUNCTION(qdss_cti_trig_out_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) FUNCTION(qdss_cti_trig_out_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) FUNCTION(qdss_stm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) FUNCTION(qdss_stm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) FUNCTION(qdss_stm10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) FUNCTION(qdss_stm11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) FUNCTION(qdss_stm12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) FUNCTION(qdss_stm13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) FUNCTION(qdss_stm14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) FUNCTION(qdss_stm15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) FUNCTION(qdss_stm16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) FUNCTION(qdss_stm17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) FUNCTION(qdss_stm18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) FUNCTION(qdss_stm19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) FUNCTION(qdss_stm2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) FUNCTION(qdss_stm20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) FUNCTION(qdss_stm21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) FUNCTION(qdss_stm22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) FUNCTION(qdss_stm23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) FUNCTION(qdss_stm24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) FUNCTION(qdss_stm25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) FUNCTION(qdss_stm26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) FUNCTION(qdss_stm27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) FUNCTION(qdss_stm28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) FUNCTION(qdss_stm29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) FUNCTION(qdss_stm3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) FUNCTION(qdss_stm30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) FUNCTION(qdss_stm31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) FUNCTION(qdss_stm4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) FUNCTION(qdss_stm5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) FUNCTION(qdss_stm6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) FUNCTION(qdss_stm7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) FUNCTION(qdss_stm8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) FUNCTION(qdss_stm9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) FUNCTION(qdss_traceclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) FUNCTION(qdss_traceclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) FUNCTION(qdss_tracectl_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) FUNCTION(qdss_tracectl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) FUNCTION(qdss_tracedata_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) FUNCTION(qdss_tracedata_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) FUNCTION(qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) FUNCTION(qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) FUNCTION(qspi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) FUNCTION(qspi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) FUNCTION(qspi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) FUNCTION(qspi3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) FUNCTION(qspi_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) FUNCTION(qspi_cs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) FUNCTION(qua_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) FUNCTION(sd_card),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) FUNCTION(sd_write),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) FUNCTION(sdc40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) FUNCTION(sdc41),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) FUNCTION(sdc42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) FUNCTION(sdc43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) FUNCTION(sdc4_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) FUNCTION(sdc4_cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) FUNCTION(sec_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) FUNCTION(spkr_i2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) FUNCTION(ssbi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) FUNCTION(ssbi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) FUNCTION(ssc_irq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) FUNCTION(ter_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) FUNCTION(tsense_pwm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) FUNCTION(tsense_pwm2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) FUNCTION(tsif1_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) FUNCTION(tsif1_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) FUNCTION(tsif1_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) FUNCTION(tsif1_error),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) FUNCTION(tsif1_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) FUNCTION(tsif2_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) FUNCTION(tsif2_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) FUNCTION(tsif2_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) FUNCTION(tsif2_error),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) FUNCTION(tsif2_sync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) FUNCTION(uim1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) FUNCTION(uim2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) FUNCTION(uim3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) FUNCTION(uim4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) FUNCTION(uim_batt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) FUNCTION(vfr_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) static const struct msm_pingroup msm8996_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, atest_tsens,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) bimc_dte1, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) PINGROUP(4, blsp_spi8, blsp_uart8, blsp_uim8, NA, qdss_cti_trig_out_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) dac_calib0, bimc_dte0, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) PINGROUP(5, blsp_spi8, blsp_uart8, blsp_uim8, NA, qdss_cti_trig_in_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) dac_calib1, bimc_dte1, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) PINGROUP(6, blsp_spi8, blsp_uart8, blsp_i2c8, NA, dac_calib2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) bimc_dte0, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) PINGROUP(7, blsp_spi8, blsp_uart8, blsp_i2c8, NA, atest_tsens2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) atest_usb1, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) PINGROUP(8, blsp_spi10, blsp_uart10, blsp_uim10, NA, atest_bbrx1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) atest_usb13, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) PINGROUP(9, blsp_spi10, blsp_uart10, blsp_uim10, atest_bbrx0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) atest_usb12, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) PINGROUP(10, mdp_vsync, blsp_spi10, blsp_uart10, blsp_i2c10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) atest_gpsadc1, atest_usb11, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) PINGROUP(11, mdp_vsync, blsp_spi10, blsp_uart10, blsp_i2c10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) atest_gpsadc0, atest_usb10, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) PINGROUP(12, mdp_vsync, m_voc, dac_gpio, atest_char, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) PINGROUP(13, cam_mclk, pll_bypassnl, qdss_stm7, qdss_tracedata_b, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) PINGROUP(14, cam_mclk, pll_reset, qdss_stm6, qdss_tracedata_b, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) PINGROUP(15, cam_mclk, qdss_stm5, qdss_tracedata_b, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) PINGROUP(16, cam_mclk, qdss_stm4, qdss_tracedata_b, NA, atest_usb2, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) PINGROUP(17, cci_i2c, qdss_stm3, qdss_tracedata_b, dac_calib3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) atest_usb23, atest_char3, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) PINGROUP(18, cci_i2c, qdss_stm2, qdss_tracedata_b, dac_calib4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) atest_usb22, atest_char2, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) PINGROUP(19, cci_i2c, qdss_stm1, qdss_tracedata_b, dac_calib5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) atest_usb21, atest_char1, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) PINGROUP(20, cci_i2c, dbg_out, qdss_stm0, dac_calib6, atest_usb20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) atest_char0, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) PINGROUP(21, cci_timer0, qdss_stm13, qdss_tracedata_b, dac_calib7, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) PINGROUP(22, cci_timer1, qdss_stm12, qdss_tracedata_b, dac_calib8, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) PINGROUP(23, cci_timer2, blsp1_spi, qdss_stm11, qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) dac_calib9, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) PINGROUP(24, cci_timer3, cci_async, blsp1_spi, qdss_stm10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) qdss_cti_trig_in_a, dac_calib10, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) PINGROUP(25, cci_timer4, cci_async, blsp_spi6, blsp_uart6, blsp_uim6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) PINGROUP(26, cci_async, blsp_spi6, blsp_uart6, blsp_uim6, qdss_stm8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) qdss_tracedata_b, dac_calib12, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) PINGROUP(27, blsp_spi6, blsp_uart6, blsp_i2c6, blsp1_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) qdss_tracectl_a, dac_calib13, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) PINGROUP(28, blsp_spi6, blsp_uart6, blsp_i2c6, blsp1_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) qdss_traceclk_a, dac_calib14, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) PINGROUP(29, blsp2_spi, NA, qdss_tracedata_b, dac_calib15, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) PINGROUP(30, hdmi_rcv, blsp2_spi, dac_calib16, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) PINGROUP(31, hdmi_cec, pwr_modem, dac_calib17, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) PINGROUP(32, hdmi_ddc, pwr_nav, NA, dac_calib18, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) PINGROUP(33, hdmi_ddc, pwr_crypto, NA, dac_calib19, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) PINGROUP(34, hdmi_hot, NA, dac_calib20, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) PINGROUP(35, pci_e0, NA, dac_calib21, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) PINGROUP(36, pci_e0, NA, dac_calib22, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) PINGROUP(37, NA, dac_calib23, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) PINGROUP(38, NA, dac_calib24, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) PINGROUP(39, tsif1_sync, NA, dac_calib25, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) PINGROUP(40, sd_write, tsif1_error, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) PINGROUP(41, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) dac_calib0, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) PINGROUP(42, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) dac_calib1, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) PINGROUP(43, blsp_spi2, blsp_uart2, blsp_i2c2, NA, dac_calib2, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) PINGROUP(44, blsp_spi2, blsp_uart2, blsp_i2c2, NA, dac_calib3, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) PINGROUP(45, blsp_spi3, blsp_uart3, blsp_uim3, NA, dac_calib4, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) PINGROUP(46, blsp_spi3, blsp_uart3, blsp_uim3, NA, dac_calib5, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) PINGROUP(47, blsp_spi3, blsp_uart3, blsp_i2c3, dac_calib6, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) PINGROUP(48, blsp_spi3, blsp_uart3, blsp_i2c3, dac_calib7, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) PINGROUP(49, uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) dac_calib8, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) PINGROUP(50, uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) dac_calib9, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) PINGROUP(51, uim3, blsp_spi9, blsp_uart9, blsp_i2c9, blsp10_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) dac_calib10, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) PINGROUP(52, uim3, blsp_spi9, blsp_uart9, blsp_i2c9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) blsp10_spi, dac_calib11, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) PINGROUP(53, blsp_spi7, blsp_uart7, blsp_uim7, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) dac_calib12, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) PINGROUP(54, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) qdss_tracedata_a, dac_calib13, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) PINGROUP(55, blsp_spi7, blsp_uart7, blsp_i2c7, NA, dac_calib14, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) PINGROUP(56, blsp_spi7, blsp_uart7, blsp_i2c7, NA, dac_calib15, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) PINGROUP(57, qua_mi2s, gcc_gp1_clk_a, NA, qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) dac_calib16, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) PINGROUP(58, qua_mi2s, uim4, blsp_spi11, blsp_uart11, blsp_uim11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) gcc_gp2_clk_a, NA, qdss_tracedata_b, dac_calib17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) PINGROUP(59, qua_mi2s, uim4, blsp_spi11, blsp_uart11, blsp_uim11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) gcc_gp3_clk_a, NA, dac_calib18, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) PINGROUP(60, qua_mi2s, uim4, blsp_spi11, blsp_uart11, blsp_i2c11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) cri_trng0, NA, dac_calib19, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) PINGROUP(61, qua_mi2s, uim4, blsp_spi11, blsp_uart11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) blsp_i2c11, cri_trng1, NA, dac_calib20, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) PINGROUP(62, qua_mi2s, cri_trng, NA, dac_calib21, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) PINGROUP(63, qua_mi2s, NA, NA, qdss_stm18, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) dac_calib22, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) PINGROUP(64, pri_mi2s, NA, qdss_stm17, qdss_tracedata_a, dac_calib23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) PINGROUP(65, pri_mi2s, blsp_spi4, blsp_uart4, blsp_uim4, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) qdss_stm16, qdss_tracedata_a, dac_calib24, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) PINGROUP(66, pri_mi2s, blsp_spi4, blsp_uart4, blsp_uim4, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) qdss_stm15, qdss_tracedata_a, dac_calib25, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) PINGROUP(67, pri_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, qdss_stm14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) qdss_tracedata_a, dac_calib26, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) PINGROUP(68, pri_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) PINGROUP(69, spkr_i2s, audio_ref, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) PINGROUP(70, lpass_slimbus, spkr_i2s, isense_dbg, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) PINGROUP(71, lpass_slimbus, spkr_i2s, tsense_pwm1, tsense_pwm2, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) PINGROUP(72, lpass_slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) PINGROUP(73, btfm_slimbus, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) PINGROUP(74, btfm_slimbus, ter_mi2s, qdss_stm22, qdss_tracedata_a, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) PINGROUP(75, ter_mi2s, qdss_stm21, qdss_tracedata_a, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) PINGROUP(76, ter_mi2s, qdss_stm20, qdss_tracedata_a, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) PINGROUP(77, ter_mi2s, qdss_stm19, qdss_tracedata_a, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) PINGROUP(78, ter_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) PINGROUP(79, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) PINGROUP(81, sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) PINGROUP(82, sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp3_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) PINGROUP(83, sec_mi2s, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) PINGROUP(84, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, qdss_stm25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) qdss_tracedata_a, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, qdss_stm31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) qdss_tracedata_a, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA, qdss_stm30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) qdss_tracedata_a, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, blsp10_spi, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) qdss_stm29, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) PINGROUP(89, tsif1_clk, qdss_stm28, qdss_tracedata_a, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) PINGROUP(90, tsif1_en, blsp1_spi, qdss_tracedata_a, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) PINGROUP(91, tsif1_data, sdc4_cmd, qdss_stm27, qdss_traceclk_b, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) PINGROUP(92, tsif2_error, sdc43, vfr_1, qdss_stm26, qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) PINGROUP(93, tsif2_clk, sdc4_clk, NA, qdss_stm24, qdss_tracedata_b, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) PINGROUP(94, tsif2_en, sdc42, NA, qdss_stm23, qdss_tracectl_b, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) PINGROUP(95, tsif2_data, sdc41, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) PINGROUP(96, tsif2_sync, sdc40, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) PINGROUP(97, NA, NA, mdp_vsync_p_b, ldo_en, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) PINGROUP(98, NA, NA, mdp_vsync_s_b, ldo_update, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) PINGROUP(100, NA, NA, blsp11_uart_tx_b, qdss_cti, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) PINGROUP(101, NA, blsp11_uart_rx_b, qdss_cti, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) PINGROUP(102, NA, blsp11_i2c_sda_b, prng_rosc, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) PINGROUP(103, NA, blsp11_i2c_scl_b, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) PINGROUP(105, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) PINGROUP(106, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) PINGROUP(107, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) PINGROUP(108, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) PINGROUP(109, uim1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) PINGROUP(110, uim1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) PINGROUP(111, uim1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) PINGROUP(112, uim1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) PINGROUP(113, uim_batt, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) PINGROUP(114, NA, pci_e2, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) PINGROUP(115, NA, pci_e2, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) PINGROUP(116, NA, pa_indicator, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) PINGROUP(117, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) PINGROUP(118, adsp_ext, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) PINGROUP(119, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) PINGROUP(120, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) PINGROUP(121, ddr_bist, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) PINGROUP(122, ddr_bist, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) PINGROUP(123, ddr_bist, qdss_tracedata_11, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) PINGROUP(124, ddr_bist, qdss_tracedata_12, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) PINGROUP(126, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) PINGROUP(127, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) PINGROUP(128, NA, modem_tsync, nav_dr, nav_pps, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) PINGROUP(130, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) PINGROUP(131, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) PINGROUP(132, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) PINGROUP(133, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) PINGROUP(134, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) PINGROUP(135, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) PINGROUP(138, NA, qspi_cs, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) PINGROUP(139, NA, ssbi2, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) PINGROUP(140, NA, ssbi1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) PINGROUP(141, NA, qspi_cs, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) PINGROUP(144, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) PINGROUP(145, mss_lte, qspi_clk, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) PINGROUP(146, NA, qspi0, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) PINGROUP(147, NA, qspi1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) PINGROUP(148, NA, qspi2, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) PINGROUP(149, NA, qspi3, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) SDC_QDSD_PINGROUP(sdc1_clk, 0x12c000, 13, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) SDC_QDSD_PINGROUP(sdc1_cmd, 0x12c000, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) SDC_QDSD_PINGROUP(sdc1_data, 0x12c000, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) SDC_QDSD_PINGROUP(sdc2_clk, 0x12d000, 14, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) SDC_QDSD_PINGROUP(sdc2_cmd, 0x12d000, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) SDC_QDSD_PINGROUP(sdc2_data, 0x12d000, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) SDC_QDSD_PINGROUP(sdc1_rclk, 0x12c000, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) static const struct msm_pinctrl_soc_data msm8996_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) .pins = msm8996_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) .npins = ARRAY_SIZE(msm8996_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) .functions = msm8996_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) .nfunctions = ARRAY_SIZE(msm8996_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) .groups = msm8996_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) .ngroups = ARRAY_SIZE(msm8996_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) .ngpios = 150,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) static int msm8996_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) return msm_pinctrl_probe(pdev, &msm8996_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) static const struct of_device_id msm8996_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) { .compatible = "qcom,msm8996-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) static struct platform_driver msm8996_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) .name = "msm8996-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) .of_match_table = msm8996_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) .probe = msm8996_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) .remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) static int __init msm8996_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) return platform_driver_register(&msm8996_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) arch_initcall(msm8996_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) static void __exit msm8996_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) platform_driver_unregister(&msm8996_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) module_exit(msm8996_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) MODULE_DESCRIPTION("Qualcomm msm8996 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) MODULE_DEVICE_TABLE(of, msm8996_pinctrl_of_match);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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