^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2016, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) [MSM_MUX_##fname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .name = "gpio" #id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .pins = gpio##id##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .npins = ARRAY_SIZE(gpio##id##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .funcs = (int[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MSM_MUX_gpio, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MSM_MUX_##f1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MSM_MUX_##f2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MSM_MUX_##f3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MSM_MUX_##f4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MSM_MUX_##f5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MSM_MUX_##f6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MSM_MUX_##f7, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MSM_MUX_##f8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MSM_MUX_##f9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MSM_MUX_##f10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MSM_MUX_##f11 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .nfuncs = 12, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .ctl_reg = 0x1000 + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .io_reg = 0x1004 + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .intr_cfg_reg = 0x1008 + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .intr_status_reg = 0x100c + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .intr_target_reg = 0x1008 + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .mux_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .pull_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .drv_bit = 6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .oe_bit = 9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .in_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .out_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .intr_enable_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .intr_status_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .intr_target_bit = 5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .intr_target_kpss_val = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .intr_raw_status_bit = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .intr_polarity_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .intr_detection_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .intr_detection_width = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .name = #pg_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .pins = pg_name##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .npins = ARRAY_SIZE(pg_name##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .ctl_reg = ctl, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .io_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .intr_cfg_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .intr_status_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .intr_target_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .mux_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .pull_bit = pull, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .drv_bit = drv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .oe_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .in_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .out_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .intr_enable_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .intr_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .intr_target_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .intr_target_kpss_val = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .intr_raw_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .intr_polarity_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .intr_detection_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .intr_detection_width = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static const struct pinctrl_pin_desc msm8994_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) PINCTRL_PIN(70, "GPIO_70"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) PINCTRL_PIN(71, "GPIO_71"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) PINCTRL_PIN(72, "GPIO_72"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) PINCTRL_PIN(73, "GPIO_73"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) PINCTRL_PIN(74, "GPIO_74"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PINCTRL_PIN(75, "GPIO_75"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) PINCTRL_PIN(76, "GPIO_76"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) PINCTRL_PIN(77, "GPIO_77"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PINCTRL_PIN(78, "GPIO_78"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PINCTRL_PIN(79, "GPIO_79"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) PINCTRL_PIN(80, "GPIO_80"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) PINCTRL_PIN(81, "GPIO_81"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) PINCTRL_PIN(82, "GPIO_82"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) PINCTRL_PIN(83, "GPIO_83"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) PINCTRL_PIN(84, "GPIO_84"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PINCTRL_PIN(85, "GPIO_85"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) PINCTRL_PIN(86, "GPIO_86"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PINCTRL_PIN(87, "GPIO_87"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PINCTRL_PIN(88, "GPIO_88"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) PINCTRL_PIN(89, "GPIO_89"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) PINCTRL_PIN(90, "GPIO_90"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PINCTRL_PIN(91, "GPIO_91"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PINCTRL_PIN(92, "GPIO_92"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PINCTRL_PIN(93, "GPIO_93"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PINCTRL_PIN(94, "GPIO_94"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PINCTRL_PIN(95, "GPIO_95"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PINCTRL_PIN(96, "GPIO_96"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PINCTRL_PIN(97, "GPIO_97"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PINCTRL_PIN(98, "GPIO_98"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINCTRL_PIN(99, "GPIO_99"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PINCTRL_PIN(100, "GPIO_100"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) PINCTRL_PIN(101, "GPIO_101"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PINCTRL_PIN(102, "GPIO_102"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PINCTRL_PIN(103, "GPIO_103"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PINCTRL_PIN(104, "GPIO_104"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PINCTRL_PIN(105, "GPIO_105"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PINCTRL_PIN(106, "GPIO_106"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) PINCTRL_PIN(107, "GPIO_107"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PINCTRL_PIN(108, "GPIO_108"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PINCTRL_PIN(109, "GPIO_109"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PINCTRL_PIN(110, "GPIO_110"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PINCTRL_PIN(111, "GPIO_111"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PINCTRL_PIN(112, "GPIO_112"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PINCTRL_PIN(113, "GPIO_113"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PINCTRL_PIN(114, "GPIO_114"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PINCTRL_PIN(115, "GPIO_115"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PINCTRL_PIN(116, "GPIO_116"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINCTRL_PIN(117, "GPIO_117"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) PINCTRL_PIN(118, "GPIO_118"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PINCTRL_PIN(119, "GPIO_119"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PINCTRL_PIN(120, "GPIO_120"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) PINCTRL_PIN(121, "GPIO_121"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PINCTRL_PIN(122, "GPIO_122"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PINCTRL_PIN(123, "GPIO_123"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PINCTRL_PIN(124, "GPIO_124"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PINCTRL_PIN(125, "GPIO_125"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) PINCTRL_PIN(126, "GPIO_126"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PINCTRL_PIN(127, "GPIO_127"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) PINCTRL_PIN(128, "GPIO_128"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PINCTRL_PIN(129, "GPIO_129"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PINCTRL_PIN(130, "GPIO_130"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PINCTRL_PIN(131, "GPIO_131"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PINCTRL_PIN(132, "GPIO_132"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) PINCTRL_PIN(133, "GPIO_133"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PINCTRL_PIN(134, "GPIO_134"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) PINCTRL_PIN(135, "GPIO_135"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PINCTRL_PIN(136, "GPIO_136"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) PINCTRL_PIN(137, "GPIO_137"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) PINCTRL_PIN(138, "GPIO_138"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) PINCTRL_PIN(139, "GPIO_139"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) PINCTRL_PIN(140, "GPIO_140"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) PINCTRL_PIN(141, "GPIO_141"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) PINCTRL_PIN(142, "GPIO_142"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) PINCTRL_PIN(143, "GPIO_143"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) PINCTRL_PIN(144, "GPIO_144"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) PINCTRL_PIN(145, "GPIO_145"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) PINCTRL_PIN(146, "SDC1_RCLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) PINCTRL_PIN(147, "SDC1_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) PINCTRL_PIN(148, "SDC1_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) PINCTRL_PIN(149, "SDC1_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) PINCTRL_PIN(150, "SDC2_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) PINCTRL_PIN(151, "SDC2_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) PINCTRL_PIN(152, "SDC2_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) PINCTRL_PIN(153, "SDC3_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) PINCTRL_PIN(154, "SDC3_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) PINCTRL_PIN(155, "SDC3_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define DECLARE_MSM_GPIO_PINS(pin) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) DECLARE_MSM_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) DECLARE_MSM_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) DECLARE_MSM_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) DECLARE_MSM_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) DECLARE_MSM_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) DECLARE_MSM_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) DECLARE_MSM_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) DECLARE_MSM_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) DECLARE_MSM_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) DECLARE_MSM_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DECLARE_MSM_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) DECLARE_MSM_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) DECLARE_MSM_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) DECLARE_MSM_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) DECLARE_MSM_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) DECLARE_MSM_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) DECLARE_MSM_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) DECLARE_MSM_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) DECLARE_MSM_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) DECLARE_MSM_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) DECLARE_MSM_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) DECLARE_MSM_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) DECLARE_MSM_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) DECLARE_MSM_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) DECLARE_MSM_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) DECLARE_MSM_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) DECLARE_MSM_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) DECLARE_MSM_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) DECLARE_MSM_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) DECLARE_MSM_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) DECLARE_MSM_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) DECLARE_MSM_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) DECLARE_MSM_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) DECLARE_MSM_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) DECLARE_MSM_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) DECLARE_MSM_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) DECLARE_MSM_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) DECLARE_MSM_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) DECLARE_MSM_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) DECLARE_MSM_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) DECLARE_MSM_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) DECLARE_MSM_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) DECLARE_MSM_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) DECLARE_MSM_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) DECLARE_MSM_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) DECLARE_MSM_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) DECLARE_MSM_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) DECLARE_MSM_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) DECLARE_MSM_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) DECLARE_MSM_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) DECLARE_MSM_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) DECLARE_MSM_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) DECLARE_MSM_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) DECLARE_MSM_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) DECLARE_MSM_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) DECLARE_MSM_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) DECLARE_MSM_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) DECLARE_MSM_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) DECLARE_MSM_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) DECLARE_MSM_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) DECLARE_MSM_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) DECLARE_MSM_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) DECLARE_MSM_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) DECLARE_MSM_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) DECLARE_MSM_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) DECLARE_MSM_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) DECLARE_MSM_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) DECLARE_MSM_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) DECLARE_MSM_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) DECLARE_MSM_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) DECLARE_MSM_GPIO_PINS(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) DECLARE_MSM_GPIO_PINS(71);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) DECLARE_MSM_GPIO_PINS(72);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) DECLARE_MSM_GPIO_PINS(73);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) DECLARE_MSM_GPIO_PINS(74);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) DECLARE_MSM_GPIO_PINS(75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) DECLARE_MSM_GPIO_PINS(76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) DECLARE_MSM_GPIO_PINS(77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) DECLARE_MSM_GPIO_PINS(78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) DECLARE_MSM_GPIO_PINS(79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) DECLARE_MSM_GPIO_PINS(80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) DECLARE_MSM_GPIO_PINS(81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) DECLARE_MSM_GPIO_PINS(82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) DECLARE_MSM_GPIO_PINS(83);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) DECLARE_MSM_GPIO_PINS(84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) DECLARE_MSM_GPIO_PINS(85);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) DECLARE_MSM_GPIO_PINS(86);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) DECLARE_MSM_GPIO_PINS(87);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) DECLARE_MSM_GPIO_PINS(88);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) DECLARE_MSM_GPIO_PINS(89);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) DECLARE_MSM_GPIO_PINS(90);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) DECLARE_MSM_GPIO_PINS(91);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) DECLARE_MSM_GPIO_PINS(92);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) DECLARE_MSM_GPIO_PINS(93);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) DECLARE_MSM_GPIO_PINS(94);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) DECLARE_MSM_GPIO_PINS(95);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) DECLARE_MSM_GPIO_PINS(96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) DECLARE_MSM_GPIO_PINS(97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) DECLARE_MSM_GPIO_PINS(98);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) DECLARE_MSM_GPIO_PINS(99);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) DECLARE_MSM_GPIO_PINS(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) DECLARE_MSM_GPIO_PINS(101);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) DECLARE_MSM_GPIO_PINS(102);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) DECLARE_MSM_GPIO_PINS(103);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) DECLARE_MSM_GPIO_PINS(104);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) DECLARE_MSM_GPIO_PINS(105);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) DECLARE_MSM_GPIO_PINS(106);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) DECLARE_MSM_GPIO_PINS(107);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) DECLARE_MSM_GPIO_PINS(108);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) DECLARE_MSM_GPIO_PINS(109);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) DECLARE_MSM_GPIO_PINS(110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) DECLARE_MSM_GPIO_PINS(111);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) DECLARE_MSM_GPIO_PINS(112);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) DECLARE_MSM_GPIO_PINS(113);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) DECLARE_MSM_GPIO_PINS(114);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) DECLARE_MSM_GPIO_PINS(115);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) DECLARE_MSM_GPIO_PINS(116);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) DECLARE_MSM_GPIO_PINS(117);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) DECLARE_MSM_GPIO_PINS(118);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) DECLARE_MSM_GPIO_PINS(119);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) DECLARE_MSM_GPIO_PINS(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) DECLARE_MSM_GPIO_PINS(121);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) DECLARE_MSM_GPIO_PINS(122);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) DECLARE_MSM_GPIO_PINS(123);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) DECLARE_MSM_GPIO_PINS(124);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) DECLARE_MSM_GPIO_PINS(125);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) DECLARE_MSM_GPIO_PINS(126);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) DECLARE_MSM_GPIO_PINS(127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) DECLARE_MSM_GPIO_PINS(128);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) DECLARE_MSM_GPIO_PINS(129);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) DECLARE_MSM_GPIO_PINS(130);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) DECLARE_MSM_GPIO_PINS(131);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) DECLARE_MSM_GPIO_PINS(132);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) DECLARE_MSM_GPIO_PINS(133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) DECLARE_MSM_GPIO_PINS(134);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) DECLARE_MSM_GPIO_PINS(135);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) DECLARE_MSM_GPIO_PINS(136);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) DECLARE_MSM_GPIO_PINS(137);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) DECLARE_MSM_GPIO_PINS(138);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) DECLARE_MSM_GPIO_PINS(139);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) DECLARE_MSM_GPIO_PINS(140);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) DECLARE_MSM_GPIO_PINS(141);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) DECLARE_MSM_GPIO_PINS(142);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) DECLARE_MSM_GPIO_PINS(143);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) DECLARE_MSM_GPIO_PINS(144);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) DECLARE_MSM_GPIO_PINS(145);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static const unsigned int sdc1_rclk_pins[] = { 146 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static const unsigned int sdc1_clk_pins[] = { 147 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static const unsigned int sdc1_cmd_pins[] = { 148 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static const unsigned int sdc1_data_pins[] = { 149 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static const unsigned int sdc2_clk_pins[] = { 150 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static const unsigned int sdc2_cmd_pins[] = { 151 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static const unsigned int sdc2_data_pins[] = { 152 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static const unsigned int sdc3_clk_pins[] = { 153 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static const unsigned int sdc3_cmd_pins[] = { 154 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static const unsigned int sdc3_data_pins[] = { 155 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) enum msm8994_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) MSM_MUX_audio_ref_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) MSM_MUX_blsp_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) MSM_MUX_blsp_i2c2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) MSM_MUX_blsp_i2c3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) MSM_MUX_blsp_i2c4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) MSM_MUX_blsp_i2c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) MSM_MUX_blsp_i2c6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) MSM_MUX_blsp_i2c7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) MSM_MUX_blsp_i2c8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) MSM_MUX_blsp_i2c9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) MSM_MUX_blsp_i2c10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) MSM_MUX_blsp_i2c11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) MSM_MUX_blsp_i2c12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) MSM_MUX_blsp_spi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) MSM_MUX_blsp_spi1_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) MSM_MUX_blsp_spi1_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) MSM_MUX_blsp_spi1_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) MSM_MUX_blsp_spi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) MSM_MUX_blsp_spi2_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) MSM_MUX_blsp_spi2_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) MSM_MUX_blsp_spi2_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) MSM_MUX_blsp_spi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) MSM_MUX_blsp_spi4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) MSM_MUX_blsp_spi5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) MSM_MUX_blsp_spi6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) MSM_MUX_blsp_spi7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) MSM_MUX_blsp_spi8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) MSM_MUX_blsp_spi9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) MSM_MUX_blsp_spi10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) MSM_MUX_blsp_spi10_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) MSM_MUX_blsp_spi10_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) MSM_MUX_blsp_spi10_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) MSM_MUX_blsp_spi11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) MSM_MUX_blsp_spi12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) MSM_MUX_blsp_uart1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) MSM_MUX_blsp_uart2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) MSM_MUX_blsp_uart3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) MSM_MUX_blsp_uart4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) MSM_MUX_blsp_uart5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) MSM_MUX_blsp_uart6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) MSM_MUX_blsp_uart7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) MSM_MUX_blsp_uart8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) MSM_MUX_blsp_uart9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) MSM_MUX_blsp_uart10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) MSM_MUX_blsp_uart11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) MSM_MUX_blsp_uart12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) MSM_MUX_blsp_uim1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) MSM_MUX_blsp_uim2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) MSM_MUX_blsp_uim3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) MSM_MUX_blsp_uim4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) MSM_MUX_blsp_uim5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) MSM_MUX_blsp_uim6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) MSM_MUX_blsp_uim7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) MSM_MUX_blsp_uim8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) MSM_MUX_blsp_uim9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) MSM_MUX_blsp_uim10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) MSM_MUX_blsp_uim11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) MSM_MUX_blsp_uim12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) MSM_MUX_blsp11_i2c_scl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) MSM_MUX_blsp11_i2c_sda_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) MSM_MUX_blsp11_uart_rx_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) MSM_MUX_blsp11_uart_tx_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) MSM_MUX_cam_mclk0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) MSM_MUX_cam_mclk1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) MSM_MUX_cam_mclk2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) MSM_MUX_cam_mclk3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) MSM_MUX_cci_async_in0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) MSM_MUX_cci_async_in1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) MSM_MUX_cci_async_in2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) MSM_MUX_cci_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) MSM_MUX_cci_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) MSM_MUX_cci_timer0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) MSM_MUX_cci_timer1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) MSM_MUX_cci_timer2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) MSM_MUX_cci_timer3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) MSM_MUX_cci_timer4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) MSM_MUX_gcc_gp1_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) MSM_MUX_gcc_gp1_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) MSM_MUX_gcc_gp2_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) MSM_MUX_gcc_gp2_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) MSM_MUX_gcc_gp3_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) MSM_MUX_gcc_gp3_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) MSM_MUX_gp_mn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) MSM_MUX_gp_pdm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) MSM_MUX_gp_pdm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) MSM_MUX_gp_pdm2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) MSM_MUX_gp0_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) MSM_MUX_gp1_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) MSM_MUX_gps_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) MSM_MUX_gsm_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) MSM_MUX_hdmi_cec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) MSM_MUX_hdmi_ddc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) MSM_MUX_hdmi_hpd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) MSM_MUX_hdmi_rcv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) MSM_MUX_mdp_vsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) MSM_MUX_mss_lte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) MSM_MUX_nav_pps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) MSM_MUX_nav_tsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) MSM_MUX_qdss_cti_trig_in_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) MSM_MUX_qdss_cti_trig_in_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) MSM_MUX_qdss_cti_trig_in_c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) MSM_MUX_qdss_cti_trig_in_d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) MSM_MUX_qdss_cti_trig_out_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) MSM_MUX_qdss_cti_trig_out_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) MSM_MUX_qdss_cti_trig_out_c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) MSM_MUX_qdss_cti_trig_out_d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) MSM_MUX_qdss_traceclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) MSM_MUX_qdss_traceclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) MSM_MUX_qdss_tracectl_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) MSM_MUX_qdss_tracectl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) MSM_MUX_qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) MSM_MUX_qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) MSM_MUX_qua_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) MSM_MUX_pci_e0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) MSM_MUX_pci_e1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) MSM_MUX_pri_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) MSM_MUX_sdc4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) MSM_MUX_sec_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) MSM_MUX_slimbus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) MSM_MUX_spkr_i2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) MSM_MUX_ter_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) MSM_MUX_tsif1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) MSM_MUX_tsif2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) MSM_MUX_uim1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) MSM_MUX_uim2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) MSM_MUX_uim3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) MSM_MUX_uim4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) MSM_MUX_uim_batt_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) MSM_MUX_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) MSM_MUX_NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) "gpio141", "gpio142", "gpio143", "gpio144", "gpio145",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static const char * const blsp_spi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) "gpio0", "gpio1", "gpio2", "gpio3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static const char * const blsp_uart1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) "gpio0", "gpio1", "gpio2", "gpio3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) static const char * const blsp_uim1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) "gpio0", "gpio1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) static const char * const hdmi_rcv_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) "gpio0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static const char * const blsp_i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) "gpio2", "gpio3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) static const char * const blsp_spi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) "gpio4", "gpio5", "gpio6", "gpio7"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static const char * const blsp_uart2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) "gpio4", "gpio5", "gpio6", "gpio7"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) static const char * const blsp_uim2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) "gpio4", "gpio5"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) static const char * const qdss_cti_trig_out_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) "gpio4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) static const char * const qdss_cti_trig_in_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static const char * const blsp_i2c2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) "gpio6", "gpio7"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static const char * const blsp_spi3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) "gpio8", "gpio9", "gpio10", "gpio11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static const char * const blsp_uart3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) "gpio8", "gpio9", "gpio10", "gpio11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) static const char * const blsp_uim3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) "gpio8", "gpio9"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static const char * const blsp_spi1_cs1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) "gpio8"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) static const char * const blsp_spi1_cs2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) "gpio9", "gpio11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static const char * const mdp_vsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "gpio10", "gpio11", "gpio12"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) static const char * const blsp_i2c3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) "gpio10", "gpio11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static const char * const blsp_spi1_cs3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) "gpio10"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) static const char * const qdss_tracedata_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) "gpio19", "gpio21", "gpio22", "gpio23", "gpio25", "gpio26",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) "gpio57", "gpio58", "gpio92", "gpio93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) static const char * const cam_mclk0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) "gpio13"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static const char * const cam_mclk1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) "gpio14"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static const char * const cam_mclk2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) "gpio15"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) static const char * const cam_mclk3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) "gpio16"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static const char * const cci_i2c0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) "gpio17", "gpio18"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static const char * const blsp_spi4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) "gpio17", "gpio18", "gpio19", "gpio20"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static const char * const blsp_uart4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) "gpio17", "gpio18", "gpio19", "gpio20"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static const char * const blsp_uim4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) "gpio17", "gpio18"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static const char * const cci_i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) "gpio19", "gpio20"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) static const char * const blsp_i2c4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) "gpio19", "gpio20"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static const char * const cci_timer0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) "gpio21"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) static const char * const blsp_spi5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) "gpio21", "gpio22", "gpio23", "gpio24"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static const char * const blsp_uart5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) "gpio21", "gpio22", "gpio23", "gpio24"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static const char * const blsp_uim5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) "gpio21", "gpio22"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static const char * const cci_timer1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) "gpio22"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static const char * const cci_timer2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) "gpio23"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static const char * const blsp_i2c5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) "gpio23", "gpio24"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) static const char * const cci_timer3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) "gpio24"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static const char * const cci_async_in1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) "gpio24"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) static const char * const cci_timer4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) "gpio25"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) static const char * const cci_async_in2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) "gpio25"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static const char * const blsp_spi6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) "gpio25", "gpio26", "gpio27", "gpio28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static const char * const blsp_uart6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) "gpio25", "gpio26", "gpio27", "gpio28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static const char * const blsp_uim6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) "gpio25", "gpio26"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) static const char * const cci_async_in0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) "gpio26"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static const char * const gp0_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) "gpio26"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) static const char * const gp1_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) "gpio27", "gpio57", "gpio78"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static const char * const blsp_i2c6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) "gpio27", "gpio28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) static const char * const qdss_tracectl_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) "gpio27",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static const char * const qdss_traceclk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static const char * const gp_mn_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) "gpio29"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) static const char * const hdmi_cec_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) "gpio31"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) static const char * const hdmi_ddc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) "gpio32", "gpio33"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) static const char * const hdmi_hpd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) "gpio34"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const char * const uim3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) "gpio35", "gpio36", "gpio37", "gpio38"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) static const char * const pci_e1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) "gpio35", "gpio36",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) static const char * const blsp_spi7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) "gpio41", "gpio42", "gpio43", "gpio44"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) static const char * const blsp_uart7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) "gpio41", "gpio42", "gpio43", "gpio44"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static const char * const blsp_uim7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) "gpio41", "gpio42"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) static const char * const qdss_cti_trig_out_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static const char * const qdss_cti_trig_in_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) static const char * const blsp_i2c7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) "gpio43", "gpio44"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static const char * const blsp_spi8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) "gpio45", "gpio46", "gpio47", "gpio48"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) static const char * const blsp_uart8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) "gpio45", "gpio46", "gpio47", "gpio48"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) static const char * const blsp_uim8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) "gpio45", "gpio46"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static const char * const blsp_i2c8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) "gpio47", "gpio48"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) static const char * const blsp_spi10_cs1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) "gpio47", "gpio67"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) static const char * const blsp_spi10_cs2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) "gpio48", "gpio68"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) static const char * const uim2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) "gpio49", "gpio50", "gpio51", "gpio52"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) static const char * const blsp_spi9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) "gpio49", "gpio50", "gpio51", "gpio52"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static const char * const blsp_uart9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) "gpio49", "gpio50", "gpio51", "gpio52"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) static const char * const blsp_uim9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) "gpio49", "gpio50"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) static const char * const blsp_i2c9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) "gpio51", "gpio52"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static const char * const pci_e0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) "gpio53", "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) static const char * const uim4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) "gpio53", "gpio54", "gpio55", "gpio56"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) static const char * const blsp_spi10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) "gpio53", "gpio54", "gpio55", "gpio56"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) static const char * const blsp_uart10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) "gpio53", "gpio54", "gpio55", "gpio56"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static const char * const blsp_uim10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) "gpio53", "gpio54"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) static const char * const qdss_tracedata_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) "gpio53", "gpio54", "gpio63", "gpio64", "gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) "gpio66", "gpio67", "gpio74", "gpio75", "gpio76",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) "gpio77", "gpio85", "gpio86", "gpio87", "gpio89",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) "gpio90"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) static const char * const gp_pdm0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) "gpio54", "gpio95"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static const char * const blsp_i2c10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) "gpio55", "gpio56"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) static const char * const qdss_cti_trig_in_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) static const char * const qdss_cti_trig_out_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) static const char * const qua_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) static const char * const gcc_gp1_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) "gpio57"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) static const char * const gcc_gp2_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) "gpio58"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static const char * const gcc_gp3_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) "gpio59"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static const char * const blsp_spi2_cs1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) "gpio62"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static const char * const blsp_spi2_cs2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) "gpio63"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) static const char * const gp_pdm2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) "gpio63", "gpio79"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static const char * const pri_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) static const char * const blsp_spi2_cs3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) "gpio66"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static const char * const spkr_i2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) "gpio69", "gpio70", "gpio71", "gpio72"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) static const char * const audio_ref_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) "gpio69"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static const char * const slimbus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) "gpio70", "gpio71"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) static const char * const ter_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) "gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static const char * const gp_pdm1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) "gpio74", "gpio86"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) static const char * const sec_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) "gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) static const char * const gcc_gp1_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) "gpio78"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) static const char * const blsp_spi11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) "gpio81", "gpio82", "gpio83", "gpio84"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) static const char * const blsp_uart11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) "gpio81", "gpio82", "gpio83", "gpio84"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) static const char * const blsp_uim11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) "gpio81", "gpio82"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) static const char * const gcc_gp2_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) "gpio81"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) static const char * const gcc_gp3_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) "gpio82"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) static const char * const blsp_i2c11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) "gpio83", "gpio84"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) static const char * const blsp_uart12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) "gpio85", "gpio86", "gpio87", "gpio88"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static const char * const blsp_uim12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) "gpio85", "gpio86"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) static const char * const blsp_i2c12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) "gpio87", "gpio88"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) static const char * const blsp_spi12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) "gpio85", "gpio86", "gpio87", "gpio88"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) static const char * const tsif1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) "gpio89", "gpio90", "gpio91", "gpio110", "gpio111"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) static const char * const blsp_spi10_cs3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) "gpio90"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) static const char * const sdc4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) static const char * const qdss_traceclk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) static const char * const tsif2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) static const char * const qdss_tracectl_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) static const char * const qdss_cti_trig_out_d_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) "gpio95",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) static const char * const qdss_cti_trig_in_d_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) "gpio96",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static const char * const uim1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) "gpio97", "gpio98", "gpio99", "gpio100"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) static const char * const uim_batt_alarm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) "gpio101"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) static const char * const blsp11_uart_tx_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) "gpio111"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) static const char * const blsp11_uart_rx_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) "gpio112"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) static const char * const blsp11_i2c_sda_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) "gpio113"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) static const char * const blsp11_i2c_scl_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) "gpio114"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) static const char * const gsm_tx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) "gpio126", "gpio131", "gpio132", "gpio133"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) static const char * const nav_tsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) "gpio127"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) static const char * const nav_pps_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) "gpio127"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) static const char * const gps_tx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) "gpio130"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) static const char * const mss_lte_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) "gpio134", "gpio135"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static const struct msm_function msm8994_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) FUNCTION(audio_ref_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) FUNCTION(blsp_i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) FUNCTION(blsp_i2c2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) FUNCTION(blsp_i2c3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) FUNCTION(blsp_i2c4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) FUNCTION(blsp_i2c5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) FUNCTION(blsp_i2c6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) FUNCTION(blsp_i2c7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) FUNCTION(blsp_i2c8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) FUNCTION(blsp_i2c9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) FUNCTION(blsp_i2c10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) FUNCTION(blsp_i2c11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) FUNCTION(blsp_i2c12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) FUNCTION(blsp_spi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) FUNCTION(blsp_spi1_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) FUNCTION(blsp_spi1_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) FUNCTION(blsp_spi1_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) FUNCTION(blsp_spi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) FUNCTION(blsp_spi2_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) FUNCTION(blsp_spi2_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) FUNCTION(blsp_spi2_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) FUNCTION(blsp_spi3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) FUNCTION(blsp_spi4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) FUNCTION(blsp_spi5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) FUNCTION(blsp_spi6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) FUNCTION(blsp_spi7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) FUNCTION(blsp_spi8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) FUNCTION(blsp_spi9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) FUNCTION(blsp_spi10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) FUNCTION(blsp_spi10_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) FUNCTION(blsp_spi10_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) FUNCTION(blsp_spi10_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) FUNCTION(blsp_spi11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) FUNCTION(blsp_spi12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) FUNCTION(blsp_uart1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) FUNCTION(blsp_uart2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) FUNCTION(blsp_uart3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) FUNCTION(blsp_uart4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) FUNCTION(blsp_uart5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) FUNCTION(blsp_uart6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) FUNCTION(blsp_uart7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) FUNCTION(blsp_uart8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) FUNCTION(blsp_uart9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) FUNCTION(blsp_uart10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) FUNCTION(blsp_uart11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) FUNCTION(blsp_uart12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) FUNCTION(blsp_uim1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) FUNCTION(blsp_uim2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) FUNCTION(blsp_uim3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) FUNCTION(blsp_uim4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) FUNCTION(blsp_uim5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) FUNCTION(blsp_uim6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) FUNCTION(blsp_uim7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) FUNCTION(blsp_uim8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) FUNCTION(blsp_uim9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) FUNCTION(blsp_uim10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) FUNCTION(blsp_uim11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) FUNCTION(blsp_uim12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) FUNCTION(blsp11_i2c_scl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) FUNCTION(blsp11_i2c_sda_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) FUNCTION(blsp11_uart_rx_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) FUNCTION(blsp11_uart_tx_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) FUNCTION(cam_mclk0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) FUNCTION(cam_mclk1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) FUNCTION(cam_mclk2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) FUNCTION(cam_mclk3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) FUNCTION(cci_async_in0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) FUNCTION(cci_async_in1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) FUNCTION(cci_async_in2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) FUNCTION(cci_i2c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) FUNCTION(cci_i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) FUNCTION(cci_timer0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) FUNCTION(cci_timer1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) FUNCTION(cci_timer2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) FUNCTION(cci_timer3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) FUNCTION(cci_timer4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) FUNCTION(gcc_gp1_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) FUNCTION(gcc_gp1_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) FUNCTION(gcc_gp2_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) FUNCTION(gcc_gp2_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) FUNCTION(gcc_gp3_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) FUNCTION(gcc_gp3_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) FUNCTION(gp_mn),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) FUNCTION(gp_pdm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) FUNCTION(gp_pdm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) FUNCTION(gp_pdm2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) FUNCTION(gp0_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) FUNCTION(gp1_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) FUNCTION(gps_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) FUNCTION(gsm_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) FUNCTION(hdmi_cec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) FUNCTION(hdmi_ddc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) FUNCTION(hdmi_hpd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) FUNCTION(hdmi_rcv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) FUNCTION(mdp_vsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) FUNCTION(mss_lte),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) FUNCTION(nav_pps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) FUNCTION(nav_tsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) FUNCTION(qdss_cti_trig_in_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) FUNCTION(qdss_cti_trig_in_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) FUNCTION(qdss_cti_trig_in_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) FUNCTION(qdss_cti_trig_in_d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) FUNCTION(qdss_cti_trig_out_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) FUNCTION(qdss_cti_trig_out_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) FUNCTION(qdss_cti_trig_out_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) FUNCTION(qdss_cti_trig_out_d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) FUNCTION(qdss_traceclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) FUNCTION(qdss_traceclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) FUNCTION(qdss_tracectl_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) FUNCTION(qdss_tracectl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) FUNCTION(qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) FUNCTION(qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) FUNCTION(qua_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) FUNCTION(pci_e0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) FUNCTION(pci_e1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) FUNCTION(pri_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) FUNCTION(sdc4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) FUNCTION(sec_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) FUNCTION(slimbus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) FUNCTION(spkr_i2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) FUNCTION(ter_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) FUNCTION(tsif1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) FUNCTION(tsif2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) FUNCTION(uim_batt_alarm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) FUNCTION(uim1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) FUNCTION(uim2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) FUNCTION(uim3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) FUNCTION(uim4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) static const struct msm_pingroup msm8994_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, hdmi_rcv, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_out_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_in_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) PINGROUP(10, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) PINGROUP(11, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) PINGROUP(13, cam_mclk0, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) PINGROUP(14, cam_mclk1, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) PINGROUP(15, cam_mclk2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) PINGROUP(16, cam_mclk3, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) PINGROUP(17, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) PINGROUP(18, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) PINGROUP(19, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) PINGROUP(20, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) PINGROUP(21, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) PINGROUP(22, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) PINGROUP(23, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) qdss_tracedata_b, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) PINGROUP(24, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) blsp_i2c5, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) PINGROUP(25, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) blsp_uim6, NA, NA, qdss_tracedata_b, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) PINGROUP(26, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, gp0_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) NA, qdss_tracedata_b, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) PINGROUP(27, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) qdss_tracectl_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) PINGROUP(28, blsp_spi6, blsp_uart6, blsp_i2c6, qdss_traceclk_a, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) PINGROUP(29, gp_mn, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) PINGROUP(30, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) PINGROUP(35, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) PINGROUP(36, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) PINGROUP(37, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) PINGROUP(38, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) PINGROUP(41, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_out_c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) PINGROUP(42, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_in_c, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) PINGROUP(43, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) PINGROUP(44, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) PINGROUP(53, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) NA, qdss_tracedata_a, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) PINGROUP(54, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) gp_pdm0, NA, NA, qdss_tracedata_a, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) PINGROUP(55, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) qdss_cti_trig_in_a, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) PINGROUP(56, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) qdss_cti_trig_out_a, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) PINGROUP(57, qua_mi2s, gcc_gp1_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) PINGROUP(58, qua_mi2s, gcc_gp2_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) PINGROUP(59, qua_mi2s, gcc_gp3_clk_a, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) qdss_tracedata_a, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) PINGROUP(64, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) PINGROUP(65, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) PINGROUP(68, pri_mi2s, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) PINGROUP(69, spkr_i2s, audio_ref_clk, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) PINGROUP(70, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) PINGROUP(71, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) PINGROUP(72, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, qdss_tracedata_a, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) PINGROUP(75, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) PINGROUP(76, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) PINGROUP(77, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) PINGROUP(78, sec_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) gcc_gp2_clk_b, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) gcc_gp3_clk_b, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) qdss_tracedata_a, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) qdss_tracedata_a, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) PINGROUP(89, tsif1, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) PINGROUP(90, tsif1, blsp_spi10_cs3, qdss_tracedata_a, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, qdss_traceclk_b, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) PINGROUP(92, tsif2, sdc4, NA, NA, qdss_tracedata_b, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, qdss_tracedata_b, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, qdss_tracectl_b, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) PINGROUP(95, tsif2, sdc4, gp_pdm0, NA, NA, NA, qdss_cti_trig_out_d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) PINGROUP(96, tsif2, sdc4, qdss_cti_trig_in_d, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) PINGROUP(102, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) PINGROUP(103, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) PINGROUP(105, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) PINGROUP(106, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) PINGROUP(107, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) PINGROUP(108, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) PINGROUP(109, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) PINGROUP(110, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) PINGROUP(111, tsif1, blsp11_uart_tx_b, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) PINGROUP(112, blsp11_uart_rx_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) PINGROUP(113, blsp11_i2c_sda_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) PINGROUP(114, blsp11_i2c_scl_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) PINGROUP(115, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) PINGROUP(116, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) PINGROUP(117, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) PINGROUP(118, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) PINGROUP(119, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) PINGROUP(120, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) PINGROUP(121, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) PINGROUP(122, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) PINGROUP(123, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) PINGROUP(124, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) PINGROUP(126, NA, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) PINGROUP(127, NA, nav_tsync, nav_pps, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) PINGROUP(128, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) PINGROUP(130, gps_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) PINGROUP(131, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) PINGROUP(132, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) PINGROUP(133, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) PINGROUP(134, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) PINGROUP(135, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) PINGROUP(140, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) PINGROUP(141, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) PINGROUP(144, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) PINGROUP(145, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) SDC_PINGROUP(sdc1_rclk, 0x2044, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) SDC_PINGROUP(sdc3_clk, 0x206c, 14, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) SDC_PINGROUP(sdc3_cmd, 0x206c, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) SDC_PINGROUP(sdc3_data, 0x206c, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) #define NUM_GPIO_PINGROUPS 146
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) static const struct msm_pinctrl_soc_data msm8994_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) .pins = msm8994_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) .npins = ARRAY_SIZE(msm8994_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) .functions = msm8994_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) .nfunctions = ARRAY_SIZE(msm8994_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) .groups = msm8994_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) .ngroups = ARRAY_SIZE(msm8994_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) .ngpios = NUM_GPIO_PINGROUPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) static int msm8994_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) return msm_pinctrl_probe(pdev, &msm8994_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) static const struct of_device_id msm8994_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) { .compatible = "qcom,msm8992-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) { .compatible = "qcom,msm8994-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) static struct platform_driver msm8994_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) .name = "msm8994-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) .of_match_table = msm8994_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) .probe = msm8994_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) .remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) static int __init msm8994_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) return platform_driver_register(&msm8994_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) arch_initcall(msm8994_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) static void __exit msm8994_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) platform_driver_unregister(&msm8994_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) module_exit(msm8994_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) MODULE_DESCRIPTION("Qualcomm MSM8994 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) MODULE_DEVICE_TABLE(of, msm8994_pinctrl_of_match);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags