^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2016, AngeloGioacchino Del Regno <kholk11@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) [msm_mux_##fname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define REG_BASE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REG_SIZE 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .name = "gpio" #id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .pins = gpio##id##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .npins = ARRAY_SIZE(gpio##id##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .funcs = (int[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) msm_mux_gpio, /* gpio mode */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) msm_mux_##f1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) msm_mux_##f2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) msm_mux_##f3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) msm_mux_##f4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) msm_mux_##f5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) msm_mux_##f6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) msm_mux_##f7, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) msm_mux_##f8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) msm_mux_##f9 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .nfuncs = 10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .ctl_reg = REG_BASE + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .mux_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .pull_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .drv_bit = 6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .oe_bit = 9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .in_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .out_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .intr_enable_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .intr_status_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .intr_target_bit = 5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .intr_target_kpss_val = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .intr_raw_status_bit = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .intr_polarity_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .intr_detection_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .intr_detection_width = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .name = #pg_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .pins = pg_name##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .npins = ARRAY_SIZE(pg_name##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .ctl_reg = ctl, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .io_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .intr_cfg_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .intr_status_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .intr_target_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .mux_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .pull_bit = pull, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .drv_bit = drv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .oe_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .in_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .out_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .intr_enable_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .intr_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .intr_target_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .intr_raw_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .intr_polarity_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .intr_detection_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .intr_detection_width = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static const struct pinctrl_pin_desc msm8976_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) PINCTRL_PIN(70, "GPIO_70"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) PINCTRL_PIN(71, "GPIO_71"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) PINCTRL_PIN(72, "GPIO_72"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) PINCTRL_PIN(73, "GPIO_73"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PINCTRL_PIN(74, "GPIO_74"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) PINCTRL_PIN(75, "GPIO_75"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) PINCTRL_PIN(76, "GPIO_76"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PINCTRL_PIN(77, "GPIO_77"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PINCTRL_PIN(78, "GPIO_78"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) PINCTRL_PIN(79, "GPIO_79"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) PINCTRL_PIN(80, "GPIO_80"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) PINCTRL_PIN(81, "GPIO_81"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) PINCTRL_PIN(82, "GPIO_82"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) PINCTRL_PIN(83, "GPIO_83"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PINCTRL_PIN(84, "GPIO_84"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) PINCTRL_PIN(85, "GPIO_85"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PINCTRL_PIN(86, "GPIO_86"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PINCTRL_PIN(87, "GPIO_87"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) PINCTRL_PIN(88, "GPIO_88"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) PINCTRL_PIN(89, "GPIO_89"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PINCTRL_PIN(90, "GPIO_90"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PINCTRL_PIN(91, "GPIO_91"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PINCTRL_PIN(92, "GPIO_92"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PINCTRL_PIN(93, "GPIO_93"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PINCTRL_PIN(94, "GPIO_94"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PINCTRL_PIN(95, "GPIO_95"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PINCTRL_PIN(96, "GPIO_96"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PINCTRL_PIN(97, "GPIO_97"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINCTRL_PIN(98, "GPIO_98"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PINCTRL_PIN(99, "GPIO_99"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) PINCTRL_PIN(100, "GPIO_100"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PINCTRL_PIN(101, "GPIO_101"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PINCTRL_PIN(102, "GPIO_102"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PINCTRL_PIN(103, "GPIO_103"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PINCTRL_PIN(104, "GPIO_104"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PINCTRL_PIN(105, "GPIO_105"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) PINCTRL_PIN(106, "GPIO_106"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PINCTRL_PIN(107, "GPIO_107"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PINCTRL_PIN(108, "GPIO_108"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PINCTRL_PIN(109, "GPIO_109"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PINCTRL_PIN(110, "GPIO_110"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PINCTRL_PIN(111, "GPIO_111"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PINCTRL_PIN(112, "GPIO_112"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PINCTRL_PIN(113, "GPIO_113"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PINCTRL_PIN(114, "GPIO_114"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PINCTRL_PIN(115, "GPIO_115"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINCTRL_PIN(116, "GPIO_116"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) PINCTRL_PIN(117, "GPIO_117"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PINCTRL_PIN(118, "GPIO_118"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PINCTRL_PIN(119, "GPIO_119"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) PINCTRL_PIN(120, "GPIO_120"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PINCTRL_PIN(121, "GPIO_121"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PINCTRL_PIN(122, "GPIO_122"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PINCTRL_PIN(123, "GPIO_123"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PINCTRL_PIN(124, "GPIO_124"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) PINCTRL_PIN(125, "GPIO_125"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PINCTRL_PIN(126, "GPIO_126"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) PINCTRL_PIN(127, "GPIO_127"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PINCTRL_PIN(128, "GPIO_128"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PINCTRL_PIN(129, "GPIO_129"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PINCTRL_PIN(130, "GPIO_130"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PINCTRL_PIN(131, "GPIO_131"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) PINCTRL_PIN(132, "GPIO_132"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PINCTRL_PIN(133, "GPIO_133"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) PINCTRL_PIN(134, "GPIO_134"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PINCTRL_PIN(135, "GPIO_135"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) PINCTRL_PIN(136, "GPIO_136"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) PINCTRL_PIN(137, "GPIO_137"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) PINCTRL_PIN(138, "GPIO_138"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) PINCTRL_PIN(139, "GPIO_139"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) PINCTRL_PIN(140, "GPIO_140"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) PINCTRL_PIN(141, "GPIO_141"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) PINCTRL_PIN(142, "GPIO_142"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) PINCTRL_PIN(143, "GPIO_143"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) PINCTRL_PIN(144, "GPIO_144"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) PINCTRL_PIN(145, "SDC1_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) PINCTRL_PIN(146, "SDC1_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) PINCTRL_PIN(147, "SDC1_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) PINCTRL_PIN(148, "SDC1_RCLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) PINCTRL_PIN(149, "SDC2_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) PINCTRL_PIN(150, "SDC2_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) PINCTRL_PIN(151, "SDC2_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) PINCTRL_PIN(152, "QDSD_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) PINCTRL_PIN(153, "QDSD_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) PINCTRL_PIN(154, "QDSD_DATA0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) PINCTRL_PIN(155, "QDSD_DATA1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) PINCTRL_PIN(156, "QDSD_DATA2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) PINCTRL_PIN(157, "QDSD_DATA3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define DECLARE_MSM_GPIO_PINS(pin) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) DECLARE_MSM_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) DECLARE_MSM_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) DECLARE_MSM_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) DECLARE_MSM_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) DECLARE_MSM_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) DECLARE_MSM_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) DECLARE_MSM_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DECLARE_MSM_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) DECLARE_MSM_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) DECLARE_MSM_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) DECLARE_MSM_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) DECLARE_MSM_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) DECLARE_MSM_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) DECLARE_MSM_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) DECLARE_MSM_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) DECLARE_MSM_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) DECLARE_MSM_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) DECLARE_MSM_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) DECLARE_MSM_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) DECLARE_MSM_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) DECLARE_MSM_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) DECLARE_MSM_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) DECLARE_MSM_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) DECLARE_MSM_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) DECLARE_MSM_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) DECLARE_MSM_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) DECLARE_MSM_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) DECLARE_MSM_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) DECLARE_MSM_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) DECLARE_MSM_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) DECLARE_MSM_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) DECLARE_MSM_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) DECLARE_MSM_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) DECLARE_MSM_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) DECLARE_MSM_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) DECLARE_MSM_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) DECLARE_MSM_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) DECLARE_MSM_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) DECLARE_MSM_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) DECLARE_MSM_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) DECLARE_MSM_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) DECLARE_MSM_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) DECLARE_MSM_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) DECLARE_MSM_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) DECLARE_MSM_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) DECLARE_MSM_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) DECLARE_MSM_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) DECLARE_MSM_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) DECLARE_MSM_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) DECLARE_MSM_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) DECLARE_MSM_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) DECLARE_MSM_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) DECLARE_MSM_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) DECLARE_MSM_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) DECLARE_MSM_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) DECLARE_MSM_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) DECLARE_MSM_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) DECLARE_MSM_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) DECLARE_MSM_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) DECLARE_MSM_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) DECLARE_MSM_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) DECLARE_MSM_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) DECLARE_MSM_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) DECLARE_MSM_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) DECLARE_MSM_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) DECLARE_MSM_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) DECLARE_MSM_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) DECLARE_MSM_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) DECLARE_MSM_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) DECLARE_MSM_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) DECLARE_MSM_GPIO_PINS(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) DECLARE_MSM_GPIO_PINS(71);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) DECLARE_MSM_GPIO_PINS(72);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) DECLARE_MSM_GPIO_PINS(73);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) DECLARE_MSM_GPIO_PINS(74);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) DECLARE_MSM_GPIO_PINS(75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) DECLARE_MSM_GPIO_PINS(76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) DECLARE_MSM_GPIO_PINS(77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) DECLARE_MSM_GPIO_PINS(78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) DECLARE_MSM_GPIO_PINS(79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) DECLARE_MSM_GPIO_PINS(80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) DECLARE_MSM_GPIO_PINS(81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) DECLARE_MSM_GPIO_PINS(82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) DECLARE_MSM_GPIO_PINS(83);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) DECLARE_MSM_GPIO_PINS(84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) DECLARE_MSM_GPIO_PINS(85);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) DECLARE_MSM_GPIO_PINS(86);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) DECLARE_MSM_GPIO_PINS(87);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) DECLARE_MSM_GPIO_PINS(88);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) DECLARE_MSM_GPIO_PINS(89);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) DECLARE_MSM_GPIO_PINS(90);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) DECLARE_MSM_GPIO_PINS(91);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) DECLARE_MSM_GPIO_PINS(92);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) DECLARE_MSM_GPIO_PINS(93);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) DECLARE_MSM_GPIO_PINS(94);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) DECLARE_MSM_GPIO_PINS(95);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) DECLARE_MSM_GPIO_PINS(96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) DECLARE_MSM_GPIO_PINS(97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) DECLARE_MSM_GPIO_PINS(98);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) DECLARE_MSM_GPIO_PINS(99);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) DECLARE_MSM_GPIO_PINS(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) DECLARE_MSM_GPIO_PINS(101);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) DECLARE_MSM_GPIO_PINS(102);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) DECLARE_MSM_GPIO_PINS(103);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) DECLARE_MSM_GPIO_PINS(104);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) DECLARE_MSM_GPIO_PINS(105);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) DECLARE_MSM_GPIO_PINS(106);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) DECLARE_MSM_GPIO_PINS(107);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) DECLARE_MSM_GPIO_PINS(108);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) DECLARE_MSM_GPIO_PINS(109);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) DECLARE_MSM_GPIO_PINS(110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) DECLARE_MSM_GPIO_PINS(111);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) DECLARE_MSM_GPIO_PINS(112);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) DECLARE_MSM_GPIO_PINS(113);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) DECLARE_MSM_GPIO_PINS(114);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) DECLARE_MSM_GPIO_PINS(115);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) DECLARE_MSM_GPIO_PINS(116);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) DECLARE_MSM_GPIO_PINS(117);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) DECLARE_MSM_GPIO_PINS(118);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) DECLARE_MSM_GPIO_PINS(119);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) DECLARE_MSM_GPIO_PINS(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) DECLARE_MSM_GPIO_PINS(121);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) DECLARE_MSM_GPIO_PINS(122);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) DECLARE_MSM_GPIO_PINS(123);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) DECLARE_MSM_GPIO_PINS(124);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) DECLARE_MSM_GPIO_PINS(125);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) DECLARE_MSM_GPIO_PINS(126);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) DECLARE_MSM_GPIO_PINS(127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) DECLARE_MSM_GPIO_PINS(128);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) DECLARE_MSM_GPIO_PINS(129);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) DECLARE_MSM_GPIO_PINS(130);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) DECLARE_MSM_GPIO_PINS(131);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) DECLARE_MSM_GPIO_PINS(132);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) DECLARE_MSM_GPIO_PINS(133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) DECLARE_MSM_GPIO_PINS(134);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) DECLARE_MSM_GPIO_PINS(135);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) DECLARE_MSM_GPIO_PINS(136);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) DECLARE_MSM_GPIO_PINS(137);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) DECLARE_MSM_GPIO_PINS(138);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) DECLARE_MSM_GPIO_PINS(139);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) DECLARE_MSM_GPIO_PINS(140);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) DECLARE_MSM_GPIO_PINS(141);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) DECLARE_MSM_GPIO_PINS(142);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) DECLARE_MSM_GPIO_PINS(143);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) DECLARE_MSM_GPIO_PINS(144);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static const unsigned int sdc1_clk_pins[] = { 145 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static const unsigned int sdc1_cmd_pins[] = { 146 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static const unsigned int sdc1_data_pins[] = { 147 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static const unsigned int sdc1_rclk_pins[] = { 148 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static const unsigned int sdc2_clk_pins[] = { 149 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static const unsigned int sdc2_cmd_pins[] = { 150 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static const unsigned int sdc2_data_pins[] = { 151 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static const unsigned int qdsd_clk_pins[] = { 152 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static const unsigned int qdsd_cmd_pins[] = { 153 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static const unsigned int qdsd_data0_pins[] = { 154 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static const unsigned int qdsd_data1_pins[] = { 155 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static const unsigned int qdsd_data2_pins[] = { 156 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static const unsigned int qdsd_data3_pins[] = { 157 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) enum msm8976_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) msm_mux_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) msm_mux_blsp_uart1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) msm_mux_blsp_spi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) msm_mux_smb_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) msm_mux_blsp_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) msm_mux_blsp_spi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) msm_mux_blsp_uart2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) msm_mux_blsp_i2c2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) msm_mux_gcc_gp1_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) msm_mux_blsp_spi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) msm_mux_qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) msm_mux_blsp_i2c3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) msm_mux_gcc_gp2_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) msm_mux_gcc_gp3_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) msm_mux_blsp_spi4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) msm_mux_cap_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) msm_mux_blsp_i2c4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) msm_mux_blsp_spi5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) msm_mux_blsp_uart5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) msm_mux_qdss_traceclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) msm_mux_m_voc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) msm_mux_blsp_i2c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) msm_mux_qdss_tracectl_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) msm_mux_qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) msm_mux_blsp_spi6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) msm_mux_blsp_uart6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) msm_mux_qdss_tracectl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) msm_mux_blsp_i2c6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) msm_mux_qdss_traceclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) msm_mux_mdp_vsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) msm_mux_pri_mi2s_mclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) msm_mux_sec_mi2s_mclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) msm_mux_cam_mclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) msm_mux_cci0_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) msm_mux_cci1_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) msm_mux_blsp1_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) msm_mux_blsp3_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) msm_mux_gcc_gp1_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) msm_mux_gcc_gp2_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) msm_mux_gcc_gp3_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) msm_mux_uim_batt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) msm_mux_sd_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) msm_mux_uim1_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) msm_mux_uim1_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) msm_mux_uim1_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) msm_mux_uim1_present,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) msm_mux_uim2_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) msm_mux_uim2_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) msm_mux_uim2_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) msm_mux_uim2_present,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) msm_mux_ts_xvdd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) msm_mux_mipi_dsi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) msm_mux_us_euro,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) msm_mux_ts_resout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) msm_mux_ts_sample,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) msm_mux_sec_mi2s_mclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) msm_mux_pri_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) msm_mux_codec_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) msm_mux_cdc_pdm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) msm_mux_us_emitter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) msm_mux_pri_mi2s_mclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) msm_mux_pri_mi2s_mclk_c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) msm_mux_lpass_slimbus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) msm_mux_lpass_slimbus0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) msm_mux_lpass_slimbus1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) msm_mux_codec_int1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) msm_mux_codec_int2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) msm_mux_wcss_bt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) msm_mux_sdc3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) msm_mux_wcss_wlan2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) msm_mux_wcss_wlan1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) msm_mux_wcss_wlan0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) msm_mux_wcss_wlan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) msm_mux_wcss_fm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) msm_mux_key_volp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) msm_mux_key_snapshot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) msm_mux_key_focus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) msm_mux_key_home,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) msm_mux_pwr_down,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) msm_mux_dmic0_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) msm_mux_hdmi_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) msm_mux_dmic0_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) msm_mux_wsa_vi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) msm_mux_wsa_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) msm_mux_blsp_spi8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) msm_mux_wsa_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) msm_mux_blsp_i2c8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) msm_mux_pa_indicator,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) msm_mux_modem_tsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) msm_mux_ssbi_wtr1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) msm_mux_gsm1_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) msm_mux_gsm0_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) msm_mux_sdcard_det,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) msm_mux_sec_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) msm_mux_ss_switch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) msm_mux_NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) "gpio141", "gpio142", "gpio143", "gpio144",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static const char * const blsp_uart1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) "gpio0", "gpio1", "gpio2", "gpio3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static const char * const blsp_spi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) "gpio0", "gpio1", "gpio2", "gpio3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static const char * const smb_int_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) "gpio1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static const char * const blsp_i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) "gpio2", "gpio3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static const char * const blsp_spi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static const char * const blsp_uart2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static const char * const blsp_i2c2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) static const char * const gcc_gp1_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) "gpio105",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static const char * const blsp_spi3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) "gpio8", "gpio9", "gpio10", "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) static const char * const qdss_tracedata_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) "gpio26", "gpio27", "gpio28", "gpio29", "gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) "gpio31", "gpio33", "gpio34", "gpio35", "gpio36", "gpio37", "gpio38",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) "gpio116", "gpio126", "gpio128", "gpio129",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static const char * const blsp_i2c3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) "gpio10", "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) static const char * const gcc_gp2_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) "gpio12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static const char * const gcc_gp3_clk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) "gpio13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) static const char * const blsp_spi4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) "gpio12", "gpio13", "gpio14", "gpio15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static const char * const cap_int_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) "gpio13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static const char * const blsp_i2c4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) "gpio14", "gpio15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static const char * const blsp_spi5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) "gpio134", "gpio135", "gpio136", "gpio137",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) static const char * const blsp_uart5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) "gpio134", "gpio135", "gpio136", "gpio137",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) static const char * const qdss_traceclk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static const char * const m_voc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) "gpio123", "gpio124",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) static const char * const blsp_i2c5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) "gpio136", "gpio137",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static const char * const qdss_tracectl_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static const char * const qdss_tracedata_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) "gpio8", "gpio9", "gpio10", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) "gpio43", "gpio44", "gpio47", "gpio48", "gpio62", "gpio69", "gpio120",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) "gpio121", "gpio130", "gpio131",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static const char * const blsp_spi6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) "gpio20", "gpio21", "gpio22", "gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) static const char * const blsp_uart6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) "gpio20", "gpio21", "gpio22", "gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) static const char * const qdss_tracectl_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static const char * const blsp_i2c6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) "gpio22", "gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static const char * const qdss_traceclk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) static const char * const mdp_vsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) "gpio24", "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static const char * const pri_mi2s_mclk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) "gpio126",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static const char * const sec_mi2s_mclk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static const char * const cam_mclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static const char * const cci0_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) "gpio30", "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) static const char * const cci1_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) "gpio104", "gpio103",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static const char * const blsp1_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) "gpio101",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static const char * const blsp3_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) "gpio106", "gpio107",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static const char * const gcc_gp1_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static const char * const gcc_gp2_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static const char * const gcc_gp3_clk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) static const char * const uim_batt_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static const char * const sd_write_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) static const char * const uim2_data_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static const char * const uim2_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static const char * const uim2_reset_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static const char * const uim2_present_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static const char * const uim1_data_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static const char * const uim1_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static const char * const uim1_reset_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static const char * const uim1_present_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) static const char * const ts_xvdd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) static const char * const mipi_dsi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) static const char * const us_euro_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) static const char * const ts_resout_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) "gpio64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) static const char * const ts_sample_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) "gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) static const char * const sec_mi2s_mclk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) static const char * const pri_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) "gpio122", "gpio123", "gpio124", "gpio125", "gpio127",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) static const char * const codec_reset_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) static const char * const cdc_pdm0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) static const char * const us_emitter_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static const char * const pri_mi2s_mclk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) static const char * const pri_mi2s_mclk_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) static const char * const lpass_slimbus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) "gpio117",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static const char * const lpass_slimbus0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) "gpio118",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static const char * const lpass_slimbus1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) "gpio119",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) static const char * const codec_int1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) "gpio73",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) static const char * const codec_int2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) "gpio74",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const char * const wcss_bt_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) "gpio39", "gpio47", "gpio88",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) static const char * const sdc3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) "gpio39", "gpio40", "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) "gpio42", "gpio43", "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) static const char * const wcss_wlan2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) "gpio40",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static const char * const wcss_wlan1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) static const char * const wcss_wlan0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static const char * const wcss_wlan_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) "gpio43", "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) static const char * const wcss_fm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) "gpio45", "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) static const char * const key_volp_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) "gpio85",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static const char * const key_snapshot_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) "gpio86",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) static const char * const key_focus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) "gpio87",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) static const char * const key_home_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) "gpio88",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) static const char * const pwr_down_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) "gpio89",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) static const char * const dmic0_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static const char * const hdmi_int_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) "gpio90",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) static const char * const dmic0_data_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) static const char * const wsa_vi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) "gpio108", "gpio109",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static const char * const wsa_en_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) "gpio96",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) static const char * const blsp_spi8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) "gpio16", "gpio17", "gpio18", "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) static const char * const wsa_irq_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) "gpio97",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) static const char * const blsp_i2c8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) "gpio18", "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static const char * const pa_indicator_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) "gpio92",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) static const char * const modem_tsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) "gpio93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) static const char * const ssbi_wtr1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) "gpio79", "gpio94",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) static const char * const gsm1_tx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) "gpio95",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static const char * const gsm0_tx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) "gpio99",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) static const char * const sdcard_det_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) "gpio133",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) static const char * const sec_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) "gpio102", "gpio105", "gpio134", "gpio135",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) static const char * const ss_switch_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) "gpio139",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) static const struct msm_function msm8976_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) FUNCTION(blsp_spi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) FUNCTION(smb_int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) FUNCTION(blsp_i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) FUNCTION(blsp_spi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) FUNCTION(blsp_uart1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) FUNCTION(blsp_uart2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) FUNCTION(blsp_i2c2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) FUNCTION(gcc_gp1_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) FUNCTION(blsp_spi3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) FUNCTION(qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) FUNCTION(blsp_i2c3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) FUNCTION(gcc_gp2_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) FUNCTION(gcc_gp3_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) FUNCTION(blsp_spi4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) FUNCTION(cap_int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) FUNCTION(blsp_i2c4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) FUNCTION(blsp_spi5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) FUNCTION(blsp_uart5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) FUNCTION(qdss_traceclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) FUNCTION(m_voc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) FUNCTION(blsp_i2c5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) FUNCTION(qdss_tracectl_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) FUNCTION(qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) FUNCTION(blsp_spi6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) FUNCTION(blsp_uart6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) FUNCTION(qdss_tracectl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) FUNCTION(blsp_i2c6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) FUNCTION(qdss_traceclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) FUNCTION(mdp_vsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) FUNCTION(pri_mi2s_mclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) FUNCTION(sec_mi2s_mclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) FUNCTION(cam_mclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) FUNCTION(cci0_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) FUNCTION(cci1_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) FUNCTION(blsp1_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) FUNCTION(blsp3_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) FUNCTION(gcc_gp1_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) FUNCTION(gcc_gp2_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) FUNCTION(gcc_gp3_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) FUNCTION(uim_batt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) FUNCTION(sd_write),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) FUNCTION(uim1_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) FUNCTION(uim1_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) FUNCTION(uim1_reset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) FUNCTION(uim1_present),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) FUNCTION(uim2_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) FUNCTION(uim2_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) FUNCTION(uim2_reset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) FUNCTION(uim2_present),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) FUNCTION(ts_xvdd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) FUNCTION(mipi_dsi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) FUNCTION(us_euro),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) FUNCTION(ts_resout),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) FUNCTION(ts_sample),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) FUNCTION(sec_mi2s_mclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) FUNCTION(pri_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) FUNCTION(codec_reset),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) FUNCTION(cdc_pdm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) FUNCTION(us_emitter),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) FUNCTION(pri_mi2s_mclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) FUNCTION(pri_mi2s_mclk_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) FUNCTION(lpass_slimbus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) FUNCTION(lpass_slimbus0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) FUNCTION(lpass_slimbus1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) FUNCTION(codec_int1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) FUNCTION(codec_int2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) FUNCTION(wcss_bt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) FUNCTION(sdc3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) FUNCTION(wcss_wlan2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) FUNCTION(wcss_wlan1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) FUNCTION(wcss_wlan0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) FUNCTION(wcss_wlan),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) FUNCTION(wcss_fm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) FUNCTION(key_volp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) FUNCTION(key_snapshot),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) FUNCTION(key_focus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) FUNCTION(key_home),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) FUNCTION(pwr_down),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) FUNCTION(dmic0_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) FUNCTION(hdmi_int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) FUNCTION(dmic0_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) FUNCTION(wsa_vi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) FUNCTION(wsa_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) FUNCTION(blsp_spi8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) FUNCTION(wsa_irq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) FUNCTION(blsp_i2c8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) FUNCTION(pa_indicator),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) FUNCTION(modem_tsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) FUNCTION(ssbi_wtr1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) FUNCTION(gsm1_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) FUNCTION(gsm0_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) FUNCTION(sdcard_det),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) FUNCTION(sec_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) FUNCTION(ss_switch),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) static const struct msm_pingroup msm8976_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) PINGROUP(0, blsp_spi1, blsp_uart1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) PINGROUP(1, blsp_spi1, blsp_uart1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) PINGROUP(4, blsp_spi2, blsp_uart2, NA, NA, NA, qdss_tracectl_b, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) PINGROUP(5, blsp_spi2, blsp_uart2, NA, NA, NA, qdss_traceclk_b, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) PINGROUP(8, blsp_spi3, NA, NA, NA, NA, qdss_tracedata_a, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) PINGROUP(9, blsp_spi3, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) PINGROUP(10, blsp_spi3, NA, blsp_i2c3, NA, NA, qdss_tracedata_a, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) PINGROUP(11, blsp_spi3, NA, blsp_i2c3, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) PINGROUP(12, blsp_spi4, NA, gcc_gp2_clk_b, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) PINGROUP(13, blsp_spi4, NA, gcc_gp3_clk_b, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) PINGROUP(14, blsp_spi4, NA, blsp_i2c4, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) PINGROUP(15, blsp_spi4, NA, blsp_i2c4, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) PINGROUP(16, blsp_spi8, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) PINGROUP(17, blsp_spi8, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) PINGROUP(18, blsp_spi8, NA, blsp_i2c8, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) PINGROUP(19, blsp_spi8, NA, blsp_i2c8, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) PINGROUP(20, blsp_spi6, blsp_uart6, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) PINGROUP(21, blsp_spi6, blsp_uart6, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) PINGROUP(22, blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) PINGROUP(23, blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) PINGROUP(24, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) PINGROUP(25, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) PINGROUP(26, cam_mclk, NA, NA, NA, NA, qdss_tracedata_b, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) PINGROUP(27, cam_mclk, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) PINGROUP(28, cam_mclk, NA, NA, NA, NA, qdss_tracedata_b, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) PINGROUP(29, cci0_i2c, NA, NA, NA, NA, qdss_tracedata_b, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) PINGROUP(30, cci0_i2c, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) PINGROUP(33, NA, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) PINGROUP(34, NA, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) PINGROUP(35, NA, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) PINGROUP(36, NA, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) PINGROUP(37, NA, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) PINGROUP(39, wcss_bt, sdc3, NA, qdss_tracedata_a, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) PINGROUP(40, wcss_wlan, sdc3, NA, qdss_tracedata_a, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) PINGROUP(41, wcss_wlan, sdc3, NA, qdss_tracedata_a, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) PINGROUP(42, wcss_wlan, sdc3, NA, qdss_tracedata_a, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) PINGROUP(43, wcss_wlan, sdc3, NA, NA, qdss_tracedata_a, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) PINGROUP(44, wcss_wlan, sdc3, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) PINGROUP(45, wcss_fm, NA, qdss_tracectl_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) PINGROUP(46, wcss_fm, NA, NA, qdss_traceclk_a, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) PINGROUP(47, wcss_bt, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) PINGROUP(48, wcss_bt, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) PINGROUP(49, NA, NA, gcc_gp1_clk_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) PINGROUP(50, NA, sd_write, gcc_gp2_clk_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) PINGROUP(51, uim2_data, gcc_gp3_clk_a, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) PINGROUP(52, uim2_clk, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) PINGROUP(53, uim2_reset, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) PINGROUP(54, uim2_present, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) PINGROUP(55, uim1_data, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) PINGROUP(56, uim1_clk, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) PINGROUP(57, uim1_reset, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) PINGROUP(58, uim1_present, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) PINGROUP(59, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) PINGROUP(60, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) PINGROUP(61, uim_batt, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) PINGROUP(62, sec_mi2s_mclk_a, pri_mi2s_mclk_b, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) PINGROUP(66, dmic0_clk, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) PINGROUP(67, dmic0_data, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) PINGROUP(69, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) PINGROUP(79, NA, ssbi_wtr1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) PINGROUP(92, NA, NA, pa_indicator, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) PINGROUP(93, NA, modem_tsync, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) PINGROUP(94, NA, ssbi_wtr1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) PINGROUP(95, NA, gsm1_tx, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) PINGROUP(98, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) PINGROUP(99, gsm0_tx, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) PINGROUP(100, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) PINGROUP(101, blsp1_spi, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) PINGROUP(102, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) PINGROUP(103, cci1_i2c, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) PINGROUP(104, cci1_i2c, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) PINGROUP(105, sec_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) PINGROUP(106, blsp3_spi, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) PINGROUP(107, blsp3_spi, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) PINGROUP(108, wsa_vi, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) PINGROUP(109, wsa_vi, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) PINGROUP(110, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) PINGROUP(111, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) PINGROUP(112, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) PINGROUP(113, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) PINGROUP(114, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) PINGROUP(115, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) PINGROUP(116, pri_mi2s_mclk_c, cdc_pdm0, NA, NA, NA, qdss_tracedata_b, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) PINGROUP(117, lpass_slimbus, cdc_pdm0, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) PINGROUP(118, lpass_slimbus0, cdc_pdm0, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) PINGROUP(119, lpass_slimbus1, cdc_pdm0, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) PINGROUP(120, cdc_pdm0, NA, NA, NA, NA, NA, NA, qdss_tracedata_a, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) PINGROUP(121, cdc_pdm0, NA, NA, NA, NA, NA, NA, qdss_tracedata_a, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) PINGROUP(122, pri_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) PINGROUP(123, pri_mi2s, m_voc, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) PINGROUP(124, pri_mi2s, m_voc, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) PINGROUP(125, pri_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) PINGROUP(126, pri_mi2s_mclk_a, sec_mi2s_mclk_b, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) PINGROUP(127, pri_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) PINGROUP(128, NA, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) PINGROUP(129, qdss_tracedata_b, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) PINGROUP(130, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) PINGROUP(131, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) PINGROUP(132, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) PINGROUP(133, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) PINGROUP(134, blsp_spi5, blsp_uart5, sec_mi2s, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) PINGROUP(135, blsp_spi5, blsp_uart5, sec_mi2s, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) PINGROUP(136, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) PINGROUP(137, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) PINGROUP(140, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) PINGROUP(141, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) PINGROUP(144, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) SDC_QDSD_PINGROUP(sdc1_clk, 0x10a000, 13, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) SDC_QDSD_PINGROUP(sdc1_cmd, 0x10a000, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) SDC_QDSD_PINGROUP(sdc1_data, 0x10a000, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) SDC_QDSD_PINGROUP(sdc1_rclk, 0x10a000, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) SDC_QDSD_PINGROUP(sdc2_clk, 0x109000, 14, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) SDC_QDSD_PINGROUP(sdc2_cmd, 0x109000, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) SDC_QDSD_PINGROUP(sdc2_data, 0x109000, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) SDC_QDSD_PINGROUP(qdsd_clk, 0x19c000, 3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) SDC_QDSD_PINGROUP(qdsd_cmd, 0x19c000, 8, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) SDC_QDSD_PINGROUP(qdsd_data0, 0x19c000, 13, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) SDC_QDSD_PINGROUP(qdsd_data1, 0x19c000, 18, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) SDC_QDSD_PINGROUP(qdsd_data2, 0x19c000, 23, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) SDC_QDSD_PINGROUP(qdsd_data3, 0x19c000, 28, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) static const struct msm_pinctrl_soc_data msm8976_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) .pins = msm8976_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) .npins = ARRAY_SIZE(msm8976_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) .functions = msm8976_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) .nfunctions = ARRAY_SIZE(msm8976_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) .groups = msm8976_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) .ngroups = ARRAY_SIZE(msm8976_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) .ngpios = 145,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) static int msm8976_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) return msm_pinctrl_probe(pdev, &msm8976_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) static const struct of_device_id msm8976_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) { .compatible = "qcom,msm8976-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) static struct platform_driver msm8976_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) .name = "msm8976-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) .of_match_table = msm8976_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) .probe = msm8976_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) .remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) static int __init msm8976_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) return platform_driver_register(&msm8976_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) arch_initcall(msm8976_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static void __exit msm8976_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) platform_driver_unregister(&msm8976_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) module_exit(msm8976_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) MODULE_DESCRIPTION("Qualcomm msm8976 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) MODULE_DEVICE_TABLE(of, msm8976_pinctrl_of_match);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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