^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2015, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const struct pinctrl_pin_desc msm8916_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PINCTRL_PIN(70, "GPIO_70"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PINCTRL_PIN(71, "GPIO_71"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PINCTRL_PIN(72, "GPIO_72"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PINCTRL_PIN(73, "GPIO_73"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(74, "GPIO_74"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(75, "GPIO_75"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(76, "GPIO_76"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(77, "GPIO_77"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(78, "GPIO_78"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PINCTRL_PIN(79, "GPIO_79"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(80, "GPIO_80"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(81, "GPIO_81"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(82, "GPIO_82"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(83, "GPIO_83"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(84, "GPIO_84"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(85, "GPIO_85"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(86, "GPIO_86"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(87, "GPIO_87"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(88, "GPIO_88"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(89, "GPIO_89"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(90, "GPIO_90"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(91, "GPIO_91"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(92, "GPIO_92"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(93, "GPIO_93"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(94, "GPIO_94"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(95, "GPIO_95"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(96, "GPIO_96"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(97, "GPIO_97"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(98, "GPIO_98"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(99, "GPIO_99"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PINCTRL_PIN(100, "GPIO_100"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PINCTRL_PIN(101, "GPIO_101"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_PIN(102, "GPIO_102"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_PIN(103, "GPIO_103"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) PINCTRL_PIN(104, "GPIO_104"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PINCTRL_PIN(105, "GPIO_105"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PINCTRL_PIN(106, "GPIO_106"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PINCTRL_PIN(107, "GPIO_107"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PINCTRL_PIN(108, "GPIO_108"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_PIN(109, "GPIO_109"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_PIN(110, "GPIO_110"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PINCTRL_PIN(111, "GPIO_111"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PINCTRL_PIN(112, "GPIO_112"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PINCTRL_PIN(113, "GPIO_113"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PINCTRL_PIN(114, "GPIO_114"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINCTRL_PIN(115, "GPIO_115"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINCTRL_PIN(116, "GPIO_116"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PINCTRL_PIN(117, "GPIO_117"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_PIN(118, "GPIO_118"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINCTRL_PIN(119, "GPIO_119"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PINCTRL_PIN(120, "GPIO_120"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PINCTRL_PIN(121, "GPIO_121"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PINCTRL_PIN(122, "SDC1_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PINCTRL_PIN(123, "SDC1_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) PINCTRL_PIN(124, "SDC1_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PINCTRL_PIN(125, "SDC2_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINCTRL_PIN(126, "SDC2_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINCTRL_PIN(127, "SDC2_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINCTRL_PIN(128, "QDSD_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PINCTRL_PIN(129, "QDSD_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PINCTRL_PIN(130, "QDSD_DATA0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PINCTRL_PIN(131, "QDSD_DATA1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINCTRL_PIN(132, "QDSD_DATA2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) PINCTRL_PIN(133, "QDSD_DATA3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define DECLARE_MSM_GPIO_PINS(pin) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) DECLARE_MSM_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) DECLARE_MSM_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) DECLARE_MSM_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) DECLARE_MSM_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) DECLARE_MSM_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) DECLARE_MSM_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) DECLARE_MSM_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) DECLARE_MSM_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) DECLARE_MSM_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) DECLARE_MSM_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) DECLARE_MSM_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) DECLARE_MSM_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) DECLARE_MSM_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) DECLARE_MSM_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) DECLARE_MSM_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) DECLARE_MSM_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) DECLARE_MSM_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) DECLARE_MSM_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) DECLARE_MSM_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) DECLARE_MSM_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) DECLARE_MSM_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) DECLARE_MSM_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) DECLARE_MSM_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) DECLARE_MSM_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) DECLARE_MSM_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) DECLARE_MSM_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) DECLARE_MSM_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) DECLARE_MSM_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) DECLARE_MSM_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) DECLARE_MSM_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) DECLARE_MSM_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) DECLARE_MSM_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) DECLARE_MSM_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) DECLARE_MSM_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) DECLARE_MSM_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) DECLARE_MSM_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) DECLARE_MSM_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) DECLARE_MSM_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) DECLARE_MSM_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) DECLARE_MSM_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) DECLARE_MSM_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) DECLARE_MSM_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) DECLARE_MSM_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) DECLARE_MSM_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) DECLARE_MSM_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) DECLARE_MSM_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) DECLARE_MSM_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) DECLARE_MSM_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) DECLARE_MSM_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) DECLARE_MSM_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) DECLARE_MSM_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) DECLARE_MSM_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) DECLARE_MSM_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) DECLARE_MSM_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) DECLARE_MSM_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) DECLARE_MSM_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) DECLARE_MSM_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) DECLARE_MSM_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) DECLARE_MSM_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) DECLARE_MSM_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) DECLARE_MSM_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) DECLARE_MSM_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) DECLARE_MSM_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) DECLARE_MSM_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) DECLARE_MSM_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) DECLARE_MSM_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) DECLARE_MSM_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) DECLARE_MSM_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) DECLARE_MSM_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) DECLARE_MSM_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) DECLARE_MSM_GPIO_PINS(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) DECLARE_MSM_GPIO_PINS(71);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) DECLARE_MSM_GPIO_PINS(72);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) DECLARE_MSM_GPIO_PINS(73);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) DECLARE_MSM_GPIO_PINS(74);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) DECLARE_MSM_GPIO_PINS(75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) DECLARE_MSM_GPIO_PINS(76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) DECLARE_MSM_GPIO_PINS(77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) DECLARE_MSM_GPIO_PINS(78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) DECLARE_MSM_GPIO_PINS(79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) DECLARE_MSM_GPIO_PINS(80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) DECLARE_MSM_GPIO_PINS(81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) DECLARE_MSM_GPIO_PINS(82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) DECLARE_MSM_GPIO_PINS(83);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) DECLARE_MSM_GPIO_PINS(84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) DECLARE_MSM_GPIO_PINS(85);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) DECLARE_MSM_GPIO_PINS(86);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) DECLARE_MSM_GPIO_PINS(87);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) DECLARE_MSM_GPIO_PINS(88);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) DECLARE_MSM_GPIO_PINS(89);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) DECLARE_MSM_GPIO_PINS(90);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) DECLARE_MSM_GPIO_PINS(91);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) DECLARE_MSM_GPIO_PINS(92);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) DECLARE_MSM_GPIO_PINS(93);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) DECLARE_MSM_GPIO_PINS(94);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) DECLARE_MSM_GPIO_PINS(95);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) DECLARE_MSM_GPIO_PINS(96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) DECLARE_MSM_GPIO_PINS(97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) DECLARE_MSM_GPIO_PINS(98);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) DECLARE_MSM_GPIO_PINS(99);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) DECLARE_MSM_GPIO_PINS(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) DECLARE_MSM_GPIO_PINS(101);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) DECLARE_MSM_GPIO_PINS(102);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) DECLARE_MSM_GPIO_PINS(103);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) DECLARE_MSM_GPIO_PINS(104);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) DECLARE_MSM_GPIO_PINS(105);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) DECLARE_MSM_GPIO_PINS(106);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) DECLARE_MSM_GPIO_PINS(107);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) DECLARE_MSM_GPIO_PINS(108);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) DECLARE_MSM_GPIO_PINS(109);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) DECLARE_MSM_GPIO_PINS(110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) DECLARE_MSM_GPIO_PINS(111);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) DECLARE_MSM_GPIO_PINS(112);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) DECLARE_MSM_GPIO_PINS(113);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) DECLARE_MSM_GPIO_PINS(114);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) DECLARE_MSM_GPIO_PINS(115);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) DECLARE_MSM_GPIO_PINS(116);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) DECLARE_MSM_GPIO_PINS(117);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) DECLARE_MSM_GPIO_PINS(118);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) DECLARE_MSM_GPIO_PINS(119);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) DECLARE_MSM_GPIO_PINS(120);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) DECLARE_MSM_GPIO_PINS(121);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static const unsigned int sdc1_clk_pins[] = { 122 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static const unsigned int sdc1_cmd_pins[] = { 123 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const unsigned int sdc1_data_pins[] = { 124 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static const unsigned int sdc2_clk_pins[] = { 125 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static const unsigned int sdc2_cmd_pins[] = { 126 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static const unsigned int sdc2_data_pins[] = { 127 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const unsigned int qdsd_clk_pins[] = { 128 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static const unsigned int qdsd_cmd_pins[] = { 129 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static const unsigned int qdsd_data0_pins[] = { 130 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static const unsigned int qdsd_data1_pins[] = { 131 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const unsigned int qdsd_data2_pins[] = { 132 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const unsigned int qdsd_data3_pins[] = { 133 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) [MSM_MUX_##fname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .name = "gpio" #id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .pins = gpio##id##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .npins = ARRAY_SIZE(gpio##id##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .funcs = (int[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MSM_MUX_gpio, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) MSM_MUX_##f1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MSM_MUX_##f2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MSM_MUX_##f3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MSM_MUX_##f4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) MSM_MUX_##f5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) MSM_MUX_##f6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MSM_MUX_##f7, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MSM_MUX_##f8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MSM_MUX_##f9 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .nfuncs = 10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .ctl_reg = 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .io_reg = 0x4 + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .intr_cfg_reg = 0x8 + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .intr_status_reg = 0xc + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .intr_target_reg = 0x8 + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .mux_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .pull_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .drv_bit = 6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .oe_bit = 9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .in_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .out_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .intr_enable_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .intr_status_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .intr_target_bit = 5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .intr_target_kpss_val = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .intr_raw_status_bit = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .intr_polarity_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .intr_detection_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .intr_detection_width = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .name = #pg_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .pins = pg_name##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .npins = ARRAY_SIZE(pg_name##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .ctl_reg = ctl, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .io_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .intr_cfg_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .intr_status_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .intr_target_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .mux_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .pull_bit = pull, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .drv_bit = drv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .oe_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .in_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .out_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .intr_enable_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .intr_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .intr_target_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .intr_target_kpss_val = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .intr_raw_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .intr_polarity_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .intr_detection_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .intr_detection_width = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) enum msm8916_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MSM_MUX_adsp_ext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) MSM_MUX_alsp_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) MSM_MUX_atest_bbrx0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) MSM_MUX_atest_bbrx1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) MSM_MUX_atest_char,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) MSM_MUX_atest_char0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) MSM_MUX_atest_char1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MSM_MUX_atest_char2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MSM_MUX_atest_char3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MSM_MUX_atest_combodac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) MSM_MUX_atest_gpsadc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) MSM_MUX_atest_gpsadc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) MSM_MUX_atest_tsens,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) MSM_MUX_atest_wlan0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) MSM_MUX_atest_wlan1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) MSM_MUX_backlight_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) MSM_MUX_bimc_dte0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) MSM_MUX_bimc_dte1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) MSM_MUX_blsp_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) MSM_MUX_blsp_i2c2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) MSM_MUX_blsp_i2c3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) MSM_MUX_blsp_i2c4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) MSM_MUX_blsp_i2c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) MSM_MUX_blsp_i2c6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) MSM_MUX_blsp_spi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) MSM_MUX_blsp_spi1_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) MSM_MUX_blsp_spi1_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) MSM_MUX_blsp_spi1_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) MSM_MUX_blsp_spi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) MSM_MUX_blsp_spi2_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) MSM_MUX_blsp_spi2_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) MSM_MUX_blsp_spi2_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) MSM_MUX_blsp_spi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) MSM_MUX_blsp_spi3_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) MSM_MUX_blsp_spi3_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) MSM_MUX_blsp_spi3_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) MSM_MUX_blsp_spi4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) MSM_MUX_blsp_spi5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) MSM_MUX_blsp_spi6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) MSM_MUX_blsp_uart1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) MSM_MUX_blsp_uart2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) MSM_MUX_blsp_uim1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) MSM_MUX_blsp_uim2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) MSM_MUX_cam1_rst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) MSM_MUX_cam1_standby,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) MSM_MUX_cam_mclk0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) MSM_MUX_cam_mclk1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) MSM_MUX_cci_async,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) MSM_MUX_cci_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) MSM_MUX_cci_timer0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) MSM_MUX_cci_timer1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) MSM_MUX_cci_timer2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) MSM_MUX_cdc_pdm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) MSM_MUX_codec_mad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) MSM_MUX_dbg_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) MSM_MUX_display_5v,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) MSM_MUX_dmic0_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) MSM_MUX_dmic0_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) MSM_MUX_dsi_rst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) MSM_MUX_ebi0_wrcdc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) MSM_MUX_euro_us,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) MSM_MUX_ext_lpass,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) MSM_MUX_flash_strobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) MSM_MUX_gcc_gp1_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) MSM_MUX_gcc_gp1_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) MSM_MUX_gcc_gp2_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) MSM_MUX_gcc_gp2_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) MSM_MUX_gcc_gp3_clk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) MSM_MUX_gcc_gp3_clk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) MSM_MUX_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) MSM_MUX_gsm0_tx0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) MSM_MUX_gsm0_tx1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) MSM_MUX_gsm1_tx0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) MSM_MUX_gsm1_tx1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) MSM_MUX_gyro_accl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) MSM_MUX_kpsns0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) MSM_MUX_kpsns1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) MSM_MUX_kpsns2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) MSM_MUX_ldo_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) MSM_MUX_ldo_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) MSM_MUX_mag_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) MSM_MUX_mdp_vsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) MSM_MUX_modem_tsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) MSM_MUX_m_voc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) MSM_MUX_nav_pps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) MSM_MUX_nav_tsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) MSM_MUX_pa_indicator,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) MSM_MUX_pbs0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) MSM_MUX_pbs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) MSM_MUX_pbs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) MSM_MUX_pri_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) MSM_MUX_pri_mi2s_ws,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) MSM_MUX_prng_rosc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) MSM_MUX_pwr_crypto_enabled_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) MSM_MUX_pwr_crypto_enabled_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) MSM_MUX_pwr_modem_enabled_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) MSM_MUX_pwr_modem_enabled_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) MSM_MUX_pwr_nav_enabled_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) MSM_MUX_pwr_nav_enabled_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) MSM_MUX_qdss_ctitrig_in_a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) MSM_MUX_qdss_ctitrig_in_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) MSM_MUX_qdss_ctitrig_in_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) MSM_MUX_qdss_ctitrig_in_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) MSM_MUX_qdss_ctitrig_out_a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) MSM_MUX_qdss_ctitrig_out_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) MSM_MUX_qdss_ctitrig_out_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) MSM_MUX_qdss_ctitrig_out_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) MSM_MUX_qdss_traceclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) MSM_MUX_qdss_traceclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) MSM_MUX_qdss_tracectl_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) MSM_MUX_qdss_tracectl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) MSM_MUX_qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) MSM_MUX_qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) MSM_MUX_reset_n,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) MSM_MUX_sd_card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) MSM_MUX_sd_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) MSM_MUX_sec_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) MSM_MUX_smb_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) MSM_MUX_ssbi_wtr0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) MSM_MUX_ssbi_wtr1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) MSM_MUX_uim1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) MSM_MUX_uim2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) MSM_MUX_uim3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) MSM_MUX_uim_batt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) MSM_MUX_wcss_bt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) MSM_MUX_wcss_fm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) MSM_MUX_wcss_wlan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) MSM_MUX_webcam1_rst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) MSM_MUX_NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) "gpio117", "gpio118", "gpio119", "gpio120", "gpio121"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static const char * const adsp_ext_groups[] = { "gpio38" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static const char * const alsp_int_groups[] = { "gpio113" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) static const char * const atest_bbrx0_groups[] = { "gpio17" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static const char * const atest_bbrx1_groups[] = { "gpio16" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static const char * const atest_char_groups[] = { "gpio62" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static const char * const atest_char0_groups[] = { "gpio60" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) static const char * const atest_char1_groups[] = { "gpio59" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static const char * const atest_char2_groups[] = { "gpio58" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) static const char * const atest_char3_groups[] = { "gpio57" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static const char * const atest_combodac_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) "gpio4", "gpio12", "gpio13", "gpio20", "gpio21", "gpio28", "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) "gpio30", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) "gpio45", "gpio46", "gpio47", "gpio48", "gpio69", "gpio107"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) static const char * const atest_gpsadc0_groups[] = { "gpio7" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static const char * const atest_gpsadc1_groups[] = { "gpio18" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static const char * const atest_tsens_groups[] = { "gpio112" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static const char * const atest_wlan0_groups[] = { "gpio22" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static const char * const atest_wlan1_groups[] = { "gpio23" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static const char * const backlight_en_groups[] = { "gpio98" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static const char * const bimc_dte0_groups[] = { "gpio63", "gpio65" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) static const char * const bimc_dte1_groups[] = { "gpio64", "gpio66" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static const char * const blsp_i2c4_groups[] = { "gpio14", "gpio15" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static const char * const blsp_i2c5_groups[] = { "gpio18", "gpio19" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static const char * const blsp_i2c6_groups[] = { "gpio22", "gpio23" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static const char * const blsp_spi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) "gpio0", "gpio1", "gpio2", "gpio3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static const char * const blsp_spi1_cs1_groups[] = { "gpio110" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static const char * const blsp_spi1_cs2_groups[] = { "gpio16" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static const char * const blsp_spi1_cs3_groups[] = { "gpio4" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static const char * const blsp_spi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) "gpio4", "gpio5", "gpio6", "gpio7"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static const char * const blsp_spi2_cs1_groups[] = { "gpio121" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static const char * const blsp_spi2_cs2_groups[] = { "gpio17" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static const char * const blsp_spi2_cs3_groups[] = { "gpio5" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) static const char * const blsp_spi3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) "gpio8", "gpio9", "gpio10", "gpio11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) static const char * const blsp_spi3_cs1_groups[] = { "gpio120" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static const char * const blsp_spi3_cs2_groups[] = { "gpio37" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static const char * const blsp_spi3_cs3_groups[] = { "gpio69" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) static const char * const blsp_spi4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) "gpio12", "gpio13", "gpio14", "gpio15"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) static const char * const blsp_spi5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) "gpio16", "gpio17", "gpio18", "gpio19"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static const char * const blsp_spi6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) "gpio20", "gpio21", "gpio22", "gpio23"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) static const char * const blsp_uart1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) "gpio0", "gpio1", "gpio2", "gpio3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static const char * const blsp_uart2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) "gpio4", "gpio5", "gpio6", "gpio7"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) static const char * const cam1_rst_groups[] = { "gpio35" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static const char * const cam1_standby_groups[] = { "gpio34" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) static const char * const cam_mclk0_groups[] = { "gpio26" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static const char * const cam_mclk1_groups[] = { "gpio27" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static const char * const cci_async_groups[] = { "gpio33" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static const char * const cci_i2c_groups[] = { "gpio29", "gpio30" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) static const char * const cci_timer0_groups[] = { "gpio31" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static const char * const cci_timer1_groups[] = { "gpio32" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) static const char * const cci_timer2_groups[] = { "gpio38" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static const char * const cdc_pdm0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) static const char * const codec_mad_groups[] = { "gpio16" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) static const char * const dbg_out_groups[] = { "gpio47" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) static const char * const display_5v_groups[] = { "gpio97" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static const char * const dmic0_clk_groups[] = { "gpio0" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static const char * const dmic0_data_groups[] = { "gpio1" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static const char * const dsi_rst_groups[] = { "gpio25" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) static const char * const ebi0_wrcdc_groups[] = { "gpio67" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) static const char * const euro_us_groups[] = { "gpio120" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static const char * const ext_lpass_groups[] = { "gpio45" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) static const char * const flash_strobe_groups[] = { "gpio31", "gpio32" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static const char * const gcc_gp1_clk_a_groups[] = { "gpio49" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static const char * const gcc_gp1_clk_b_groups[] = { "gpio97" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) static const char * const gcc_gp2_clk_a_groups[] = { "gpio50" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static const char * const gcc_gp2_clk_b_groups[] = { "gpio12" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) static const char * const gcc_gp3_clk_a_groups[] = { "gpio51" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) static const char * const gcc_gp3_clk_b_groups[] = { "gpio13" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) static const char * const gsm0_tx0_groups[] = { "gpio99" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static const char * const gsm0_tx1_groups[] = { "gpio100" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static const char * const gsm1_tx0_groups[] = { "gpio101" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) static const char * const gsm1_tx1_groups[] = { "gpio102" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) static const char * const gyro_accl_groups[] = {"gpio115" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) static const char * const kpsns0_groups[] = { "gpio107" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static const char * const kpsns1_groups[] = { "gpio108" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static const char * const kpsns2_groups[] = { "gpio109" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) static const char * const ldo_en_groups[] = { "gpio121" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) static const char * const ldo_update_groups[] = { "gpio120" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) static const char * const mag_int_groups[] = { "gpio69" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static const char * const mdp_vsync_groups[] = { "gpio24", "gpio25" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) static const char * const modem_tsync_groups[] = { "gpio95" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static const char * const m_voc_groups[] = { "gpio8", "gpio119" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static const char * const nav_pps_groups[] = { "gpio95" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static const char * const nav_tsync_groups[] = { "gpio95" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) static const char * const pa_indicator_groups[] = { "gpio86" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) static const char * const pbs0_groups[] = { "gpio107" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) static const char * const pbs1_groups[] = { "gpio108" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) static const char * const pbs2_groups[] = { "gpio109" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static const char * const pri_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) "gpio113", "gpio114", "gpio115", "gpio116"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static const char * const pri_mi2s_ws_groups[] = { "gpio110" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static const char * const prng_rosc_groups[] = { "gpio43" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static const char * const pwr_crypto_enabled_a_groups[] = { "gpio35" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static const char * const pwr_crypto_enabled_b_groups[] = { "gpio115" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static const char * const pwr_modem_enabled_a_groups[] = { "gpio28" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static const char * const pwr_modem_enabled_b_groups[] = { "gpio113" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static const char * const pwr_nav_enabled_a_groups[] = { "gpio34" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) static const char * const pwr_nav_enabled_b_groups[] = { "gpio114" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static const char * const qdss_ctitrig_in_a0_groups[] = { "gpio20" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) static const char * const qdss_ctitrig_in_a1_groups[] = { "gpio49" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static const char * const qdss_ctitrig_in_b0_groups[] = { "gpio21" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static const char * const qdss_ctitrig_in_b1_groups[] = { "gpio50" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static const char * const qdss_ctitrig_out_a0_groups[] = { "gpio23" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static const char * const qdss_ctitrig_out_a1_groups[] = { "gpio52" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static const char * const qdss_ctitrig_out_b0_groups[] = { "gpio22" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static const char * const qdss_ctitrig_out_b1_groups[] = { "gpio51" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static const char * const qdss_traceclk_a_groups[] = { "gpio46" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) static const char * const qdss_traceclk_b_groups[] = { "gpio5" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static const char * const qdss_tracectl_a_groups[] = { "gpio45" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static const char * const qdss_tracectl_b_groups[] = { "gpio4" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static const char * const qdss_tracedata_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) "gpio8", "gpio9", "gpio10", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) "gpio43", "gpio47", "gpio48", "gpio62", "gpio69", "gpio112", "gpio113",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) "gpio114", "gpio115"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) static const char * const qdss_tracedata_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) "gpio26", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) "gpio33", "gpio34", "gpio35", "gpio36", "gpio37", "gpio110", "gpio111",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) "gpio120", "gpio121"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static const char * const reset_n_groups[] = { "gpio36" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) static const char * const sd_card_groups[] = { "gpio38" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static const char * const sd_write_groups[] = { "gpio121" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) static const char * const sec_mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "gpio112", "gpio117", "gpio118", "gpio119"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static const char * const smb_int_groups[] = { "gpio62" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static const char * const ssbi_wtr0_groups[] = { "gpio103", "gpio104" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) static const char * const ssbi_wtr1_groups[] = { "gpio105", "gpio106" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static const char * const uim1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) "gpio57", "gpio58", "gpio59", "gpio60"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static const char * const uim2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) "gpio53", "gpio54", "gpio55", "gpio56"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static const char * const uim3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) "gpio49", "gpio50", "gpio51", "gpio52"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) static const char * const uim_batt_groups[] = { "gpio61" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) static const char * const wcss_bt_groups[] = { "gpio39", "gpio47", "gpio48" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static const char * const wcss_fm_groups[] = { "gpio45", "gpio46" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static const char * const wcss_wlan_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) static const char * const webcam1_rst_groups[] = { "gpio28" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) static const struct msm_function msm8916_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) FUNCTION(adsp_ext),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) FUNCTION(alsp_int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) FUNCTION(atest_bbrx0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) FUNCTION(atest_bbrx1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) FUNCTION(atest_char),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) FUNCTION(atest_char0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) FUNCTION(atest_char1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) FUNCTION(atest_char2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) FUNCTION(atest_char3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) FUNCTION(atest_combodac),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) FUNCTION(atest_gpsadc0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) FUNCTION(atest_gpsadc1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) FUNCTION(atest_tsens),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) FUNCTION(atest_wlan0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) FUNCTION(atest_wlan1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) FUNCTION(backlight_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) FUNCTION(bimc_dte0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) FUNCTION(bimc_dte1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) FUNCTION(blsp_i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) FUNCTION(blsp_i2c2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) FUNCTION(blsp_i2c3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) FUNCTION(blsp_i2c4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) FUNCTION(blsp_i2c5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) FUNCTION(blsp_i2c6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) FUNCTION(blsp_spi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) FUNCTION(blsp_spi1_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) FUNCTION(blsp_spi1_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) FUNCTION(blsp_spi1_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) FUNCTION(blsp_spi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) FUNCTION(blsp_spi2_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) FUNCTION(blsp_spi2_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) FUNCTION(blsp_spi2_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) FUNCTION(blsp_spi3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) FUNCTION(blsp_spi3_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) FUNCTION(blsp_spi3_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) FUNCTION(blsp_spi3_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) FUNCTION(blsp_spi4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) FUNCTION(blsp_spi5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) FUNCTION(blsp_spi6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) FUNCTION(blsp_uart1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) FUNCTION(blsp_uart2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) FUNCTION(blsp_uim1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) FUNCTION(blsp_uim2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) FUNCTION(cam1_rst),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) FUNCTION(cam1_standby),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) FUNCTION(cam_mclk0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) FUNCTION(cam_mclk1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) FUNCTION(cci_async),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) FUNCTION(cci_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) FUNCTION(cci_timer0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) FUNCTION(cci_timer1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) FUNCTION(cci_timer2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) FUNCTION(cdc_pdm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) FUNCTION(codec_mad),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) FUNCTION(dbg_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) FUNCTION(display_5v),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) FUNCTION(dmic0_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) FUNCTION(dmic0_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) FUNCTION(dsi_rst),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) FUNCTION(ebi0_wrcdc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) FUNCTION(euro_us),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) FUNCTION(ext_lpass),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) FUNCTION(flash_strobe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) FUNCTION(gcc_gp1_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) FUNCTION(gcc_gp1_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) FUNCTION(gcc_gp2_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) FUNCTION(gcc_gp2_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) FUNCTION(gcc_gp3_clk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) FUNCTION(gcc_gp3_clk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) FUNCTION(gsm0_tx0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) FUNCTION(gsm0_tx1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) FUNCTION(gsm1_tx0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) FUNCTION(gsm1_tx1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) FUNCTION(gyro_accl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) FUNCTION(kpsns0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) FUNCTION(kpsns1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) FUNCTION(kpsns2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) FUNCTION(ldo_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) FUNCTION(ldo_update),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) FUNCTION(mag_int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) FUNCTION(mdp_vsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) FUNCTION(modem_tsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) FUNCTION(m_voc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) FUNCTION(nav_pps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) FUNCTION(nav_tsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) FUNCTION(pa_indicator),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) FUNCTION(pbs0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) FUNCTION(pbs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) FUNCTION(pbs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) FUNCTION(pri_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) FUNCTION(pri_mi2s_ws),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) FUNCTION(prng_rosc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) FUNCTION(pwr_crypto_enabled_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) FUNCTION(pwr_crypto_enabled_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) FUNCTION(pwr_modem_enabled_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) FUNCTION(pwr_modem_enabled_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) FUNCTION(pwr_nav_enabled_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) FUNCTION(pwr_nav_enabled_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) FUNCTION(qdss_ctitrig_in_a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) FUNCTION(qdss_ctitrig_in_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) FUNCTION(qdss_ctitrig_in_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) FUNCTION(qdss_ctitrig_in_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) FUNCTION(qdss_ctitrig_out_a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) FUNCTION(qdss_ctitrig_out_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) FUNCTION(qdss_ctitrig_out_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) FUNCTION(qdss_ctitrig_out_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) FUNCTION(qdss_traceclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) FUNCTION(qdss_traceclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) FUNCTION(qdss_tracectl_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) FUNCTION(qdss_tracectl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) FUNCTION(qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) FUNCTION(qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) FUNCTION(reset_n),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) FUNCTION(sd_card),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) FUNCTION(sd_write),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) FUNCTION(sec_mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) FUNCTION(smb_int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) FUNCTION(ssbi_wtr0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) FUNCTION(ssbi_wtr1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) FUNCTION(uim1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) FUNCTION(uim2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) FUNCTION(uim3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) FUNCTION(uim_batt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) FUNCTION(wcss_bt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) FUNCTION(wcss_fm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) FUNCTION(wcss_wlan),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) FUNCTION(webcam1_rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) static const struct msm_pingroup msm8916_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, dmic0_clk, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, dmic0_data, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, blsp_spi1_cs3, qdss_tracectl_b, NA, atest_combodac, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, blsp_spi2_cs3, qdss_traceclk_b, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) PINGROUP(8, blsp_spi3, m_voc, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) PINGROUP(9, blsp_spi3, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) PINGROUP(10, blsp_spi3, blsp_i2c3, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) PINGROUP(11, blsp_spi3, blsp_i2c3, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) PINGROUP(12, blsp_spi4, gcc_gp2_clk_b, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) PINGROUP(13, blsp_spi4, gcc_gp3_clk_b, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) PINGROUP(14, blsp_spi4, blsp_i2c4, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) PINGROUP(15, blsp_spi4, blsp_i2c4, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) PINGROUP(16, blsp_spi5, blsp_spi1_cs2, NA, atest_bbrx1, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) PINGROUP(17, blsp_spi5, blsp_spi2_cs2, NA, atest_bbrx0, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) PINGROUP(18, blsp_spi5, blsp_i2c5, NA, atest_gpsadc1, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) PINGROUP(19, blsp_spi5, blsp_i2c5, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) PINGROUP(20, blsp_spi6, NA, NA, NA, NA, NA, NA, qdss_ctitrig_in_a0, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) PINGROUP(21, blsp_spi6, NA, NA, NA, NA, NA, NA, qdss_ctitrig_in_b0, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) PINGROUP(22, blsp_spi6, blsp_i2c6, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) PINGROUP(23, blsp_spi6, blsp_i2c6, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) PINGROUP(24, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) PINGROUP(25, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) PINGROUP(26, cam_mclk0, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) PINGROUP(27, cam_mclk1, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) PINGROUP(28, pwr_modem_enabled_a, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, atest_combodac),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) PINGROUP(29, cci_i2c, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, atest_combodac),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) PINGROUP(30, cci_i2c, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) PINGROUP(31, cci_timer0, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) PINGROUP(32, cci_timer1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) PINGROUP(33, cci_async, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) PINGROUP(34, pwr_nav_enabled_a, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) PINGROUP(35, pwr_crypto_enabled_a, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, qdss_tracedata_b, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) PINGROUP(37, blsp_spi3_cs2, NA, NA, NA, NA, NA, qdss_tracedata_b, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) PINGROUP(38, cci_timer2, adsp_ext, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) PINGROUP(39, wcss_bt, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) PINGROUP(40, wcss_wlan, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) PINGROUP(41, wcss_wlan, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) PINGROUP(42, wcss_wlan, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) PINGROUP(43, wcss_wlan, prng_rosc, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) PINGROUP(44, wcss_wlan, NA, atest_combodac, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) PINGROUP(45, wcss_fm, ext_lpass, qdss_tracectl_a, NA, atest_combodac, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) PINGROUP(46, wcss_fm, qdss_traceclk_a, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) PINGROUP(47, wcss_bt, dbg_out, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) PINGROUP(48, wcss_bt, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) PINGROUP(49, uim3, gcc_gp1_clk_a, qdss_ctitrig_in_a1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) PINGROUP(50, uim3, gcc_gp2_clk_a, qdss_ctitrig_in_b1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) PINGROUP(51, uim3, gcc_gp3_clk_a, qdss_ctitrig_out_b1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) PINGROUP(52, uim3, NA, qdss_ctitrig_out_a1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) PINGROUP(53, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) PINGROUP(54, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) PINGROUP(55, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) PINGROUP(56, uim2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) PINGROUP(57, uim1, atest_char3, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) PINGROUP(58, uim1, atest_char2, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) PINGROUP(59, uim1, atest_char1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) PINGROUP(60, uim1, atest_char0, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) PINGROUP(61, uim_batt, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) PINGROUP(62, atest_char, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) PINGROUP(63, cdc_pdm0, bimc_dte0, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) PINGROUP(64, cdc_pdm0, bimc_dte1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) PINGROUP(65, cdc_pdm0, bimc_dte0, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) PINGROUP(66, cdc_pdm0, bimc_dte1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) PINGROUP(67, cdc_pdm0, ebi0_wrcdc, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) PINGROUP(68, cdc_pdm0, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) PINGROUP(69, blsp_spi3_cs3, qdss_tracedata_a, NA, atest_combodac, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) PINGROUP(86, NA, pa_indicator, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) PINGROUP(95, NA, modem_tsync, nav_tsync, nav_pps, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) PINGROUP(97, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) PINGROUP(98, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) PINGROUP(99, gsm0_tx0, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) PINGROUP(100, gsm0_tx1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) PINGROUP(101, gsm1_tx0, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) PINGROUP(102, gsm1_tx1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) PINGROUP(103, ssbi_wtr0, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) PINGROUP(104, ssbi_wtr0, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) PINGROUP(105, ssbi_wtr1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) PINGROUP(106, ssbi_wtr1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) PINGROUP(107, pbs0, NA, atest_combodac, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) PINGROUP(108, pbs1, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) PINGROUP(109, pbs2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) PINGROUP(110, blsp_spi1_cs1, pri_mi2s_ws, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) PINGROUP(111, qdss_tracedata_b, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) PINGROUP(112, sec_mi2s, NA, NA, NA, qdss_tracedata_a, NA, atest_tsens, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) PINGROUP(113, pri_mi2s, NA, pwr_modem_enabled_b, NA, NA, NA, NA, NA, qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) PINGROUP(114, pri_mi2s, pwr_nav_enabled_b, NA, NA, NA, NA, NA, qdss_tracedata_a, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) PINGROUP(115, pri_mi2s, pwr_crypto_enabled_b, NA, NA, NA, NA, NA, qdss_tracedata_a, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) PINGROUP(116, pri_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) PINGROUP(117, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) PINGROUP(118, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) PINGROUP(119, sec_mi2s, m_voc, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) PINGROUP(120, blsp_spi3_cs1, ldo_update, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) PINGROUP(121, sd_write, blsp_spi2_cs1, ldo_en, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) SDC_PINGROUP(sdc1_clk, 0x10a000, 13, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) SDC_PINGROUP(sdc1_cmd, 0x10a000, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) SDC_PINGROUP(sdc1_data, 0x10a000, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) SDC_PINGROUP(sdc2_clk, 0x109000, 14, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) SDC_PINGROUP(sdc2_cmd, 0x109000, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) SDC_PINGROUP(sdc2_data, 0x109000, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) SDC_PINGROUP(qdsd_clk, 0x19c000, 3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) SDC_PINGROUP(qdsd_cmd, 0x19c000, 8, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) SDC_PINGROUP(qdsd_data0, 0x19c000, 13, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) SDC_PINGROUP(qdsd_data1, 0x19c000, 18, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) SDC_PINGROUP(qdsd_data2, 0x19c000, 23, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) SDC_PINGROUP(qdsd_data3, 0x19c000, 28, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) #define NUM_GPIO_PINGROUPS 122
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) static const struct msm_pinctrl_soc_data msm8916_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .pins = msm8916_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) .npins = ARRAY_SIZE(msm8916_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) .functions = msm8916_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) .nfunctions = ARRAY_SIZE(msm8916_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) .groups = msm8916_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) .ngroups = ARRAY_SIZE(msm8916_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) .ngpios = NUM_GPIO_PINGROUPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) static int msm8916_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) return msm_pinctrl_probe(pdev, &msm8916_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) static const struct of_device_id msm8916_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) { .compatible = "qcom,msm8916-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) static struct platform_driver msm8916_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .name = "msm8916-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) .of_match_table = msm8916_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .probe = msm8916_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) .remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) static int __init msm8916_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) return platform_driver_register(&msm8916_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) arch_initcall(msm8916_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) static void __exit msm8916_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) platform_driver_unregister(&msm8916_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) module_exit(msm8916_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) MODULE_DESCRIPTION("Qualcomm msm8916 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) MODULE_DEVICE_TABLE(of, msm8916_pinctrl_of_match);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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