^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2017, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) [msm_mux_##fname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define REG_SIZE 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .name = "gpio" #id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .pins = gpio##id##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .funcs = (int[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) msm_mux_gpio, /* gpio mode */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) msm_mux_##f1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) msm_mux_##f2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) msm_mux_##f3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) msm_mux_##f4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) msm_mux_##f5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) msm_mux_##f6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) msm_mux_##f7, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) msm_mux_##f8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) msm_mux_##f9 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .nfuncs = 10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .ctl_reg = REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .io_reg = 0x4 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .intr_cfg_reg = 0x8 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .intr_status_reg = 0xc + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .intr_target_reg = 0x8 + REG_SIZE * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .mux_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .pull_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .drv_bit = 6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .oe_bit = 9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .in_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .out_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .intr_enable_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .intr_status_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .intr_target_bit = 5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .intr_target_kpss_val = 3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .intr_raw_status_bit = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .intr_polarity_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .intr_detection_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .intr_detection_width = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static const struct pinctrl_pin_desc ipq8074_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define DECLARE_MSM_GPIO_PINS(pin) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) DECLARE_MSM_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) DECLARE_MSM_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) DECLARE_MSM_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) DECLARE_MSM_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) DECLARE_MSM_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) DECLARE_MSM_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) DECLARE_MSM_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) DECLARE_MSM_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) DECLARE_MSM_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) DECLARE_MSM_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) DECLARE_MSM_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) DECLARE_MSM_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) DECLARE_MSM_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) DECLARE_MSM_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) DECLARE_MSM_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) DECLARE_MSM_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) DECLARE_MSM_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) DECLARE_MSM_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) DECLARE_MSM_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) DECLARE_MSM_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) DECLARE_MSM_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) DECLARE_MSM_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) DECLARE_MSM_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) DECLARE_MSM_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) DECLARE_MSM_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) DECLARE_MSM_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) DECLARE_MSM_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) DECLARE_MSM_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) DECLARE_MSM_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) DECLARE_MSM_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) DECLARE_MSM_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) DECLARE_MSM_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) DECLARE_MSM_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) DECLARE_MSM_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) DECLARE_MSM_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) DECLARE_MSM_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) DECLARE_MSM_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) DECLARE_MSM_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) DECLARE_MSM_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) DECLARE_MSM_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) DECLARE_MSM_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) DECLARE_MSM_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) DECLARE_MSM_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) DECLARE_MSM_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) DECLARE_MSM_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) DECLARE_MSM_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) DECLARE_MSM_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) DECLARE_MSM_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) DECLARE_MSM_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) DECLARE_MSM_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) DECLARE_MSM_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) DECLARE_MSM_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) DECLARE_MSM_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) DECLARE_MSM_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) DECLARE_MSM_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) DECLARE_MSM_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) DECLARE_MSM_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) DECLARE_MSM_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) DECLARE_MSM_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) DECLARE_MSM_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) DECLARE_MSM_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) DECLARE_MSM_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) DECLARE_MSM_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) DECLARE_MSM_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) DECLARE_MSM_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) DECLARE_MSM_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) DECLARE_MSM_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) DECLARE_MSM_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) DECLARE_MSM_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) DECLARE_MSM_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) enum ipq8074_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) msm_mux_atest_char,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) msm_mux_atest_char0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) msm_mux_atest_char1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) msm_mux_atest_char2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) msm_mux_atest_char3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) msm_mux_audio_rxbclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) msm_mux_audio_rxd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) msm_mux_audio_rxfsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) msm_mux_audio_rxmclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) msm_mux_audio_txbclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) msm_mux_audio_txd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) msm_mux_audio_txfsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) msm_mux_audio_txmclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) msm_mux_blsp0_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) msm_mux_blsp0_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) msm_mux_blsp0_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) msm_mux_blsp1_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) msm_mux_blsp1_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) msm_mux_blsp1_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) msm_mux_blsp2_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) msm_mux_blsp2_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) msm_mux_blsp2_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) msm_mux_blsp3_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) msm_mux_blsp3_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) msm_mux_blsp3_spi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) msm_mux_blsp3_spi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) msm_mux_blsp3_spi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) msm_mux_blsp3_spi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) msm_mux_blsp3_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) msm_mux_blsp4_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) msm_mux_blsp4_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) msm_mux_blsp4_spi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) msm_mux_blsp4_spi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) msm_mux_blsp4_uart0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) msm_mux_blsp4_uart1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) msm_mux_blsp5_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) msm_mux_blsp5_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) msm_mux_blsp5_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) msm_mux_burn0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) msm_mux_burn1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) msm_mux_cri_trng,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) msm_mux_cri_trng0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) msm_mux_cri_trng1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) msm_mux_cxc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) msm_mux_cxc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) msm_mux_dbg_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) msm_mux_gcc_plltest,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) msm_mux_gcc_tlmm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) msm_mux_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) msm_mux_ldo_en,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) msm_mux_ldo_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) msm_mux_led0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) msm_mux_led1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) msm_mux_led2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) msm_mux_mac0_sa0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) msm_mux_mac0_sa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) msm_mux_mac1_sa0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) msm_mux_mac1_sa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) msm_mux_mac1_sa2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) msm_mux_mac1_sa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) msm_mux_mac2_sa0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) msm_mux_mac2_sa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) msm_mux_mdc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) msm_mux_mdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) msm_mux_pcie0_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) msm_mux_pcie0_rst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) msm_mux_pcie0_wake,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) msm_mux_pcie1_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) msm_mux_pcie1_rst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) msm_mux_pcie1_wake,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) msm_mux_pcm_drx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) msm_mux_pcm_dtx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) msm_mux_pcm_fsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) msm_mux_pcm_pclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) msm_mux_pcm_zsi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) msm_mux_pcm_zsi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) msm_mux_prng_rosc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) msm_mux_pta1_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) msm_mux_pta1_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) msm_mux_pta1_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) msm_mux_pta2_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) msm_mux_pta2_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) msm_mux_pta2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) msm_mux_pwm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) msm_mux_pwm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) msm_mux_pwm2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) msm_mux_pwm3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) msm_mux_qdss_cti_trig_in_a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) msm_mux_qdss_cti_trig_in_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) msm_mux_qdss_cti_trig_in_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) msm_mux_qdss_cti_trig_in_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) msm_mux_qdss_cti_trig_out_a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) msm_mux_qdss_cti_trig_out_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) msm_mux_qdss_cti_trig_out_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) msm_mux_qdss_cti_trig_out_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) msm_mux_qdss_traceclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) msm_mux_qdss_traceclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) msm_mux_qdss_tracectl_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) msm_mux_qdss_tracectl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) msm_mux_qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) msm_mux_qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) msm_mux_qpic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) msm_mux_rx0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) msm_mux_rx1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) msm_mux_rx2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) msm_mux_sd_card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) msm_mux_sd_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) msm_mux_tsens_max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) msm_mux_wci2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) msm_mux_wci2b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) msm_mux_wci2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) msm_mux_wci2d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) msm_mux_NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static const char * const qpic_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) "gpio0", /* LCD_TE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) "gpio1", /* BUSY_N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) "gpio2", /* LCD_RS_N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) "gpio3", /* WE_N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) "gpio4", /* OE_N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) "gpio5", /* DATA[0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) "gpio6", /* DATA[1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) "gpio7", /* DATA[2] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) "gpio8", /* DATA[3] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) "gpio9", /* CS_CSR_LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) "gpio10", /* CLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) "gpio11", /* NAND_CS_N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) "gpio12", /* DATA[4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) "gpio13", /* DATA[5] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) "gpio14", /* DATA[6] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) "gpio15", /* DATA[7] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) "gpio16", /* DATA[8] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) "gpio17", /* ALE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static const char * const blsp5_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) "gpio0", "gpio2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static const char * const blsp5_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) "gpio0", "gpio2", "gpio9", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static const char * const wci2a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) "gpio0", "gpio2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static const char * const blsp3_spi3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) "gpio0", "gpio2", "gpio9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static const char * const burn0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) "gpio0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static const char * const pcm_zsi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) "gpio1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static const char * const blsp5_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) "gpio0", "gpio2", "gpio9", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static const char * const mac1_sa2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) "gpio1", "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static const char * const blsp3_spi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) "gpio1", "gpio3", "gpio4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static const char * const burn1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) "gpio1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static const char * const mac0_sa1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) "gpio3", "gpio4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static const char * const qdss_cti_trig_out_b0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) "gpio3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static const char * const qdss_cti_trig_in_b0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) "gpio4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static const char * const blsp4_uart0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) "gpio5", "gpio6", "gpio7", "gpio8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static const char * const blsp4_i2c0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) "gpio5", "gpio6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static const char * const blsp4_spi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) "gpio5", "gpio6", "gpio7", "gpio8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static const char * const mac2_sa1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) "gpio5", "gpio6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static const char * const qdss_cti_trig_out_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static const char * const qdss_cti_trig_in_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) "gpio6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static const char * const cxc0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) "gpio9", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static const char * const mac1_sa3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) "gpio9", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static const char * const qdss_cti_trig_in_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) "gpio9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static const char * const qdss_cti_trig_out_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) "gpio10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) static const char * const wci2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) "gpio11", "gpio17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static const char * const qdss_cti_trig_in_a0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static const char * const qdss_cti_trig_out_a0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) "gpio12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static const char * const qdss_traceclk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static const char * const qdss_tracectl_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) "gpio15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static const char * const pcm_zsi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static const char * const qdss_tracedata_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) "gpio30", "gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static const char * const led0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) "gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) static const char * const pwm0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) "gpio18", "gpio21", "gpio25", "gpio29", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static const char * const led1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static const char * const pwm1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) "gpio19", "gpio22", "gpio26", "gpio30", "gpio64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static const char * const led2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) "gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static const char * const pwm2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) "gpio20", "gpio23", "gpio27", "gpio31", "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static const char * const blsp4_uart1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) "gpio21", "gpio22", "gpio23", "gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static const char * const blsp4_i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) "gpio21", "gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static const char * const blsp4_spi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) "gpio21", "gpio22", "gpio23", "gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static const char * const wci2d_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) "gpio21", "gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) static const char * const mac1_sa1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) "gpio21", "gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static const char * const blsp3_spi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) "gpio21", "gpio22", "gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static const char * const pwm3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) "gpio24", "gpio28", "gpio32", "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static const char * const audio_txmclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) "gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) static const char * const audio_txbclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) "gpio26",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static const char * const audio_txfsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) "gpio27",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static const char * const audio_txd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static const char * const audio_rxmclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) static const char * const atest_char0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static const char * const audio_rxbclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) "gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static const char * const atest_char1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) "gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static const char * const audio_rxfsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) "gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) static const char * const atest_char2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) "gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static const char * const audio_rxd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) "gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) static const char * const atest_char3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) "gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static const char * const pcm_drx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) "gpio33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) static const char * const mac1_sa0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) "gpio33", "gpio34",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) static const char * const mac0_sa0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) "gpio33", "gpio34",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static const char * const pcm_dtx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) "gpio34",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static const char * const pcm_fsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static const char * const mac2_sa0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) "gpio35", "gpio36",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) static const char * const qdss_traceclk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static const char * const pcm_pclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) "gpio36",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) static const char * const qdss_tracectl_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) "gpio36",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static const char * const atest_char_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) "gpio37",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static const char * const qdss_tracedata_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) "gpio51", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static const char * const blsp0_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "gpio38", "gpio39", "gpio40", "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static const char * const blsp0_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) "gpio38", "gpio39",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static const char * const blsp0_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) "gpio38", "gpio39", "gpio40", "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) static const char * const blsp1_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) "gpio42", "gpio43", "gpio44", "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static const char * const blsp1_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) "gpio42", "gpio43",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static const char * const blsp1_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) "gpio42", "gpio43", "gpio44", "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static const char * const blsp2_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static const char * const blsp2_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) "gpio46", "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static const char * const blsp2_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static const char * const blsp3_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) "gpio50", "gpio51", "gpio52", "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static const char * const blsp3_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) "gpio50", "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static const char * const blsp3_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) "gpio50", "gpio51", "gpio52", "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static const char * const pta2_0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) "gpio54",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static const char * const wci2b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) "gpio54", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static const char * const cxc1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) "gpio54", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) static const char * const blsp3_spi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static const char * const pta2_1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static const char * const pta2_2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) static const char * const pcie0_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) static const char * const dbg_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static const char * const cri_trng0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) static const char * const pcie0_rst_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) static const char * const cri_trng1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) static const char * const pcie0_wake_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) "gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static const char * const cri_trng_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) "gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) static const char * const pcie1_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static const char * const rx2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) static const char * const ldo_update_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static const char * const pcie1_rst_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const char * const ldo_en_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) static const char * const pcie1_wake_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const char * const gcc_plltest_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static const char * const sd_card_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static const char * const pta1_1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) "gpio64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) static const char * const rx1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) "gpio64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static const char * const pta1_2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) "gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static const char * const gcc_tlmm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) "gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) static const char * const pta1_0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) static const char * const prng_rosc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) static const char * const sd_write_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static const char * const rx0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static const char * const tsens_max_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) static const char * const mdc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static const char * const mdio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) "gpio69",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) static const struct msm_function ipq8074_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) FUNCTION(atest_char),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) FUNCTION(atest_char0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) FUNCTION(atest_char1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) FUNCTION(atest_char2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) FUNCTION(atest_char3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) FUNCTION(audio_rxbclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) FUNCTION(audio_rxd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) FUNCTION(audio_rxfsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) FUNCTION(audio_rxmclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) FUNCTION(audio_txbclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) FUNCTION(audio_txd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) FUNCTION(audio_txfsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) FUNCTION(audio_txmclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) FUNCTION(blsp0_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) FUNCTION(blsp0_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) FUNCTION(blsp0_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) FUNCTION(blsp1_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) FUNCTION(blsp1_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) FUNCTION(blsp1_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) FUNCTION(blsp2_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) FUNCTION(blsp2_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) FUNCTION(blsp2_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) FUNCTION(blsp3_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) FUNCTION(blsp3_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) FUNCTION(blsp3_spi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) FUNCTION(blsp3_spi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) FUNCTION(blsp3_spi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) FUNCTION(blsp3_spi3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) FUNCTION(blsp3_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) FUNCTION(blsp4_i2c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) FUNCTION(blsp4_i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) FUNCTION(blsp4_spi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) FUNCTION(blsp4_spi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) FUNCTION(blsp4_uart0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) FUNCTION(blsp4_uart1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) FUNCTION(blsp5_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) FUNCTION(blsp5_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) FUNCTION(blsp5_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) FUNCTION(burn0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) FUNCTION(burn1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) FUNCTION(cri_trng),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) FUNCTION(cri_trng0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) FUNCTION(cri_trng1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) FUNCTION(cxc0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) FUNCTION(cxc1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) FUNCTION(dbg_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) FUNCTION(gcc_plltest),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) FUNCTION(gcc_tlmm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) FUNCTION(ldo_en),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) FUNCTION(ldo_update),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) FUNCTION(led0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) FUNCTION(led1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) FUNCTION(led2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) FUNCTION(mac0_sa0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) FUNCTION(mac0_sa1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) FUNCTION(mac1_sa0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) FUNCTION(mac1_sa1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) FUNCTION(mac1_sa2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) FUNCTION(mac1_sa3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) FUNCTION(mac2_sa0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) FUNCTION(mac2_sa1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) FUNCTION(mdc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) FUNCTION(mdio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) FUNCTION(pcie0_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) FUNCTION(pcie0_rst),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) FUNCTION(pcie0_wake),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) FUNCTION(pcie1_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) FUNCTION(pcie1_rst),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) FUNCTION(pcie1_wake),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) FUNCTION(pcm_drx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) FUNCTION(pcm_dtx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) FUNCTION(pcm_fsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) FUNCTION(pcm_pclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) FUNCTION(pcm_zsi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) FUNCTION(pcm_zsi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) FUNCTION(prng_rosc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) FUNCTION(pta1_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) FUNCTION(pta1_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) FUNCTION(pta1_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) FUNCTION(pta2_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) FUNCTION(pta2_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) FUNCTION(pta2_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) FUNCTION(pwm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) FUNCTION(pwm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) FUNCTION(pwm2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) FUNCTION(pwm3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) FUNCTION(qdss_cti_trig_in_a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) FUNCTION(qdss_cti_trig_in_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) FUNCTION(qdss_cti_trig_in_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) FUNCTION(qdss_cti_trig_in_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) FUNCTION(qdss_cti_trig_out_a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) FUNCTION(qdss_cti_trig_out_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) FUNCTION(qdss_cti_trig_out_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) FUNCTION(qdss_cti_trig_out_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) FUNCTION(qdss_traceclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) FUNCTION(qdss_traceclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) FUNCTION(qdss_tracectl_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) FUNCTION(qdss_tracectl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) FUNCTION(qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) FUNCTION(qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) FUNCTION(qpic),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) FUNCTION(rx0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) FUNCTION(rx1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) FUNCTION(rx2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) FUNCTION(sd_card),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) FUNCTION(sd_write),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) FUNCTION(tsens_max),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) FUNCTION(wci2a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) FUNCTION(wci2b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) FUNCTION(wci2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) FUNCTION(wci2d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) static const struct msm_pingroup ipq8074_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) PINGROUP(0, qpic, blsp5_uart, blsp5_i2c, blsp5_spi, wci2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) blsp3_spi3, NA, burn0, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) PINGROUP(1, qpic, pcm_zsi0, mac1_sa2, blsp3_spi0, NA, burn1, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) PINGROUP(2, qpic, blsp5_uart, blsp5_i2c, blsp5_spi, wci2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) blsp3_spi3, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) PINGROUP(3, qpic, mac0_sa1, blsp3_spi0, qdss_cti_trig_out_b0, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) PINGROUP(4, qpic, mac0_sa1, blsp3_spi0, qdss_cti_trig_in_b0, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) PINGROUP(5, qpic, blsp4_uart0, blsp4_i2c0, blsp4_spi0, mac2_sa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) qdss_cti_trig_out_b1, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) PINGROUP(6, qpic, blsp4_uart0, blsp4_i2c0, blsp4_spi0, mac2_sa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) qdss_cti_trig_in_b1, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) PINGROUP(7, qpic, blsp4_uart0, blsp4_spi0, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) PINGROUP(8, qpic, blsp4_uart0, blsp4_spi0, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) PINGROUP(9, qpic, blsp5_uart, blsp5_spi, cxc0, mac1_sa3, blsp3_spi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) qdss_cti_trig_in_a1, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) PINGROUP(10, qpic, qdss_cti_trig_out_a1, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) PINGROUP(11, qpic, wci2c, mac1_sa2, qdss_cti_trig_in_a0, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) PINGROUP(12, qpic, qdss_cti_trig_out_a0, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) PINGROUP(13, qpic, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) PINGROUP(14, qpic, qdss_traceclk_b, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) PINGROUP(15, qpic, qdss_tracectl_b, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) PINGROUP(16, qpic, blsp5_uart, pcm_zsi1, blsp5_spi, cxc0, mac1_sa3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) qdss_tracedata_b, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) PINGROUP(17, qpic, wci2c, qdss_tracedata_b, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) PINGROUP(18, led0, pwm0, qdss_tracedata_b, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) PINGROUP(19, led1, pwm1, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) PINGROUP(20, led2, pwm2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) PINGROUP(21, pwm0, blsp4_uart1, blsp4_i2c1, blsp4_spi1, wci2d, mac1_sa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) blsp3_spi2, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) PINGROUP(22, pwm1, blsp4_uart1, blsp4_i2c1, blsp4_spi1, wci2d, mac1_sa1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) blsp3_spi2, NA, qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) PINGROUP(23, pwm2, blsp4_uart1, blsp4_spi1, blsp3_spi2, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) qdss_tracedata_b, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) PINGROUP(24, pwm3, blsp4_uart1, blsp4_spi1, NA, qdss_tracedata_b, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) PINGROUP(25, audio_txmclk, pwm0, NA, qdss_tracedata_b, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) PINGROUP(26, audio_txbclk, pwm1, NA, qdss_tracedata_b, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) PINGROUP(27, audio_txfsync, pwm2, NA, qdss_tracedata_b, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) PINGROUP(28, audio_txd, pwm3, NA, qdss_tracedata_b, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) PINGROUP(29, audio_rxmclk, pwm0, atest_char0, NA, qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) PINGROUP(30, audio_rxbclk, pwm1, atest_char1, NA, qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) PINGROUP(31, audio_rxfsync, pwm2, atest_char2, NA, qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) PINGROUP(32, audio_rxd, pwm3, atest_char3, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) PINGROUP(33, pcm_drx, mac1_sa0, mac0_sa0, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) PINGROUP(34, pcm_dtx, mac1_sa0, mac0_sa0, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) PINGROUP(35, pcm_fsync, mac2_sa0, qdss_traceclk_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) PINGROUP(36, pcm_pclk, mac2_sa0, NA, qdss_tracectl_a, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) PINGROUP(37, atest_char, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) PINGROUP(38, blsp0_uart, blsp0_i2c, blsp0_spi, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) PINGROUP(39, blsp0_uart, blsp0_i2c, blsp0_spi, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) PINGROUP(40, blsp0_uart, blsp0_spi, NA, qdss_tracedata_a, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) PINGROUP(41, blsp0_uart, blsp0_spi, NA, qdss_tracedata_a, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) PINGROUP(42, blsp1_uart, blsp1_i2c, blsp1_spi, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) PINGROUP(43, blsp1_uart, blsp1_i2c, blsp1_spi, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) PINGROUP(44, blsp1_uart, blsp1_spi, NA, qdss_tracedata_a, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) PINGROUP(45, blsp1_uart, blsp1_spi, qdss_tracedata_a, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) PINGROUP(46, blsp2_uart, blsp2_i2c, blsp2_spi, qdss_tracedata_a, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) PINGROUP(47, blsp2_uart, blsp2_i2c, blsp2_spi, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) PINGROUP(48, blsp2_uart, blsp2_spi, NA, qdss_tracedata_a, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) PINGROUP(49, blsp2_uart, blsp2_spi, NA, qdss_tracedata_a, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) PINGROUP(50, blsp3_uart, blsp3_i2c, blsp3_spi, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) PINGROUP(51, blsp3_uart, blsp3_i2c, blsp3_spi, NA, qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) PINGROUP(52, blsp3_uart, blsp3_spi, NA, qdss_tracedata_a, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) PINGROUP(53, blsp3_uart, blsp3_spi, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) PINGROUP(54, pta2_0, wci2b, cxc1, blsp3_spi1, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) PINGROUP(55, pta2_1, blsp3_spi1, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) PINGROUP(56, pta2_2, wci2b, cxc1, blsp3_spi1, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) PINGROUP(57, pcie0_clk, NA, dbg_out, cri_trng0, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) PINGROUP(58, pcie0_rst, NA, cri_trng1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) PINGROUP(59, pcie0_wake, NA, cri_trng, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) PINGROUP(60, pcie1_clk, rx2, ldo_update, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) PINGROUP(61, pcie1_rst, ldo_en, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) PINGROUP(62, pcie1_wake, gcc_plltest, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) PINGROUP(63, sd_card, pwm0, NA, gcc_plltest, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) PINGROUP(64, pta1_1, pwm1, NA, rx1, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) PINGROUP(65, pta1_2, NA, gcc_tlmm, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) PINGROUP(66, pta1_0, pwm2, prng_rosc, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) PINGROUP(67, sd_write, pwm3, rx0, tsens_max, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) PINGROUP(68, mdc, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) PINGROUP(69, mdio, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) static const struct msm_pinctrl_soc_data ipq8074_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) .pins = ipq8074_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) .npins = ARRAY_SIZE(ipq8074_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) .functions = ipq8074_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) .nfunctions = ARRAY_SIZE(ipq8074_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) .groups = ipq8074_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) .ngroups = ARRAY_SIZE(ipq8074_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) .ngpios = 70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) static int ipq8074_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) return msm_pinctrl_probe(pdev, &ipq8074_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) static const struct of_device_id ipq8074_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) { .compatible = "qcom,ipq8074-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) static struct platform_driver ipq8074_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .name = "ipq8074-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .of_match_table = ipq8074_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) .probe = ipq8074_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) .remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) static int __init ipq8074_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) return platform_driver_register(&ipq8074_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) arch_initcall(ipq8074_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) static void __exit ipq8074_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) platform_driver_unregister(&ipq8074_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) module_exit(ipq8074_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) MODULE_DESCRIPTION("Qualcomm ipq8074 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) MODULE_DEVICE_TABLE(of, ipq8074_pinctrl_of_match);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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