Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    3)  * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    9) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   11) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   13) #define FUNCTION(fname)			                \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   14) 	[msm_mux_##fname] = {		                \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   15) 		.name = #fname,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   16) 		.groups = fname##_groups,               \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   17) 		.ngroups = ARRAY_SIZE(fname##_groups),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   18) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   20) #define REG_SIZE 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   21) #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   22) 	{					        \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   23) 		.name = "gpio" #id,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   24) 		.pins = gpio##id##_pins,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   25) 		.npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   26) 		.funcs = (int[]){			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   27) 			msm_mux_gpio, /* gpio mode */	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   28) 			msm_mux_##f1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   29) 			msm_mux_##f2,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   30) 			msm_mux_##f3,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   31) 			msm_mux_##f4,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   32) 			msm_mux_##f5,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   33) 			msm_mux_##f6,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   34) 			msm_mux_##f7,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   35) 			msm_mux_##f8,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   36) 			msm_mux_##f9			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   37) 		},				        \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   38) 		.nfuncs = 10,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   39) 		.ctl_reg = REG_SIZE * id,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   40) 		.io_reg = 0x4 + REG_SIZE * id,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   41) 		.intr_cfg_reg = 0x8 + REG_SIZE * id,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   42) 		.intr_status_reg = 0xc + REG_SIZE * id,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   43) 		.intr_target_reg = 0x8 + REG_SIZE * id,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   44) 		.mux_bit = 2,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   45) 		.pull_bit = 0,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   46) 		.drv_bit = 6,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   47) 		.oe_bit = 9,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   48) 		.in_bit = 0,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   49) 		.out_bit = 1,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   50) 		.intr_enable_bit = 0,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   51) 		.intr_status_bit = 0,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   52) 		.intr_target_bit = 5,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   53) 		.intr_target_kpss_val = 3,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   54) 		.intr_raw_status_bit = 4,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   55) 		.intr_polarity_bit = 1,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   56) 		.intr_detection_bit = 2,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   57) 		.intr_detection_width = 2,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   58) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   60) static const struct pinctrl_pin_desc ipq6018_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   61) 	PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   62) 	PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   63) 	PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   64) 	PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   65) 	PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   66) 	PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   67) 	PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   68) 	PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   69) 	PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   70) 	PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   71) 	PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   72) 	PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   73) 	PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   74) 	PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   75) 	PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   76) 	PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   77) 	PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   78) 	PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   79) 	PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   80) 	PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   81) 	PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   82) 	PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   83) 	PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   84) 	PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   85) 	PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   86) 	PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   87) 	PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   88) 	PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   89) 	PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   90) 	PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   91) 	PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   92) 	PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   93) 	PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   94) 	PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   95) 	PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   96) 	PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   97) 	PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   98) 	PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   99) 	PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  100) 	PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  101) 	PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  102) 	PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  103) 	PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  104) 	PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  105) 	PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  106) 	PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  107) 	PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  108) 	PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  109) 	PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  110) 	PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  111) 	PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  112) 	PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  113) 	PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  114) 	PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  115) 	PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  116) 	PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  117) 	PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  118) 	PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  119) 	PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  120) 	PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  121) 	PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  122) 	PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  123) 	PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  124) 	PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  125) 	PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  126) 	PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  127) 	PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  128) 	PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  129) 	PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  130) 	PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  131) 	PINCTRL_PIN(70, "GPIO_70"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  132) 	PINCTRL_PIN(71, "GPIO_71"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  133) 	PINCTRL_PIN(72, "GPIO_72"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  134) 	PINCTRL_PIN(73, "GPIO_73"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  135) 	PINCTRL_PIN(74, "GPIO_74"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  136) 	PINCTRL_PIN(75, "GPIO_75"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  137) 	PINCTRL_PIN(76, "GPIO_76"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  138) 	PINCTRL_PIN(77, "GPIO_77"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  139) 	PINCTRL_PIN(78, "GPIO_78"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  140) 	PINCTRL_PIN(79, "GPIO_79"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  143) #define DECLARE_MSM_GPIO_PINS(pin) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  144) 	static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  145) DECLARE_MSM_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  146) DECLARE_MSM_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  147) DECLARE_MSM_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  148) DECLARE_MSM_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  149) DECLARE_MSM_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  150) DECLARE_MSM_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  151) DECLARE_MSM_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  152) DECLARE_MSM_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  153) DECLARE_MSM_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  154) DECLARE_MSM_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  155) DECLARE_MSM_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  156) DECLARE_MSM_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  157) DECLARE_MSM_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  158) DECLARE_MSM_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  159) DECLARE_MSM_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  160) DECLARE_MSM_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  161) DECLARE_MSM_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  162) DECLARE_MSM_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  163) DECLARE_MSM_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  164) DECLARE_MSM_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  165) DECLARE_MSM_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  166) DECLARE_MSM_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  167) DECLARE_MSM_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  168) DECLARE_MSM_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  169) DECLARE_MSM_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  170) DECLARE_MSM_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  171) DECLARE_MSM_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  172) DECLARE_MSM_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  173) DECLARE_MSM_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  174) DECLARE_MSM_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  175) DECLARE_MSM_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  176) DECLARE_MSM_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  177) DECLARE_MSM_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  178) DECLARE_MSM_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  179) DECLARE_MSM_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  180) DECLARE_MSM_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  181) DECLARE_MSM_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  182) DECLARE_MSM_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  183) DECLARE_MSM_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  184) DECLARE_MSM_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  185) DECLARE_MSM_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  186) DECLARE_MSM_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  187) DECLARE_MSM_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  188) DECLARE_MSM_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  189) DECLARE_MSM_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  190) DECLARE_MSM_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  191) DECLARE_MSM_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  192) DECLARE_MSM_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  193) DECLARE_MSM_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  194) DECLARE_MSM_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  195) DECLARE_MSM_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  196) DECLARE_MSM_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  197) DECLARE_MSM_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  198) DECLARE_MSM_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  199) DECLARE_MSM_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  200) DECLARE_MSM_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  201) DECLARE_MSM_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  202) DECLARE_MSM_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  203) DECLARE_MSM_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  204) DECLARE_MSM_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  205) DECLARE_MSM_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  206) DECLARE_MSM_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  207) DECLARE_MSM_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  208) DECLARE_MSM_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  209) DECLARE_MSM_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  210) DECLARE_MSM_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  211) DECLARE_MSM_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  212) DECLARE_MSM_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  213) DECLARE_MSM_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  214) DECLARE_MSM_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  215) DECLARE_MSM_GPIO_PINS(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  216) DECLARE_MSM_GPIO_PINS(71);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  217) DECLARE_MSM_GPIO_PINS(72);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  218) DECLARE_MSM_GPIO_PINS(73);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  219) DECLARE_MSM_GPIO_PINS(74);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  220) DECLARE_MSM_GPIO_PINS(75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  221) DECLARE_MSM_GPIO_PINS(76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  222) DECLARE_MSM_GPIO_PINS(77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  223) DECLARE_MSM_GPIO_PINS(78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  224) DECLARE_MSM_GPIO_PINS(79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  226) enum ipq6018_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  227) 	msm_mux_atest_char,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  228) 	msm_mux_atest_char0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  229) 	msm_mux_atest_char1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  230) 	msm_mux_atest_char2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  231) 	msm_mux_atest_char3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  232) 	msm_mux_audio0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  233) 	msm_mux_audio1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  234) 	msm_mux_audio2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  235) 	msm_mux_audio3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  236) 	msm_mux_audio_rxbclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  237) 	msm_mux_audio_rxfsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  238) 	msm_mux_audio_rxmclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  239) 	msm_mux_audio_rxmclkin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  240) 	msm_mux_audio_txbclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  241) 	msm_mux_audio_txfsync,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  242) 	msm_mux_audio_txmclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  243) 	msm_mux_audio_txmclkin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  244) 	msm_mux_blsp0_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  245) 	msm_mux_blsp0_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  246) 	msm_mux_blsp0_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  247) 	msm_mux_blsp1_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  248) 	msm_mux_blsp1_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  249) 	msm_mux_blsp1_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  250) 	msm_mux_blsp2_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  251) 	msm_mux_blsp2_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  252) 	msm_mux_blsp2_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  253) 	msm_mux_blsp3_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  254) 	msm_mux_blsp3_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  255) 	msm_mux_blsp3_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  256) 	msm_mux_blsp4_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  257) 	msm_mux_blsp4_spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  258) 	msm_mux_blsp4_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  259) 	msm_mux_blsp5_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  260) 	msm_mux_blsp5_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  261) 	msm_mux_burn0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  262) 	msm_mux_burn1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  263) 	msm_mux_cri_trng,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  264) 	msm_mux_cri_trng0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  265) 	msm_mux_cri_trng1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  266) 	msm_mux_cxc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  267) 	msm_mux_cxc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  268) 	msm_mux_dbg_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  269) 	msm_mux_gcc_plltest,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  270) 	msm_mux_gcc_tlmm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  271) 	msm_mux_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  272) 	msm_mux_lpass_aud,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  273) 	msm_mux_lpass_aud0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  274) 	msm_mux_lpass_aud1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  275) 	msm_mux_lpass_aud2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  276) 	msm_mux_lpass_pcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  277) 	msm_mux_lpass_pdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  278) 	msm_mux_mac00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  279) 	msm_mux_mac01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  280) 	msm_mux_mac10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  281) 	msm_mux_mac11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  282) 	msm_mux_mac12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  283) 	msm_mux_mac13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  284) 	msm_mux_mac20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  285) 	msm_mux_mac21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  286) 	msm_mux_mdc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  287) 	msm_mux_mdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  288) 	msm_mux_pcie0_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  289) 	msm_mux_pcie0_rst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  290) 	msm_mux_pcie0_wake,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  291) 	msm_mux_prng_rosc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  292) 	msm_mux_pta1_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  293) 	msm_mux_pta1_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  294) 	msm_mux_pta1_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  295) 	msm_mux_pta2_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  296) 	msm_mux_pta2_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  297) 	msm_mux_pta2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  298) 	msm_mux_pwm00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  299) 	msm_mux_pwm01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  300) 	msm_mux_pwm02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  301) 	msm_mux_pwm03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  302) 	msm_mux_pwm04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  303) 	msm_mux_pwm10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  304) 	msm_mux_pwm11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  305) 	msm_mux_pwm12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  306) 	msm_mux_pwm13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  307) 	msm_mux_pwm14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  308) 	msm_mux_pwm20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  309) 	msm_mux_pwm21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  310) 	msm_mux_pwm22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  311) 	msm_mux_pwm23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  312) 	msm_mux_pwm24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  313) 	msm_mux_pwm30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  314) 	msm_mux_pwm31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  315) 	msm_mux_pwm32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  316) 	msm_mux_pwm33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  317) 	msm_mux_qdss_cti_trig_in_a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  318) 	msm_mux_qdss_cti_trig_in_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  319) 	msm_mux_qdss_cti_trig_out_a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  320) 	msm_mux_qdss_cti_trig_out_a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  321) 	msm_mux_qdss_cti_trig_in_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  322) 	msm_mux_qdss_cti_trig_in_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  323) 	msm_mux_qdss_cti_trig_out_b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  324) 	msm_mux_qdss_cti_trig_out_b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  325) 	msm_mux_qdss_traceclk_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  326) 	msm_mux_qdss_tracectl_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  327) 	msm_mux_qdss_tracedata_a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  328) 	msm_mux_qdss_traceclk_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  329) 	msm_mux_qdss_tracectl_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  330) 	msm_mux_qdss_tracedata_b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  331) 	msm_mux_qpic_pad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  332) 	msm_mux_rx0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  333) 	msm_mux_rx1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  334) 	msm_mux_rx_swrm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  335) 	msm_mux_rx_swrm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  336) 	msm_mux_rx_swrm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  337) 	msm_mux_sd_card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  338) 	msm_mux_sd_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  339) 	msm_mux_tsens_max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  340) 	msm_mux_tx_swrm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  341) 	msm_mux_tx_swrm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  342) 	msm_mux_tx_swrm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  343) 	msm_mux_tx_swrm2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  344) 	msm_mux_wci20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  345) 	msm_mux_wci21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  346) 	msm_mux_wci22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  347) 	msm_mux_wci23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  348) 	msm_mux_wsa_swrm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  349) 	msm_mux__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  352) static const char * const blsp3_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  353) 	"gpio73", "gpio74", "gpio75", "gpio76",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  356) static const char * const blsp3_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  357) 	"gpio73", "gpio74",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  358) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  360) static const char * const blsp3_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  361) 	"gpio73", "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", "gpio79",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  362) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  363) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  364) static const char * const wci20_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  365) 	"gpio0", "gpio2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  368) static const char * const qpic_pad_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  369) 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio9", "gpio10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  370) 	"gpio11", "gpio17", "gpio15", "gpio12", "gpio13", "gpio14", "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  371) 	"gpio6", "gpio7", "gpio8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  372) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  374) static const char * const burn0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  375) 	"gpio0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  376) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  378) static const char * const mac12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  379) 	"gpio1", "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  380) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  382) static const char * const qdss_tracectl_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  383) 	"gpio1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  386) static const char * const burn1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  387) 	"gpio1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  388) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  390) static const char * const qdss_traceclk_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  391) 	"gpio0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  394) static const char * const qdss_tracedata_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  395) 	"gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio8", "gpio9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  396) 	"gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  397) 	"gpio17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  399) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  400) static const char * const mac01_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  401) 	"gpio3", "gpio4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  402) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  404) static const char * const mac21_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  405) 	"gpio5", "gpio6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  406) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  408) static const char * const atest_char_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  409) 	"gpio9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  410) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  412) static const char * const cxc0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  413) 	"gpio9", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  416) static const char * const mac13_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  417) 	"gpio9", "gpio16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  418) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  420) static const char * const dbg_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  421) 	"gpio9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  422) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  424) static const char * const wci22_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  425) 	"gpio11", "gpio17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  426) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  428) static const char * const pwm00_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  429) 	"gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  430) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  431) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  432) static const char * const atest_char0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  433) 	"gpio18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  434) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  436) static const char * const wci23_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  437) 	"gpio18", "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  438) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  440) static const char * const mac11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  441) 	"gpio18", "gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  442) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  444) static const char * const pwm10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  445) 	"gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  446) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  448) static const char * const atest_char1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  449) 	"gpio19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  450) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  452) static const char * const pwm20_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  453) 	"gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  454) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  455) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  456) static const char * const atest_char2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  457) 	"gpio20",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  458) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  459) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  460) static const char * const pwm30_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  461) 	"gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  462) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  463) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  464) static const char * const atest_char3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  465) 	"gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  466) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  467) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  468) static const char * const audio_txmclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  469) 	"gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  470) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  472) static const char * const audio_txmclkin_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  473) 	"gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  475) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  476) static const char * const pwm02_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  477) 	"gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  478) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  479) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  480) static const char * const tx_swrm0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  481) 	"gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  482) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  483) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  484) static const char * const qdss_cti_trig_out_b0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  485) 	"gpio22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  486) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  487) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  488) static const char * const audio_txbclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  489) 	"gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  490) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  491) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  492) static const char * const pwm12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  493) 	"gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  494) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  496) static const char * const wsa_swrm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  497) 	"gpio23", "gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  498) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  499) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  500) static const char * const tx_swrm1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  501) 	"gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  502) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  503) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  504) static const char * const qdss_cti_trig_in_b0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  505) 	"gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  506) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  507) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  508) static const char * const audio_txfsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  509) 	"gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  510) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  512) static const char * const pwm22_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  513) 	"gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  514) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  515) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  516) static const char * const tx_swrm2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  517) 	"gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  518) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  519) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  520) static const char * const qdss_cti_trig_out_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  521) 	"gpio24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  522) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  524) static const char * const audio0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  525) 	"gpio25", "gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  526) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  527) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  528) static const char * const pwm32_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  529) 	"gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  530) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  532) static const char * const tx_swrm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  533) 	"gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  534) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  535) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  536) static const char * const qdss_cti_trig_in_b1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  537) 	"gpio25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  538) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  540) static const char * const audio1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  541) 	"gpio26", "gpio33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  542) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  543) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  544) static const char * const pwm04_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  545) 	"gpio26",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  546) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  547) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  548) static const char * const audio2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  549) 	"gpio27",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  551) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  552) static const char * const pwm14_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  553) 	"gpio27",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  554) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  555) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  556) static const char * const audio3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  557) 	"gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  558) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  559) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  560) static const char * const pwm24_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  561) 	"gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  562) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  563) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  564) static const char * const audio_rxmclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  565) 	"gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  566) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  567) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  568) static const char * const audio_rxmclkin_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  569) 	"gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  570) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  571) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  572) static const char * const pwm03_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  573) 	"gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  574) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  575) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  576) static const char * const lpass_pdm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  577) 	"gpio29", "gpio30", "gpio31", "gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  579) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  580) static const char * const lpass_aud_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  581) 	"gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  584) static const char * const qdss_cti_trig_in_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  585) 	"gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  586) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  587) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  588) static const char * const audio_rxbclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  589) 	"gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  590) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  591) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  592) static const char * const pwm13_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  593) 	"gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  594) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  595) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  596) static const char * const lpass_aud0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  597) 	"gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  598) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  599) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  600) static const char * const rx_swrm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  601) 	"gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  602) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  603) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  604) static const char * const qdss_cti_trig_out_a1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  605) 	"gpio30",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  606) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  607) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  608) static const char * const audio_rxfsync_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  609) 	"gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  610) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  611) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  612) static const char * const pwm23_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  613) 	"gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  614) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  615) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  616) static const char * const lpass_aud1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  617) 	"gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  618) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  619) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  620) static const char * const rx_swrm0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  621) 	"gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  622) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  623) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  624) static const char * const qdss_cti_trig_in_a0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  625) 	"gpio31",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  627) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  628) static const char * const pwm33_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  629) 	"gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  630) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  631) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  632) static const char * const lpass_aud2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  633) 	"gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  634) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  635) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  636) static const char * const rx_swrm1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  637) 	"gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  638) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  639) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  640) static const char * const qdss_cti_trig_out_a0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  641) 	"gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  642) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  643) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  644) static const char * const lpass_pcm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  645) 	"gpio34", "gpio35", "gpio36", "gpio37",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  646) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  647) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  648) static const char * const mac10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  649) 	"gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  650) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  651) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  652) static const char * const mac00_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  653) 	"gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  654) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  655) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  656) static const char * const mac20_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  657) 	"gpio36", "gpio37",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  658) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  659) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  660) static const char * const blsp0_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  661) 	"gpio38", "gpio39", "gpio40", "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  662) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  663) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  664) static const char * const blsp0_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  665) 	"gpio38", "gpio39",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  666) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  667) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  668) static const char * const blsp0_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  669) 	"gpio38", "gpio39", "gpio40", "gpio41",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  670) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  671) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  672) static const char * const blsp2_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  673) 	"gpio42", "gpio43", "gpio44", "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  674) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  675) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  676) static const char * const blsp2_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  677) 	"gpio42", "gpio43",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  678) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  679) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  680) static const char * const blsp2_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  681) 	"gpio42", "gpio43", "gpio44", "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  682) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  683) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  684) static const char * const blsp5_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  685) 	"gpio46", "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  686) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  687) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  688) static const char * const blsp5_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  689) 	"gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  691) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  692) static const char * const qdss_traceclk_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  693) 	"gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  694) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  695) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  696) static const char * const qdss_tracectl_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  697) 	"gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  698) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  699) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  700) static const char * const pwm01_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  701) 	"gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  702) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  703) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  704) static const char * const pta1_1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  705) 	"gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  706) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  707) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  708) static const char * const pwm11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  709) 	"gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  710) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  711) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  712) static const char * const rx1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  713) 	"gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  715) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  716) static const char * const pta1_2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  717) 	"gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  718) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  719) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  720) static const char * const pwm21_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  721) 	"gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  722) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  723) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  724) static const char * const pta1_0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  725) 	"gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  726) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  727) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  728) static const char * const pwm31_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  729) 	"gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  730) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  731) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  732) static const char * const prng_rosc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  733) 	"gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  734) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  735) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  736) static const char * const blsp4_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  737) 	"gpio55", "gpio56", "gpio57", "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  738) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  739) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  740) static const char * const blsp4_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  741) 	"gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  743) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  744) static const char * const blsp4_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  745) 	"gpio55", "gpio56", "gpio57", "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  746) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  747) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  748) static const char * const pcie0_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  749) 	"gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  750) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  751) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  752) static const char * const cri_trng0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  753) 	"gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  754) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  755) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  756) static const char * const pcie0_rst_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  757) 	"gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  758) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  759) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  760) static const char * const cri_trng1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  761) 	"gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  763) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  764) static const char * const pcie0_wake_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  765) 	"gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  766) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  767) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  768) static const char * const cri_trng_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  769) 	"gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  770) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  771) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  772) static const char * const sd_card_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  773) 	"gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  774) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  775) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  776) static const char * const sd_write_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  777) 	"gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  778) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  779) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  780) static const char * const rx0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  781) 	"gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  782) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  783) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  784) static const char * const tsens_max_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  785) 	"gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  786) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  787) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  788) static const char * const mdc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  789) 	"gpio64",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  790) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  791) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  792) static const char * const qdss_tracedata_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  793) 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  794) 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  795) 	"gpio78", "gpio79",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  796) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  797) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  798) static const char * const mdio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  799) 	"gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  800) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  801) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  802) static const char * const pta2_0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  803) 	"gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  805) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  806) static const char * const wci21_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  807) 	"gpio66", "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  808) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  809) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  810) static const char * const cxc1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  811) 	"gpio66", "gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  812) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  813) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  814) static const char * const pta2_1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  815) 	"gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  816) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  817) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  818) static const char * const pta2_2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  819) 	"gpio68",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  820) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  821) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  822) static const char * const blsp1_uart_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  823) 	"gpio69", "gpio70", "gpio71", "gpio72",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  824) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  825) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  826) static const char * const blsp1_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  827) 	"gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  828) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  829) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  830) static const char * const blsp1_spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  831) 	"gpio69", "gpio70", "gpio71", "gpio72",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  832) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  833) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  834) static const char * const gcc_plltest_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  835) 	"gpio69", "gpio71",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  836) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  837) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  838) static const char * const gcc_tlmm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  839) 	"gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  840) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  841) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  842) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  843) 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  844) 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  845) 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  846) 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  847) 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  848) 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  849) 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  850) 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  851) 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  852) 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  853) 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  854) 	"gpio78", "gpio79",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  855) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  856) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  857) static const struct msm_function ipq6018_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  858) 	FUNCTION(atest_char),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  859) 	FUNCTION(atest_char0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  860) 	FUNCTION(atest_char1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  861) 	FUNCTION(atest_char2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  862) 	FUNCTION(atest_char3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  863) 	FUNCTION(audio0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  864) 	FUNCTION(audio1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  865) 	FUNCTION(audio2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  866) 	FUNCTION(audio3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  867) 	FUNCTION(audio_rxbclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  868) 	FUNCTION(audio_rxfsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  869) 	FUNCTION(audio_rxmclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  870) 	FUNCTION(audio_rxmclkin),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  871) 	FUNCTION(audio_txbclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  872) 	FUNCTION(audio_txfsync),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  873) 	FUNCTION(audio_txmclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  874) 	FUNCTION(audio_txmclkin),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  875) 	FUNCTION(blsp0_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  876) 	FUNCTION(blsp0_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  877) 	FUNCTION(blsp0_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  878) 	FUNCTION(blsp1_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  879) 	FUNCTION(blsp1_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  880) 	FUNCTION(blsp1_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  881) 	FUNCTION(blsp2_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  882) 	FUNCTION(blsp2_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  883) 	FUNCTION(blsp2_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  884) 	FUNCTION(blsp3_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  885) 	FUNCTION(blsp3_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  886) 	FUNCTION(blsp3_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  887) 	FUNCTION(blsp4_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  888) 	FUNCTION(blsp4_spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  889) 	FUNCTION(blsp4_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  890) 	FUNCTION(blsp5_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  891) 	FUNCTION(blsp5_uart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  892) 	FUNCTION(burn0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  893) 	FUNCTION(burn1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  894) 	FUNCTION(cri_trng),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  895) 	FUNCTION(cri_trng0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  896) 	FUNCTION(cri_trng1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  897) 	FUNCTION(cxc0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  898) 	FUNCTION(cxc1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  899) 	FUNCTION(dbg_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  900) 	FUNCTION(gcc_plltest),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  901) 	FUNCTION(gcc_tlmm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  902) 	FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  903) 	FUNCTION(lpass_aud),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  904) 	FUNCTION(lpass_aud0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  905) 	FUNCTION(lpass_aud1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  906) 	FUNCTION(lpass_aud2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  907) 	FUNCTION(lpass_pcm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  908) 	FUNCTION(lpass_pdm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  909) 	FUNCTION(mac00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  910) 	FUNCTION(mac01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  911) 	FUNCTION(mac10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  912) 	FUNCTION(mac11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  913) 	FUNCTION(mac12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  914) 	FUNCTION(mac13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  915) 	FUNCTION(mac20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  916) 	FUNCTION(mac21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  917) 	FUNCTION(mdc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  918) 	FUNCTION(mdio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  919) 	FUNCTION(pcie0_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  920) 	FUNCTION(pcie0_rst),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  921) 	FUNCTION(pcie0_wake),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  922) 	FUNCTION(prng_rosc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  923) 	FUNCTION(pta1_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  924) 	FUNCTION(pta1_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  925) 	FUNCTION(pta1_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  926) 	FUNCTION(pta2_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  927) 	FUNCTION(pta2_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  928) 	FUNCTION(pta2_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  929) 	FUNCTION(pwm00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  930) 	FUNCTION(pwm01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  931) 	FUNCTION(pwm02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  932) 	FUNCTION(pwm03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  933) 	FUNCTION(pwm04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  934) 	FUNCTION(pwm10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  935) 	FUNCTION(pwm11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  936) 	FUNCTION(pwm12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  937) 	FUNCTION(pwm13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  938) 	FUNCTION(pwm14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  939) 	FUNCTION(pwm20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  940) 	FUNCTION(pwm21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  941) 	FUNCTION(pwm22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  942) 	FUNCTION(pwm23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  943) 	FUNCTION(pwm24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  944) 	FUNCTION(pwm30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  945) 	FUNCTION(pwm31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  946) 	FUNCTION(pwm32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  947) 	FUNCTION(pwm33),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  948) 	FUNCTION(qdss_cti_trig_in_a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  949) 	FUNCTION(qdss_cti_trig_in_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  950) 	FUNCTION(qdss_cti_trig_out_a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  951) 	FUNCTION(qdss_cti_trig_out_a1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  952) 	FUNCTION(qdss_cti_trig_in_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  953) 	FUNCTION(qdss_cti_trig_in_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  954) 	FUNCTION(qdss_cti_trig_out_b0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  955) 	FUNCTION(qdss_cti_trig_out_b1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  956) 	FUNCTION(qdss_traceclk_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  957) 	FUNCTION(qdss_tracectl_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  958) 	FUNCTION(qdss_tracedata_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  959) 	FUNCTION(qdss_traceclk_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  960) 	FUNCTION(qdss_tracectl_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  961) 	FUNCTION(qdss_tracedata_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  962) 	FUNCTION(qpic_pad),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  963) 	FUNCTION(rx0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  964) 	FUNCTION(rx1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  965) 	FUNCTION(rx_swrm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  966) 	FUNCTION(rx_swrm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  967) 	FUNCTION(rx_swrm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  968) 	FUNCTION(sd_card),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  969) 	FUNCTION(sd_write),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  970) 	FUNCTION(tsens_max),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  971) 	FUNCTION(tx_swrm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  972) 	FUNCTION(tx_swrm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  973) 	FUNCTION(tx_swrm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  974) 	FUNCTION(tx_swrm2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  975) 	FUNCTION(wci20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  976) 	FUNCTION(wci21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  977) 	FUNCTION(wci22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  978) 	FUNCTION(wci23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  979) 	FUNCTION(wsa_swrm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  980) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  981) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  982) static const struct msm_pingroup ipq6018_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  983) 	PINGROUP(0, qpic_pad, wci20, qdss_traceclk_b, _, burn0, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  984) 	PINGROUP(1, qpic_pad, mac12, qdss_tracectl_b, _, burn1, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  985) 	PINGROUP(2, qpic_pad, wci20, qdss_tracedata_b, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  986) 	PINGROUP(3, qpic_pad, mac01, qdss_tracedata_b, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  987) 	PINGROUP(4, qpic_pad, mac01, qdss_tracedata_b, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  988) 	PINGROUP(5, qpic_pad, mac21, qdss_tracedata_b, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  989) 	PINGROUP(6, qpic_pad, mac21, qdss_tracedata_b, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  990) 	PINGROUP(7, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  991) 	PINGROUP(8, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  992) 	PINGROUP(9, qpic_pad, atest_char, cxc0, mac13, dbg_out, qdss_tracedata_b, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  993) 	PINGROUP(10, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  994) 	PINGROUP(11, qpic_pad, wci22, mac12, qdss_tracedata_b, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  995) 	PINGROUP(12, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  996) 	PINGROUP(13, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  997) 	PINGROUP(14, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  998) 	PINGROUP(15, qpic_pad, qdss_tracedata_b, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  999) 	PINGROUP(16, qpic_pad, cxc0, mac13, qdss_tracedata_b, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) 	PINGROUP(17, qpic_pad, qdss_tracedata_b, wci22, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) 	PINGROUP(18, pwm00, atest_char0, wci23, mac11, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) 	PINGROUP(19, pwm10, atest_char1, wci23, mac11, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) 	PINGROUP(20, pwm20, atest_char2, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) 	PINGROUP(21, pwm30, atest_char3, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) 	PINGROUP(22, audio_txmclk, audio_txmclkin, pwm02, tx_swrm0, _, qdss_cti_trig_out_b0, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) 	PINGROUP(23, audio_txbclk, pwm12, wsa_swrm, tx_swrm1, _, qdss_cti_trig_in_b0, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) 	PINGROUP(24, audio_txfsync, pwm22, wsa_swrm, tx_swrm2, _, qdss_cti_trig_out_b1, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) 	PINGROUP(25, audio0, pwm32, tx_swrm, _, qdss_cti_trig_in_b1, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) 	PINGROUP(26, audio1, pwm04, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) 	PINGROUP(27, audio2, pwm14, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) 	PINGROUP(28, audio3, pwm24, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) 	PINGROUP(29, audio_rxmclk, audio_rxmclkin, pwm03, lpass_pdm, lpass_aud, qdss_cti_trig_in_a1, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) 	PINGROUP(30, audio_rxbclk, pwm13, lpass_pdm, lpass_aud0, rx_swrm, _, qdss_cti_trig_out_a1, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) 	PINGROUP(31, audio_rxfsync, pwm23, lpass_pdm, lpass_aud1, rx_swrm0, _, qdss_cti_trig_in_a0, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) 	PINGROUP(32, audio0, pwm33, lpass_pdm, lpass_aud2, rx_swrm1, _, qdss_cti_trig_out_a0, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) 	PINGROUP(33, audio1, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) 	PINGROUP(34, lpass_pcm, mac10, mac00, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) 	PINGROUP(35, lpass_pcm, mac10, mac00, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) 	PINGROUP(36, lpass_pcm, mac20, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) 	PINGROUP(37, lpass_pcm, mac20, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) 	PINGROUP(38, blsp0_uart, blsp0_i2c, blsp0_spi, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) 	PINGROUP(39, blsp0_uart, blsp0_i2c, blsp0_spi, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) 	PINGROUP(40, blsp0_uart, blsp0_spi, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) 	PINGROUP(41, blsp0_uart, blsp0_spi, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) 	PINGROUP(42, blsp2_uart, blsp2_i2c, blsp2_spi, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) 	PINGROUP(43, blsp2_uart, blsp2_i2c, blsp2_spi, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) 	PINGROUP(44, blsp2_uart, blsp2_spi, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) 	PINGROUP(45, blsp2_uart, blsp2_spi, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) 	PINGROUP(46, blsp5_i2c, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) 	PINGROUP(47, blsp5_i2c, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) 	PINGROUP(48, blsp5_uart, _, qdss_traceclk_a, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) 	PINGROUP(49, blsp5_uart, _, qdss_tracectl_a, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) 	PINGROUP(50, pwm01, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) 	PINGROUP(51, pta1_1, pwm11, _, rx1, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) 	PINGROUP(52, pta1_2, pwm21, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) 	PINGROUP(53, pta1_0, pwm31, prng_rosc, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) 	PINGROUP(54, _, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) 	PINGROUP(55, blsp4_uart, blsp4_i2c, blsp4_spi, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) 	PINGROUP(56, blsp4_uart, blsp4_i2c, blsp4_spi, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) 	PINGROUP(57, blsp4_uart, blsp4_spi, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) 	PINGROUP(58, blsp4_uart, blsp4_spi, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) 	PINGROUP(59, pcie0_clk, _, _, cri_trng0, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) 	PINGROUP(60, pcie0_rst, _, _, cri_trng1, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) 	PINGROUP(61, pcie0_wake, _, _, cri_trng, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) 	PINGROUP(62, sd_card, _, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) 	PINGROUP(63, sd_write, rx0, _, tsens_max, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) 	PINGROUP(64, mdc, _, qdss_tracedata_a, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) 	PINGROUP(65, mdio, _, qdss_tracedata_a, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) 	PINGROUP(66, pta2_0, wci21, cxc1, qdss_tracedata_a, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) 	PINGROUP(67, pta2_1, qdss_tracedata_a, _, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) 	PINGROUP(68, pta2_2, wci21, cxc1, qdss_tracedata_a, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) 	PINGROUP(69, blsp1_uart, blsp1_i2c, blsp1_spi, gcc_plltest, qdss_tracedata_a, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) 	PINGROUP(70, blsp1_uart, blsp1_i2c, blsp1_spi, gcc_tlmm, qdss_tracedata_a, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) 	PINGROUP(71, blsp1_uart, blsp1_spi, gcc_plltest, qdss_tracedata_a, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) 	PINGROUP(72, blsp1_uart, blsp1_spi, qdss_tracedata_a, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) 	PINGROUP(73, blsp3_uart, blsp3_i2c, blsp3_spi, _, qdss_tracedata_a, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) 	PINGROUP(74, blsp3_uart, blsp3_i2c, blsp3_spi, _, qdss_tracedata_a, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) 	PINGROUP(75, blsp3_uart, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) 	PINGROUP(76, blsp3_uart, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) 	PINGROUP(77, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) 	PINGROUP(78, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) 	PINGROUP(79, blsp3_spi, _, qdss_tracedata_a, _, _, _, _, _, _),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) static const struct msm_pinctrl_soc_data ipq6018_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) 	.pins = ipq6018_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) 	.npins = ARRAY_SIZE(ipq6018_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) 	.functions = ipq6018_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) 	.nfunctions = ARRAY_SIZE(ipq6018_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) 	.groups = ipq6018_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) 	.ngroups = ARRAY_SIZE(ipq6018_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) 	.ngpios = 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) static int ipq6018_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) 	return msm_pinctrl_probe(pdev, &ipq6018_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) static const struct of_device_id ipq6018_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) 	{ .compatible = "qcom,ipq6018-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) static struct platform_driver ipq6018_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) 		.name = "ipq6018-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) 		.of_match_table = ipq6018_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) 	.probe = ipq6018_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) 	.remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) static int __init ipq6018_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) 	return platform_driver_register(&ipq6018_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) arch_initcall(ipq6018_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) static void __exit ipq6018_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) 	platform_driver_unregister(&ipq6018_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) module_exit(ipq6018_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) MODULE_DESCRIPTION("QTI ipq6018 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) MODULE_DEVICE_TABLE(of, ipq6018_pinctrl_of_match);