^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2015, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const struct pinctrl_pin_desc ipq4019_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PINCTRL_PIN(70, "GPIO_70"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PINCTRL_PIN(71, "GPIO_71"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PINCTRL_PIN(72, "GPIO_72"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PINCTRL_PIN(73, "GPIO_73"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(74, "GPIO_74"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(75, "GPIO_75"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(76, "GPIO_76"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(77, "GPIO_77"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(78, "GPIO_78"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PINCTRL_PIN(79, "GPIO_79"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(80, "GPIO_80"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(81, "GPIO_81"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(82, "GPIO_82"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(83, "GPIO_83"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(84, "GPIO_84"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(85, "GPIO_85"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(86, "GPIO_86"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(87, "GPIO_87"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(88, "GPIO_88"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(89, "GPIO_89"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(90, "GPIO_90"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(91, "GPIO_91"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(92, "GPIO_92"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(93, "GPIO_93"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(94, "GPIO_94"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(95, "GPIO_95"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(96, "GPIO_96"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(97, "GPIO_97"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(98, "GPIO_98"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(99, "GPIO_99"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define DECLARE_QCA_GPIO_PINS(pin) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) DECLARE_QCA_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) DECLARE_QCA_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) DECLARE_QCA_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) DECLARE_QCA_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) DECLARE_QCA_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) DECLARE_QCA_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) DECLARE_QCA_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) DECLARE_QCA_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) DECLARE_QCA_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) DECLARE_QCA_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) DECLARE_QCA_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) DECLARE_QCA_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) DECLARE_QCA_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) DECLARE_QCA_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) DECLARE_QCA_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) DECLARE_QCA_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) DECLARE_QCA_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) DECLARE_QCA_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) DECLARE_QCA_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) DECLARE_QCA_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) DECLARE_QCA_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) DECLARE_QCA_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) DECLARE_QCA_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) DECLARE_QCA_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) DECLARE_QCA_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) DECLARE_QCA_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) DECLARE_QCA_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) DECLARE_QCA_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) DECLARE_QCA_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) DECLARE_QCA_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) DECLARE_QCA_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) DECLARE_QCA_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) DECLARE_QCA_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) DECLARE_QCA_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) DECLARE_QCA_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) DECLARE_QCA_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) DECLARE_QCA_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) DECLARE_QCA_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) DECLARE_QCA_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) DECLARE_QCA_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) DECLARE_QCA_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) DECLARE_QCA_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) DECLARE_QCA_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) DECLARE_QCA_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) DECLARE_QCA_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) DECLARE_QCA_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) DECLARE_QCA_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) DECLARE_QCA_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) DECLARE_QCA_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) DECLARE_QCA_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) DECLARE_QCA_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) DECLARE_QCA_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) DECLARE_QCA_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) DECLARE_QCA_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) DECLARE_QCA_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) DECLARE_QCA_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) DECLARE_QCA_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) DECLARE_QCA_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) DECLARE_QCA_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) DECLARE_QCA_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) DECLARE_QCA_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) DECLARE_QCA_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) DECLARE_QCA_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) DECLARE_QCA_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) DECLARE_QCA_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) DECLARE_QCA_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) DECLARE_QCA_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) DECLARE_QCA_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) DECLARE_QCA_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) DECLARE_QCA_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) DECLARE_QCA_GPIO_PINS(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) DECLARE_QCA_GPIO_PINS(71);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) DECLARE_QCA_GPIO_PINS(72);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) DECLARE_QCA_GPIO_PINS(73);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) DECLARE_QCA_GPIO_PINS(74);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) DECLARE_QCA_GPIO_PINS(75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) DECLARE_QCA_GPIO_PINS(76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) DECLARE_QCA_GPIO_PINS(77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) DECLARE_QCA_GPIO_PINS(78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) DECLARE_QCA_GPIO_PINS(79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) DECLARE_QCA_GPIO_PINS(80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) DECLARE_QCA_GPIO_PINS(81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) DECLARE_QCA_GPIO_PINS(82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) DECLARE_QCA_GPIO_PINS(83);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) DECLARE_QCA_GPIO_PINS(84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) DECLARE_QCA_GPIO_PINS(85);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) DECLARE_QCA_GPIO_PINS(86);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) DECLARE_QCA_GPIO_PINS(87);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) DECLARE_QCA_GPIO_PINS(88);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) DECLARE_QCA_GPIO_PINS(89);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) DECLARE_QCA_GPIO_PINS(90);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) DECLARE_QCA_GPIO_PINS(91);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) DECLARE_QCA_GPIO_PINS(92);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) DECLARE_QCA_GPIO_PINS(93);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) DECLARE_QCA_GPIO_PINS(94);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) DECLARE_QCA_GPIO_PINS(95);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) DECLARE_QCA_GPIO_PINS(96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) DECLARE_QCA_GPIO_PINS(97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) DECLARE_QCA_GPIO_PINS(98);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) DECLARE_QCA_GPIO_PINS(99);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) [qca_mux_##fname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .name = "gpio" #id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .pins = gpio##id##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .npins = (unsigned)ARRAY_SIZE(gpio##id##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .funcs = (int[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) qca_mux_gpio, /* gpio mode */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) qca_mux_##f1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) qca_mux_##f2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) qca_mux_##f3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) qca_mux_##f4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) qca_mux_##f5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) qca_mux_##f6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) qca_mux_##f7, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) qca_mux_##f8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) qca_mux_##f9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) qca_mux_##f10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) qca_mux_##f11, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) qca_mux_##f12, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) qca_mux_##f13, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) qca_mux_##f14 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .nfuncs = 15, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .ctl_reg = 0x0 + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .io_reg = 0x4 + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .intr_cfg_reg = 0x8 + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .intr_status_reg = 0xc + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .intr_target_reg = 0x8 + 0x1000 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .mux_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .pull_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .drv_bit = 6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .od_bit = 12, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .oe_bit = 9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .in_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .out_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .intr_enable_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .intr_status_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .intr_target_bit = 5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .intr_raw_status_bit = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .intr_polarity_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .intr_detection_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .intr_detection_width = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) enum ipq4019_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) qca_mux_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) qca_mux_aud_pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) qca_mux_audio_pwm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) qca_mux_blsp_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) qca_mux_blsp_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) qca_mux_blsp_spi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) qca_mux_blsp_spi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) qca_mux_blsp_uart0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) qca_mux_blsp_uart1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) qca_mux_chip_rst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) qca_mux_i2s_rx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) qca_mux_i2s_spdif_in,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) qca_mux_i2s_spdif_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) qca_mux_i2s_td,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) qca_mux_i2s_tx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) qca_mux_jtag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) qca_mux_led0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) qca_mux_led1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) qca_mux_led2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) qca_mux_led3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) qca_mux_led4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) qca_mux_led5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) qca_mux_led6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) qca_mux_led7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) qca_mux_led8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) qca_mux_led9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) qca_mux_led10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) qca_mux_led11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) qca_mux_mdc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) qca_mux_mdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) qca_mux_pcie,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) qca_mux_pmu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) qca_mux_prng_rosc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) qca_mux_qpic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) qca_mux_rgmii,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) qca_mux_rmii,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) qca_mux_sdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) qca_mux_smart0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) qca_mux_smart1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) qca_mux_smart2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) qca_mux_smart3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) qca_mux_tm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) qca_mux_wifi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) qca_mux_wifi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) qca_mux_NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) "gpio99",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static const char * const aud_pin_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) "gpio48", "gpio49", "gpio50", "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static const char * const audio_pwm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) "gpio30", "gpio31", "gpio32", "gpio33", "gpio64", "gpio65", "gpio66",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) "gpio67",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static const char * const blsp_i2c0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) "gpio10", "gpio11", "gpio20", "gpio21", "gpio58", "gpio59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static const char * const blsp_i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) "gpio12", "gpio13", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static const char * const blsp_spi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) "gpio12", "gpio13", "gpio14", "gpio15", "gpio45", "gpio54", "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) "gpio56", "gpio57",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static const char * const blsp_spi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) "gpio44", "gpio45", "gpio46", "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static const char * const blsp_uart0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) "gpio16", "gpio17", "gpio60", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static const char * const blsp_uart1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) "gpio8", "gpio9", "gpio10", "gpio11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static const char * const chip_rst_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) "gpio62",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static const char * const i2s_rx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) "gpio0", "gpio1", "gpio2", "gpio20", "gpio21", "gpio22", "gpio23",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) "gpio58", "gpio60", "gpio61", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static const char * const i2s_spdif_in_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) "gpio34", "gpio59", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static const char * const i2s_spdif_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) "gpio35", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static const char * const i2s_td_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) "gpio27", "gpio28", "gpio29", "gpio54", "gpio55", "gpio56", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static const char * const i2s_tx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) "gpio24", "gpio25", "gpio26", "gpio52", "gpio53", "gpio57", "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static const char * const jtag_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static const char * const led0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) "gpio16", "gpio36", "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static const char * const led1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) "gpio17", "gpio37", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static const char * const led2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) "gpio36", "gpio38", "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static const char * const led3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) "gpio39",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static const char * const led4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) "gpio40",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static const char * const led5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) "gpio44",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static const char * const led6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) "gpio45",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static const char * const led7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static const char * const led8_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static const char * const led9_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) "gpio48",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static const char * const led10_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static const char * const led11_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) "gpio50",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static const char * const mdc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) "gpio7", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static const char * const mdio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) "gpio6", "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static const char * const pcie_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) "gpio39", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static const char * const pmu_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) "gpio54", "gpio55",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static const char * const prng_rosc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) "gpio53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static const char * const qpic_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) "gpio66", "gpio67", "gpio68", "gpio69",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static const char * const rgmii_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) "gpio29", "gpio30", "gpio31", "gpio32", "gpio33",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static const char * const rmii_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) "gpio50", "gpio51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static const char * const sdio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) "gpio30", "gpio31", "gpio32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static const char * const smart0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) "gpio0", "gpio1", "gpio2", "gpio5", "gpio44", "gpio45", "gpio46",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) "gpio47",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static const char * const smart1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) "gpio8", "gpio9", "gpio16", "gpio17", "gpio58", "gpio59", "gpio60",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static const char * const smart2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) "gpio40", "gpio41", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static const char * const smart3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) "gpio58", "gpio59", "gpio60", "gpio61",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static const char * const tm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static const char * const wifi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) "gpio37", "gpio40", "gpio41", "gpio42", "gpio50", "gpio51", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) "gpio53", "gpio56", "gpio57", "gpio58", "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static const char * const wifi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) "gpio37", "gpio40", "gpio41", "gpio43", "gpio50", "gpio51", "gpio52",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) "gpio53", "gpio56", "gpio57", "gpio58", "gpio98",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static const struct msm_function ipq4019_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) FUNCTION(aud_pin),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) FUNCTION(audio_pwm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) FUNCTION(blsp_i2c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) FUNCTION(blsp_i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) FUNCTION(blsp_spi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) FUNCTION(blsp_spi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) FUNCTION(blsp_uart0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) FUNCTION(blsp_uart1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) FUNCTION(chip_rst),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) FUNCTION(i2s_rx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) FUNCTION(i2s_spdif_in),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) FUNCTION(i2s_spdif_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) FUNCTION(i2s_td),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) FUNCTION(i2s_tx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) FUNCTION(jtag),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) FUNCTION(led0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) FUNCTION(led1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) FUNCTION(led2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) FUNCTION(led3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) FUNCTION(led4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) FUNCTION(led5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) FUNCTION(led6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) FUNCTION(led7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) FUNCTION(led8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) FUNCTION(led9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) FUNCTION(led10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) FUNCTION(led11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) FUNCTION(mdc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) FUNCTION(mdio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) FUNCTION(pcie),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) FUNCTION(pmu),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) FUNCTION(prng_rosc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) FUNCTION(qpic),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) FUNCTION(rgmii),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) FUNCTION(rmii),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) FUNCTION(sdio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) FUNCTION(smart0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) FUNCTION(smart1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) FUNCTION(smart2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) FUNCTION(smart3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) FUNCTION(tm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) FUNCTION(wifi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) FUNCTION(wifi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static const struct msm_pingroup ipq4019_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) wifi0, wifi1, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) NA, NA, tm, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) NA, NA, NA, NA, NA, tm, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) NA, NA, NA, NA, NA, tm, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) tm, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) i2s_spdif_in, NA, NA, NA, NA, tm, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static const struct msm_pinctrl_soc_data ipq4019_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) .pins = ipq4019_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) .npins = ARRAY_SIZE(ipq4019_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) .functions = ipq4019_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) .nfunctions = ARRAY_SIZE(ipq4019_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) .groups = ipq4019_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) .ngroups = ARRAY_SIZE(ipq4019_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) .ngpios = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) .pull_no_keeper = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) static int ipq4019_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return msm_pinctrl_probe(pdev, &ipq4019_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) static const struct of_device_id ipq4019_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) { .compatible = "qcom,ipq4019-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static struct platform_driver ipq4019_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .name = "ipq4019-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .of_match_table = ipq4019_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) .probe = ipq4019_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) static int __init ipq4019_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return platform_driver_register(&ipq4019_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) arch_initcall(ipq4019_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) static void __exit ipq4019_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) platform_driver_unregister(&ipq4019_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) module_exit(ipq4019_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) MODULE_DESCRIPTION("Qualcomm ipq4019 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) MODULE_DEVICE_TABLE(of, ipq4019_pinctrl_of_match);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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